3 WIRE 1024 -1216 992 -1216
\r
4 WIRE 1104 -1216 1024 -1216
\r
5 WIRE 1040 -1184 992 -1184
\r
6 WIRE 1104 -1184 1040 -1184
\r
7 WIRE 1056 -1152 992 -1152
\r
8 WIRE 1104 -1152 1056 -1152
\r
9 WIRE -544 -1120 -688 -1120
\r
10 WIRE -416 -1120 -544 -1120
\r
11 WIRE -128 -1120 -384 -1120
\r
12 WIRE 1056 -1120 1056 -1152
\r
13 WIRE 1056 -1120 960 -1120
\r
14 WIRE 1424 -1120 1216 -1120
\r
15 WIRE 1536 -1120 1424 -1120
\r
16 WIRE 432 -1088 336 -1088
\r
17 WIRE 512 -1088 432 -1088
\r
18 WIRE 1040 -1088 1040 -1184
\r
19 WIRE 1040 -1088 992 -1088
\r
20 WIRE 1424 -1088 1216 -1088
\r
21 WIRE 1536 -1088 1424 -1088
\r
22 WIRE 1424 -1056 1216 -1056
\r
23 WIRE 1536 -1056 1424 -1056
\r
24 WIRE 432 -1040 336 -1040
\r
25 WIRE 1792 -1008 1744 -1008
\r
26 WIRE 1840 -1008 1792 -1008
\r
27 WIRE 2048 -1008 2000 -1008
\r
28 WIRE 2080 -1008 2048 -1008
\r
29 WIRE -416 -992 -448 -992
\r
30 WIRE -336 -992 -416 -992
\r
31 WIRE -128 -992 -128 -1120
\r
32 WIRE -128 -992 -176 -992
\r
33 WIRE -32 -992 -128 -992
\r
34 WIRE 80 -992 -32 -992
\r
35 WIRE 432 -992 336 -992
\r
36 WIRE 1104 -992 1072 -992
\r
37 WIRE -688 -960 -688 -1120
\r
38 WIRE -592 -960 -688 -960
\r
39 WIRE 1104 -960 1072 -960
\r
40 WIRE 1424 -960 1264 -960
\r
41 WIRE 1536 -960 1424 -960
\r
42 WIRE 1840 -960 1792 -960
\r
43 WIRE -336 -944 -416 -944
\r
44 WIRE -592 -928 -704 -928
\r
45 WIRE -448 -928 -448 -992
\r
46 WIRE -448 -928 -480 -928
\r
47 WIRE 1104 -928 1072 -928
\r
48 WIRE 1424 -928 1296 -928
\r
49 WIRE 1536 -928 1424 -928
\r
50 WIRE 1424 -896 1344 -896
\r
51 WIRE 1536 -896 1424 -896
\r
52 WIRE -416 -864 -416 -944
\r
53 WIRE 176 -848 96 -848
\r
54 WIRE 1648 -832 1568 -832
\r
55 WIRE 1792 -816 1792 -960
\r
56 WIRE 1792 -816 1728 -816
\r
57 WIRE 176 -800 96 -800
\r
58 WIRE 512 -800 512 -1088
\r
59 WIRE 512 -800 368 -800
\r
60 WIRE 1648 -800 1568 -800
\r
61 WIRE -544 -784 -544 -848
\r
62 WIRE -544 -784 -576 -784
\r
63 WIRE 1152 -784 1152 -880
\r
64 WIRE 1152 -784 1072 -784
\r
65 WIRE -544 -768 -544 -784
\r
66 WIRE 176 -752 96 -752
\r
67 WIRE -544 -672 -544 -688
\r
68 WIRE 1024 -656 1024 -1216
\r
69 WIRE 1072 -656 1024 -656
\r
70 WIRE 992 -624 992 -1088
\r
71 WIRE 1072 -624 992 -624
\r
72 WIRE 960 -592 960 -1120
\r
73 WIRE 1072 -592 960 -592
\r
74 WIRE 1264 -560 1264 -960
\r
75 WIRE 1264 -560 1184 -560
\r
76 WIRE 416 -544 368 -544
\r
77 WIRE 1296 -528 1296 -928
\r
78 WIRE 1296 -528 1184 -528
\r
79 WIRE 208 -512 80 -512
\r
80 WIRE 416 -512 368 -512
\r
82 WIRE 1344 -496 1344 -896
\r
83 WIRE 1344 -496 1184 -496
\r
84 WIRE 208 -480 80 -480
\r
85 WIRE 416 -480 368 -480
\r
86 WIRE -528 -432 -576 -432
\r
87 WIRE 1072 -432 1040 -432
\r
88 WIRE 1072 -400 1040 -400
\r
91 WIRE -528 -368 -576 -368
\r
92 WIRE 144 -368 112 -368
\r
93 WIRE 208 -368 144 -368
\r
94 WIRE 1072 -368 1040 -368
\r
96 WIRE 1120 -224 1120 -320
\r
97 WIRE 1120 -224 1040 -224
\r
98 FLAG -768 -1152 $G_Vss
\r
99 FLAG -768 -1216 $G_Vdd
\r
100 FLAG 432 -1088 I0_opcode
\r
104 FLAG -544 -1120 PC_PLUS_1
\r
107 FLAG -576 -784 CTRL_PC
\r
108 FLAG 96 -848 IS_CMP
\r
109 FLAG 96 -800 IS_LWI
\r
118 FLAG -416 -864 FETCH
\r
119 FLAG 0 -352 EXECUTE
\r
121 FLAG -416 -992 NEXT_ADDR
\r
122 FLAG 1792 -1008 S_IN
\r
124 FLAG 992 -1152 $G_Vss
\r
125 FLAG 992 -1216 $G_Vdd
\r
141 FLAG 1424 -1120 ALU_IN_A0
\r
142 FLAG 1424 -1088 ALU_IN_A1
\r
143 FLAG 1424 -1056 ALU_IN_A2
\r
144 FLAG 1424 -960 ALU_IN_B0
\r
145 FLAG 1424 -928 ALU_IN_B1
\r
146 FLAG 1424 -896 ALU_IN_B2
\r
147 FLAG 1792 -816 CLK_STATUS
\r
148 FLAG 1568 -832 IS_CMP
\r
149 FLAG 1568 -800 EXECUTE
\r
150 FLAG 144 -368 CLK_A
\r
151 FLAG -528 -432 FETCH
\r
152 FLAG -528 -368 EXECUTE
\r
154 SYMBOL tpower -768 -1184 R0
\r
155 SYMATTR InstName X2
\r
156 SYMBOL tcycle_up -400 -1120 M0
\r
157 SYMATTR InstName CYCLE_PC
\r
158 SYMBOL mux3-1 -528 -960 R0
\r
159 SYMATTR InstName MUX_PC
\r
160 SYMBOL voltage -544 -784 R0
\r
161 WINDOW 123 0 0 Left 0
\r
162 WINDOW 39 0 0 Left 0
\r
163 WINDOW 3 32 65 Left 0
\r
164 SYMATTR Value PWL(0 0 5u 0 5.1u -5)
\r
165 SYMATTR InstName V1
\r
166 SYMBOL decoder1-3 272 -848 M0
\r
167 SYMATTR InstName X3
\r
168 SYMBOL trit_reg3 288 -592 R0
\r
169 SYMATTR InstName REGISTER_A
\r
170 SYMBOL min 64 -368 R0
\r
171 SYMATTR InstName DO_LWI
\r
172 SYMBOL dtflop-ms 1920 -1056 R0
\r
173 SYMATTR InstName STATUS_REG
\r
174 SYMBOL mux9-3 1168 -1216 R0
\r
175 SYMATTR InstName MUX_ALU_A
\r
176 SYMBOL mux9-3 1136 -656 R0
\r
177 SYMATTR InstName MUX_ALU_B
\r
178 SYMBOL min 1680 -816 R0
\r
179 SYMATTR InstName DO_CMP
\r
180 SYMBOL alu 1584 -1120 R0
\r
181 SYMATTR InstName Xalu
\r
182 SYMBOL clock_gen -656 -480 R0
\r
183 SYMATTR InstName cg
\r
184 SYMBOL swrom-cmptest 128 -1088 R0
\r
185 SYMATTR InstName X1
\r
186 SYMBOL dtflop-ms2 -256 -1040 R0
\r
187 SYMATTR InstName X4
\r
188 TEXT -200 -744 Left 0 !.tran 320u
\r
189 TEXT -864 -960 Left 0 ;Reset address
\r
190 TEXT 8 -920 Left 0 ;Should result in S = _1, _1, 1
\r
191 TEXT 736 -1192 Left 0 ;IN "Register"\n(User input)
\r
192 TEXT 736 -1088 Left 0 ;OUT "Register"\n(Cannot read from)
\r
193 TEXT 736 -968 Left 0 ;A Register
\r
194 TEXT 704 -632 Left 0 ;IN "Register"\n(User input)
\r
195 TEXT 704 -528 Left 0 ;OUT "Register"\n(Cannot read from)
\r
196 TEXT 704 -408 Left 0 ;A Register
\r
197 RECTANGLE Normal 464 -240 -112 -640
\r
198 RECTANGLE Normal 2112 -160 688 -1344
\r