5 project_name: "control"
\r
6 full_library_folder: "c:\program files\freepcb\lib"
\r
9 SMT_connect_copper: "0"
\r
11 dsn_bounds_poly: "0"
\r
12 dsn_signals_poly: "0"
\r
13 autosave_interval: 0
\r
14 netlist_import_flags: 451
\r
17 visible_grid_spacing: 5080000.000000
\r
18 visible_grid_item: 100MIL
\r
19 visible_grid_item: 125MIL
\r
20 visible_grid_item: 200MIL
\r
21 visible_grid_item: 250MIL
\r
22 visible_grid_item: 400MIL
\r
23 visible_grid_item: 500MIL
\r
24 visible_grid_item: 1000MIL
\r
25 visible_grid_item: 1MM
\r
26 visible_grid_item: 2MM
\r
27 visible_grid_item: 2.5MM
\r
28 visible_grid_item: 4MM
\r
29 visible_grid_item: 5MM
\r
30 visible_grid_item: 10MM
\r
31 visible_grid_item: 20MM
\r
32 visible_grid_item: 25MM
\r
33 visible_grid_item: 40MM
\r
34 visible_grid_item: 50MM
\r
35 visible_grid_item: 100MM
\r
37 placement_grid_spacing: 2540000.000000
\r
38 placement_grid_item: 10MIL
\r
39 placement_grid_item: 20MIL
\r
40 placement_grid_item: 25MIL
\r
41 placement_grid_item: 40MIL
\r
42 placement_grid_item: 50MIL
\r
43 placement_grid_item: 100MIL
\r
44 placement_grid_item: 200MIL
\r
45 placement_grid_item: 250MIL
\r
46 placement_grid_item: 400MIL
\r
47 placement_grid_item: 500MIL
\r
48 placement_grid_item: 1000MIL
\r
49 placement_grid_item: 0.1MM
\r
50 placement_grid_item: 0.2MM
\r
51 placement_grid_item: 0.25MM
\r
52 placement_grid_item: 0.4MM
\r
53 placement_grid_item: 0.5MM
\r
54 placement_grid_item: 1MM
\r
55 placement_grid_item: 2MM
\r
56 placement_grid_item: 2.5MM
\r
57 placement_grid_item: 4MM
\r
58 placement_grid_item: 5MM
\r
59 placement_grid_item: 10MM
\r
61 routing_grid_spacing: 508000.000000
\r
62 routing_grid_item: 1MIL
\r
63 routing_grid_item: 2MIL
\r
64 routing_grid_item: 2.5MIL
\r
65 routing_grid_item: 3.33330709MIL
\r
66 routing_grid_item: 4MIL
\r
67 routing_grid_item: 5MIL
\r
68 routing_grid_item: 6.66661417MIL
\r
69 routing_grid_item: 10MIL
\r
70 routing_grid_item: 12.5MIL
\r
71 routing_grid_item: 16.66661417MIL
\r
72 routing_grid_item: 20MIL
\r
73 routing_grid_item: 25MIL
\r
74 routing_grid_item: 40MIL
\r
75 routing_grid_item: 50MIL
\r
76 routing_grid_item: 0.01MM
\r
77 routing_grid_item: 0.02MM
\r
78 routing_grid_item: 0.04MM
\r
79 routing_grid_item: 0.05MM
\r
80 routing_grid_item: 0.1MM
\r
81 routing_grid_item: 0.2MM
\r
82 routing_grid_item: 0.25MM
\r
83 routing_grid_item: 0.4MM
\r
84 routing_grid_item: 0.5MM
\r
85 routing_grid_item: 1MM
\r
86 routing_grid_item: 2MM
\r
87 routing_grid_item: 2.5MM
\r
88 routing_grid_item: 4MM
\r
89 routing_grid_item: 5MM
\r
90 routing_grid_item: 10MM
\r
94 fp_visible_grid_spacing: 5080000.000000
\r
95 fp_visible_grid_item: 100MIL
\r
96 fp_visible_grid_item: 125MIL
\r
97 fp_visible_grid_item: 200MIL
\r
98 fp_visible_grid_item: 250MIL
\r
99 fp_visible_grid_item: 400MIL
\r
100 fp_visible_grid_item: 500MIL
\r
101 fp_visible_grid_item: 1000MIL
\r
102 fp_visible_grid_item: 1MM
\r
103 fp_visible_grid_item: 2MM
\r
104 fp_visible_grid_item: 2.5MM
\r
105 fp_visible_grid_item: 4MM
\r
106 fp_visible_grid_item: 5MM
\r
107 fp_visible_grid_item: 10MM
\r
108 fp_visible_grid_item: 20MM
\r
109 fp_visible_grid_item: 25MM
\r
110 fp_visible_grid_item: 40MM
\r
111 fp_visible_grid_item: 50MM
\r
112 fp_visible_grid_item: 100MM
\r
114 fp_placement_grid_spacing: 2540000.000000
\r
115 fp_placement_grid_item: 10MIL
\r
116 fp_placement_grid_item: 20MIL
\r
117 fp_placement_grid_item: 25MIL
\r
118 fp_placement_grid_item: 40MIL
\r
119 fp_placement_grid_item: 50MIL
\r
120 fp_placement_grid_item: 100MIL
\r
121 fp_placement_grid_item: 200MIL
\r
122 fp_placement_grid_item: 250MIL
\r
123 fp_placement_grid_item: 400MIL
\r
124 fp_placement_grid_item: 500MIL
\r
125 fp_placement_grid_item: 1000MIL
\r
126 fp_placement_grid_item: 0.1MM
\r
127 fp_placement_grid_item: 0.2MM
\r
128 fp_placement_grid_item: 0.25MM
\r
129 fp_placement_grid_item: 0.4MM
\r
130 fp_placement_grid_item: 0.5MM
\r
131 fp_placement_grid_item: 1MM
\r
132 fp_placement_grid_item: 2MM
\r
133 fp_placement_grid_item: 2.5MM
\r
134 fp_placement_grid_item: 4MM
\r
135 fp_placement_grid_item: 5MM
\r
136 fp_placement_grid_item: 10MM
\r
140 fill_clearance: 254000
\r
141 mask_clearance: 203200
\r
142 thermal_width: 254000
\r
143 min_silkscreen_width: 127000
\r
144 board_outline_width: 127000
\r
145 hole_clearance: 381000
\r
146 pilot_diameter: 254000
\r
147 annular_ring_for_pins: 177800
\r
148 annular_ring_for_vias: 127000
\r
149 shrink_paste_mask: 0
\r
151 cam_layers: 15732735
\r
160 drc_check_unrouted: 0
\r
161 drc_trace_width: 254000
\r
162 drc_pad_pad: 254000
\r
163 drc_pad_trace: 254000
\r
164 drc_trace_trace: 254000
\r
165 drc_hole_copper: 381000
\r
166 drc_annular_ring_pins: 177800
\r
167 drc_annular_ring_vias: 127000
\r
168 drc_board_edge_copper: 635000
\r
169 drc_board_edge_hole: 635000
\r
170 drc_hole_hole: 635000
\r
171 drc_copper_copper: 254000
\r
173 default_trace_width: 254000
\r
174 default_via_pad_width: 711200
\r
175 default_via_hole_width: 355600
\r
177 width_menu_item: 1 152400 711200 355600
\r
178 width_menu_item: 2 203200 711200 355600
\r
179 width_menu_item: 3 254000 711200 355600
\r
180 width_menu_item: 4 304800 711200 355600
\r
181 width_menu_item: 5 381000 711200 355600
\r
182 width_menu_item: 6 508000 711200 355600
\r
183 width_menu_item: 7 635000 711200 355600
\r
186 layer_info: "selection" 0 255 255 255 1
\r
187 layer_info: "background" 1 0 0 0 1
\r
188 layer_info: "visible grid" 2 255 255 255 1
\r
189 layer_info: "highlight" 3 255 255 255 1
\r
190 layer_info: "DRC error" 4 255 128 64 1
\r
191 layer_info: "board outline" 5 0 0 255 1
\r
192 layer_info: "rat line" 6 255 0 255 1
\r
193 layer_info: "top silk" 7 255 255 0 1
\r
194 layer_info: "bottom silk" 8 255 192 192 1
\r
195 layer_info: "top sm cutout" 9 160 160 160 1
\r
196 layer_info: "bot sm cutout" 10 95 95 95 1
\r
197 layer_info: "thru pad" 11 0 0 255 1
\r
198 layer_info: "top copper" 12 0 255 0 1
\r
199 layer_info: "bottom copper" 13 255 0 0 1
\r
205 source: "DIGIKEY CATALOG NO. 941, PAGE 64"
\r
207 sel_rect: -58 -35 658 335
\r
208 ref_text: 50 -100 150 270 7
\r
209 centroid: 0 300 150
\r
210 outline_polyline: 7 -50 50
\r
211 next_corner: 650 50 0
\r
212 next_corner: 650 250 0
\r
213 next_corner: -50 250 0
\r
215 outline_polyline: 7 -50 100
\r
216 next_corner: 0 100 0
\r
217 next_corner: 0 200 0
\r
218 next_corner: -50 200 0
\r
222 top_pad: 2 55 27 27 0
\r
223 inner_pad: 1 55 27 27 0
\r
224 bottom_pad: 2 55 27 27 0
\r
225 pin: "2" 28 100 0 0
\r
226 top_pad: 1 55 27 27 0
\r
227 inner_pad: 1 55 27 27 0
\r
228 bottom_pad: 1 55 27 27 0
\r
229 pin: "3" 28 200 0 0
\r
230 top_pad: 1 55 27 27 0
\r
231 inner_pad: 1 55 27 27 0
\r
232 bottom_pad: 1 55 27 27 0
\r
233 pin: "4" 28 300 0 0
\r
234 top_pad: 1 55 27 27 0
\r
235 inner_pad: 1 55 27 27 0
\r
236 bottom_pad: 1 55 27 27 0
\r
237 pin: "5" 28 400 0 0
\r
238 top_pad: 1 55 27 27 0
\r
239 inner_pad: 1 55 27 27 0
\r
240 bottom_pad: 1 55 27 27 0
\r
241 pin: "6" 28 500 0 0
\r
242 top_pad: 1 55 27 27 0
\r
243 inner_pad: 1 55 27 27 0
\r
244 bottom_pad: 1 55 27 27 0
\r
245 pin: "7" 28 600 0 0
\r
246 top_pad: 1 55 27 27 0
\r
247 inner_pad: 1 55 27 27 0
\r
248 bottom_pad: 1 55 27 27 0
\r
249 pin: "8" 28 600 300 0
\r
250 top_pad: 1 55 27 27 0
\r
251 inner_pad: 1 55 27 27 0
\r
252 bottom_pad: 1 55 27 27 0
\r
253 pin: "9" 28 500 300 0
\r
254 top_pad: 1 55 27 27 0
\r
255 inner_pad: 1 55 27 27 0
\r
256 bottom_pad: 1 55 27 27 0
\r
257 pin: "10" 28 400 300 0
\r
258 top_pad: 1 55 27 27 0
\r
259 inner_pad: 1 55 27 27 0
\r
260 bottom_pad: 1 55 27 27 0
\r
261 pin: "11" 28 300 300 0
\r
262 top_pad: 1 55 27 27 0
\r
263 inner_pad: 1 55 27 27 0
\r
264 bottom_pad: 1 55 27 27 0
\r
265 pin: "12" 28 200 300 0
\r
266 top_pad: 1 55 27 27 0
\r
267 inner_pad: 1 55 27 27 0
\r
268 bottom_pad: 1 55 27 27 0
\r
269 pin: "13" 28 100 300 0
\r
270 top_pad: 1 55 27 27 0
\r
271 inner_pad: 1 55 27 27 0
\r
272 bottom_pad: 1 55 27 27 0
\r
273 pin: "14" 28 0 300 0
\r
274 top_pad: 1 55 27 27 0
\r
275 inner_pad: 1 55 27 27 0
\r
276 bottom_pad: 1 55 27 27 0
\r
280 source: "PRINTED CIRCUIT DESIGN METHODS PAGE 411"
\r
282 sel_rect: -33 -33 33 133
\r
283 ref_text: 50 0 160 0 7
\r
287 top_pad: 2 50 25 25 0
\r
288 inner_pad: 1 50 25 25 0
\r
289 bottom_pad: 2 50 25 25 0
\r
290 pin: "2" 28 0 100 0
\r
291 top_pad: 1 50 25 25 0
\r
292 inner_pad: 1 50 25 25 0
\r
293 bottom_pad: 1 50 25 25 0
\r
297 source: "DIGITAL PRINTED CIRCUIT DESIGN & DRAFTING, PAGE 408"
\r
299 sel_rect: -45 -57 545 57
\r
300 ref_text: 50 250 99 0 7
\r
302 outline_polyline: 7 109 49
\r
303 next_corner: 391 49 0
\r
304 next_corner: 391 -49 0
\r
305 next_corner: 109 -49 0
\r
309 top_pad: 1 75 37 37 0
\r
310 inner_pad: 1 75 37 37 0
\r
311 bottom_pad: 1 75 37 37 0
\r
312 pin: "2" 35 500 0 0
\r
313 top_pad: 1 75 37 37 0
\r
314 inner_pad: 1 75 37 37 0
\r
315 bottom_pad: 1 75 37 37 0
\r
317 name: "15X2HDR-100"
\r
319 source: "PRINTED CIRCUIT DESIGN METHODS PAGE 411"
\r
321 sel_rect: -33 -33 1433 133
\r
322 ref_text: 50 700 160 0 7
\r
326 top_pad: 2 50 25 25 0
\r
327 inner_pad: 1 50 25 25 0
\r
328 bottom_pad: 2 50 25 25 0
\r
329 pin: "2" 28 0 100 0
\r
330 top_pad: 1 50 25 25 0
\r
331 inner_pad: 1 50 25 25 0
\r
332 bottom_pad: 1 50 25 25 0
\r
333 pin: "3" 28 100 0 0
\r
334 top_pad: 1 50 25 25 0
\r
335 inner_pad: 1 50 25 25 0
\r
336 bottom_pad: 1 50 25 25 0
\r
337 pin: "4" 28 100 100 0
\r
338 top_pad: 1 50 25 25 0
\r
339 inner_pad: 1 50 25 25 0
\r
340 bottom_pad: 1 50 25 25 0
\r
341 pin: "5" 28 200 0 0
\r
342 top_pad: 1 50 25 25 0
\r
343 inner_pad: 1 50 25 25 0
\r
344 bottom_pad: 1 50 25 25 0
\r
345 pin: "6" 28 200 100 0
\r
346 top_pad: 1 50 25 25 0
\r
347 inner_pad: 1 50 25 25 0
\r
348 bottom_pad: 1 50 25 25 0
\r
349 pin: "7" 28 300 0 0
\r
350 top_pad: 1 50 25 25 0
\r
351 inner_pad: 1 50 25 25 0
\r
352 bottom_pad: 1 50 25 25 0
\r
353 pin: "8" 28 300 100 0
\r
354 top_pad: 1 50 25 25 0
\r
355 inner_pad: 1 50 25 25 0
\r
356 bottom_pad: 1 50 25 25 0
\r
357 pin: "9" 28 400 0 0
\r
358 top_pad: 1 50 25 25 0
\r
359 inner_pad: 1 50 25 25 0
\r
360 bottom_pad: 1 50 25 25 0
\r
361 pin: "10" 28 400 100 0
\r
362 top_pad: 1 50 25 25 0
\r
363 inner_pad: 1 50 25 25 0
\r
364 bottom_pad: 1 50 25 25 0
\r
365 pin: "11" 28 500 0 0
\r
366 top_pad: 1 50 25 25 0
\r
367 inner_pad: 1 50 25 25 0
\r
368 bottom_pad: 1 50 25 25 0
\r
369 pin: "12" 28 500 100 0
\r
370 top_pad: 1 50 25 25 0
\r
371 inner_pad: 1 50 25 25 0
\r
372 bottom_pad: 1 50 25 25 0
\r
373 pin: "13" 28 600 0 0
\r
374 top_pad: 1 50 25 25 0
\r
375 inner_pad: 1 50 25 25 0
\r
376 bottom_pad: 1 50 25 25 0
\r
377 pin: "14" 28 600 100 0
\r
378 top_pad: 1 50 25 25 0
\r
379 inner_pad: 1 50 25 25 0
\r
380 bottom_pad: 1 50 25 25 0
\r
381 pin: "15" 28 700 0 0
\r
382 top_pad: 1 50 25 25 0
\r
383 inner_pad: 1 50 25 25 0
\r
384 bottom_pad: 1 50 25 25 0
\r
385 pin: "16" 28 700 100 0
\r
386 top_pad: 1 50 25 25 0
\r
387 inner_pad: 1 50 25 25 0
\r
388 bottom_pad: 1 50 25 25 0
\r
389 pin: "17" 28 800 0 0
\r
390 top_pad: 1 50 25 25 0
\r
391 inner_pad: 1 50 25 25 0
\r
392 bottom_pad: 1 50 25 25 0
\r
393 pin: "18" 28 800 100 0
\r
394 top_pad: 1 50 25 25 0
\r
395 inner_pad: 1 50 25 25 0
\r
396 bottom_pad: 1 50 25 25 0
\r
397 pin: "19" 28 900 0 0
\r
398 top_pad: 1 50 25 25 0
\r
399 inner_pad: 1 50 25 25 0
\r
400 bottom_pad: 1 50 25 25 0
\r
401 pin: "20" 28 900 100 0
\r
402 top_pad: 1 50 25 25 0
\r
403 inner_pad: 1 50 25 25 0
\r
404 bottom_pad: 1 50 25 25 0
\r
405 pin: "21" 28 1000 0 0
\r
406 top_pad: 1 50 25 25 0
\r
407 inner_pad: 1 50 25 25 0
\r
408 bottom_pad: 1 50 25 25 0
\r
409 pin: "22" 28 1000 100 0
\r
410 top_pad: 1 50 25 25 0
\r
411 inner_pad: 1 50 25 25 0
\r
412 bottom_pad: 1 50 25 25 0
\r
413 pin: "23" 28 1100 0 0
\r
414 top_pad: 1 50 25 25 0
\r
415 inner_pad: 1 50 25 25 0
\r
416 bottom_pad: 1 50 25 25 0
\r
417 pin: "24" 28 1100 100 0
\r
418 top_pad: 1 50 25 25 0
\r
419 inner_pad: 1 50 25 25 0
\r
420 bottom_pad: 1 50 25 25 0
\r
421 pin: "25" 28 1200 0 0
\r
422 top_pad: 1 50 25 25 0
\r
423 inner_pad: 1 50 25 25 0
\r
424 bottom_pad: 1 50 25 25 0
\r
425 pin: "26" 28 1200 100 0
\r
426 top_pad: 1 50 25 25 0
\r
427 inner_pad: 1 50 25 25 0
\r
428 bottom_pad: 1 50 25 25 0
\r
429 pin: "27" 28 1300 0 0
\r
430 top_pad: 1 50 25 25 0
\r
431 inner_pad: 1 50 25 25 0
\r
432 bottom_pad: 1 50 25 25 0
\r
433 pin: "28" 28 1300 100 0
\r
434 top_pad: 1 50 25 25 0
\r
435 inner_pad: 1 50 25 25 0
\r
436 bottom_pad: 1 50 25 25 0
\r
437 pin: "29" 28 1400 0 0
\r
438 top_pad: 1 50 25 25 0
\r
439 inner_pad: 1 50 25 25 0
\r
440 bottom_pad: 1 50 25 25 0
\r
441 pin: "30" 28 1400 100 0
\r
442 top_pad: 1 50 25 25 0
\r
443 inner_pad: 1 50 25 25 0
\r
444 bottom_pad: 1 50 25 25 0
\r
448 [solder_mask_cutouts]
\r
453 part: V$XXpower$Vdd
\r
454 ref_text: 1270000 177800 0 0 4064000
\r
455 package: "1X2HDR-100"
\r
456 shape: "1X2HDR-100"
\r
457 pos: -159181800 -42341800 0 0 0
\r
459 part: V$XXpower$Vss
\r
460 ref_text: 1270000 177800 0 0 4064000
\r
461 package: "1X2HDR-100"
\r
462 shape: "1X2HDR-100"
\r
463 pos: -159181800 -34721800 0 0 0
\r
465 part: X_IC_0_CD4007
\r
466 ref_text: 1270000 177800 270 -2540000 3810000
\r
467 package: "14DIP300"
\r
469 pos: 101600000 10160000 0 0 0
\r
471 part: X_IC_1_CD4007
\r
472 ref_text: 1270000 177800 270 -2540000 3810000
\r
473 package: "14DIP300"
\r
475 pos: -21386800 28829000 0 0 0
\r
477 part: X_IC_2_CD4007
\r
478 ref_text: 1270000 177800 270 -2540000 3810000
\r
479 package: "14DIP300"
\r
481 pos: 81280000 91440000 0 0 0
\r
483 part: X_IC_3_CD4007
\r
484 ref_text: 1270000 177800 270 -2540000 3810000
\r
485 package: "14DIP300"
\r
487 pos: -21386800 54229000 0 0 0
\r
489 part: X_IC_4_CD4007
\r
490 ref_text: 1270000 177800 270 -2540000 3810000
\r
491 package: "14DIP300"
\r
493 pos: -21386800 66929000 0 0 0
\r
495 part: X_IC_5_CD4007
\r
496 ref_text: 1270000 177800 270 -2540000 3810000
\r
497 package: "14DIP300"
\r
499 pos: -21386800 79629000 0 0 0
\r
501 part: X_IC_6_CD4007
\r
502 ref_text: 1270000 177800 270 -2540000 3810000
\r
503 package: "14DIP300"
\r
505 pos: -21386800 92329000 0 0 0
\r
507 part: X_IC_7_CD4007
\r
508 ref_text: 1270000 177800 270 -2540000 3810000
\r
509 package: "14DIP300"
\r
511 pos: 81280000 50800000 0 0 0
\r
513 part: X_IC_8_CD4007
\r
514 ref_text: 1270000 177800 270 -2540000 3810000
\r
515 package: "14DIP300"
\r
517 pos: -26466800 889000 0 0 0
\r
519 part: X_IC_9_CD4007
\r
520 ref_text: 1270000 177800 270 -2540000 3810000
\r
521 package: "14DIP300"
\r
523 pos: -44246800 13589000 0 0 0
\r
525 part: X_IC_10_CD4007
\r
526 ref_text: 1270000 177800 270 -2540000 3810000
\r
527 package: "14DIP300"
\r
529 pos: -44246800 26289000 0 0 0
\r
531 part: X_IC_11_CD4007
\r
532 ref_text: 1270000 177800 270 -2540000 3810000
\r
533 package: "14DIP300"
\r
535 pos: -44246800 38989000 0 0 0
\r
537 part: X_IC_12_CD4007
\r
538 ref_text: 1270000 177800 270 -2540000 3810000
\r
539 package: "14DIP300"
\r
541 pos: -44246800 51689000 0 0 0
\r
543 part: X_IC_13_CD4007
\r
544 ref_text: 1270000 177800 270 -2540000 3810000
\r
545 package: "14DIP300"
\r
547 pos: -44246800 64389000 0 0 0
\r
549 part: X_IC_14_CD4007
\r
550 ref_text: 1270000 177800 270 -2540000 3810000
\r
551 package: "14DIP300"
\r
553 pos: -44246800 77089000 0 0 0
\r
555 part: X_IC_15_CD4007
\r
556 ref_text: 1270000 177800 270 -2540000 3810000
\r
557 package: "14DIP300"
\r
559 pos: -44246800 89789000 0 0 0
\r
561 part: X_IC_16_CD4007
\r
562 ref_text: 1270000 177800 270 -2540000 3810000
\r
563 package: "14DIP300"
\r
565 pos: -44246800 102489000 0 0 0
\r
567 part: X_IC_17_CD4007
\r
568 ref_text: 1270000 177800 270 -2540000 3810000
\r
569 package: "14DIP300"
\r
571 pos: -49326800 889000 0 0 0
\r
573 part: X_IC_45_CD4016
\r
574 ref_text: 1270000 177800 270 -2540000 3810000
\r
575 package: "14DIP300"
\r
577 pos: 22860000 -33020000 0 0 0
\r
579 part: X_IC_46_CD4016
\r
580 ref_text: 1270000 177800 270 -2540000 3810000
\r
581 package: "14DIP300"
\r
583 pos: -67106800 26289000 0 0 0
\r
585 part: X_IC_47_CD4016
\r
586 ref_text: 1270000 177800 270 -2540000 3810000
\r
587 package: "14DIP300"
\r
589 pos: -67106800 38989000 0 0 0
\r
591 part: RX$XXmux1$XXdecoder$XX1pti$Xinv$RP
\r
592 ref_text: 1270000 177800 0 6350000 2514600
\r
595 pos: -16637000 118287800 0 0 0
\r
597 part: RX$XXmux1$XXdecoder$XX1pti$Xinv$RN
\r
598 ref_text: 1270000 177800 0 6350000 2514600
\r
601 pos: -34417000 118287800 0 0 0
\r
603 part: RX$XXmux1$XXdecoder$XX1sti$XXinv$RP
\r
604 ref_text: 1270000 177800 0 6350000 2514600
\r
607 pos: -52197000 115747800 0 0 0
\r
609 part: RX$XXmux1$XXdecoder$XX1sti$XXinv$RN
\r
610 ref_text: 1270000 177800 0 6350000 2514600
\r
613 pos: -62357000 52247800 0 0 0
\r
615 part: RX$XXmux1$XXdecoder$XXinti$Xinv$RP
\r
616 ref_text: 1270000 177800 0 6350000 2514600
\r
619 pos: -62357000 59867800 0 0 0
\r
621 part: RX$XXmux1$XXdecoder$XXinti$Xinv$RN
\r
622 ref_text: 1270000 177800 0 6350000 2514600
\r
625 pos: -62357000 67487800 0 0 0
\r
627 part: RX$XXmux1$XXdecoder$XX0nor$RP
\r
628 ref_text: 1270000 177800 0 6350000 2514600
\r
631 pos: 71120000 83820000 0 0 0
\r
633 part: RX$XXmux1$XXdecoder$XX0nor$RN
\r
634 ref_text: 1270000 177800 0 6350000 2514600
\r
637 pos: 91440000 83820000 0 0 0
\r
639 part: RX$XXmux2$XXdecoder$XX1pti$Xinv$RP
\r
640 ref_text: 1270000 177800 0 6350000 2514600
\r
643 pos: -62357000 90347800 0 0 0
\r
645 part: RX$XXmux2$XXdecoder$XX1pti$Xinv$RN
\r
646 ref_text: 1270000 177800 0 6350000 2514600
\r
649 pos: -62357000 97967800 0 0 0
\r
651 part: RX$XXmux2$XXdecoder$XX1sti$XXinv$RP
\r
652 ref_text: 1270000 177800 0 6350000 2514600
\r
655 pos: -62357000 105587800 0 0 0
\r
657 part: RX$XXmux2$XXdecoder$XX1sti$XXinv$RN
\r
658 ref_text: 1270000 177800 0 6350000 2514600
\r
661 pos: -67437000 1447800 0 0 0
\r
663 part: RX$XXmux2$XXdecoder$XXinti$Xinv$RP
\r
664 ref_text: 1270000 177800 0 6350000 2514600
\r
667 pos: -69977000 113207800 0 0 0
\r
669 part: RX$XXmux2$XXdecoder$XXinti$Xinv$RN
\r
670 ref_text: 1270000 177800 0 6350000 2514600
\r
673 pos: -62357000 -31572200 0 0 0
\r
675 part: RX$XXmux2$XXdecoder$XX0nor$RP
\r
676 ref_text: 1270000 177800 0 6350000 2514600
\r
679 pos: -62357000 -23952200 0 0 0
\r
681 part: RX$XXmux2$XXdecoder$XX0nor$RN
\r
682 ref_text: 1270000 177800 0 6350000 2514600
\r
685 pos: -62357000 -16332200 0 0 0
\r
687 part: RX$XXmux3$XXdecoder$XX1pti$Xinv$RP
\r
688 ref_text: 1270000 177800 0 6350000 2514600
\r
691 pos: -62357000 -8712200 0 0 0
\r
693 part: RX$XXmux3$XXdecoder$XX1pti$Xinv$RN
\r
694 ref_text: 1270000 177800 0 6350000 2514600
\r
697 pos: -80137000 82727800 0 0 0
\r
699 part: RX$XXmux3$XXdecoder$XX1sti$XXinv$RP
\r
700 ref_text: 1270000 177800 0 6350000 2514600
\r
703 pos: -80137000 90347800 0 0 0
\r
705 part: RX$XXmux3$XXdecoder$XX1sti$XXinv$RN
\r
706 ref_text: 1270000 177800 0 6350000 2514600
\r
709 pos: -80137000 97967800 0 0 0
\r
711 part: RX$XXmux3$XXdecoder$XXinti$Xinv$RP
\r
712 ref_text: 1270000 177800 0 6350000 2514600
\r
715 pos: -80137000 105587800 0 0 0
\r
717 part: RX$XXmux3$XXdecoder$XXinti$Xinv$RN
\r
718 ref_text: 1270000 177800 0 6350000 2514600
\r
721 pos: -85217000 1447800 0 0 0
\r
723 part: RX$XXmux3$XXdecoder$XX0nor$RP
\r
724 ref_text: 1270000 177800 0 6350000 2514600
\r
727 pos: -85217000 9067800 0 0 0
\r
729 part: RX$XXmux3$XXdecoder$XX0nor$RN
\r
730 ref_text: 1270000 177800 0 6350000 2514600
\r
733 pos: 83820000 43180000 0 0 0
\r
735 part: RX$XXCycle_Up$XXnti$Xinv$RP
\r
736 ref_text: 1270000 177800 0 6350000 2514600
\r
739 pos: -67437000 -59512200 0 0 0
\r
741 part: RX$XXCycle_Up$XXnti$Xinv$RN
\r
742 ref_text: 1270000 177800 0 6350000 2514600
\r
745 pos: -67437000 -51892200 0 0 0
\r
747 part: RX$XXCycle_Up$XXpti$Xinv$RP
\r
748 ref_text: 1270000 177800 0 6350000 2514600
\r
751 pos: -67437000 -44272200 0 0 0
\r
753 part: RX$XXCycle_Up$XXpti$Xinv$RN
\r
754 ref_text: 1270000 177800 0 6350000 2514600
\r
757 pos: -87757000 113207800 0 0 0
\r
759 part: RX$XXCycle_Up$XXsti$XXinv$RP
\r
760 ref_text: 1270000 177800 0 6350000 2514600
\r
763 pos: -80137000 -36652200 0 0 0
\r
765 part: RX$XXCycle_Up$XXsti$XXinv$RN
\r
766 ref_text: 1270000 177800 0 6350000 2514600
\r
769 pos: -80137000 -29032200 0 0 0
\r
771 part: RX$XXCycle_Up$XXtnor1$RP
\r
772 ref_text: 1270000 177800 0 6350000 2514600
\r
775 pos: -80137000 -21412200 0 0 0
\r
777 part: RX$XXCycle_Up$XXtnor1$RN
\r
778 ref_text: 1270000 177800 0 6350000 2514600
\r
781 pos: -80137000 -13792200 0 0 0
\r
783 part: RX$XXCycle_Up$XXtnor0$RP
\r
784 ref_text: 1270000 177800 0 6350000 2514600
\r
787 pos: -80137000 -6172200 0 0 0
\r
789 part: RX$XXCycle_Up$XXtnor0$RN
\r
790 ref_text: 1270000 177800 0 6350000 2514600
\r
793 pos: -97917000 85267800 0 0 0
\r
795 part: RX$Xtand1$XXsti_tand$XXinv$RP
\r
796 ref_text: 1270000 177800 0 6350000 2514600
\r
799 pos: -97917000 92887800 0 0 0
\r
801 part: RX$Xtand1$XXsti_tand$XXinv$RN
\r
802 ref_text: 1270000 177800 0 6350000 2514600
\r
805 pos: -97917000 100507800 0 0 0
\r
807 part: RX$Xtand1$XXtnand$RP
\r
808 ref_text: 1270000 177800 0 6350000 2514600
\r
811 pos: -102997000 1447800 0 0 0
\r
813 part: RX$Xtand1$XXtnand$RN
\r
814 ref_text: 1270000 177800 0 6350000 2514600
\r
817 pos: -102997000 9067800 0 0 0
\r
819 part: RX$Xtand2$XXsti_tand$XXinv$RP
\r
820 ref_text: 1270000 177800 0 6350000 2514600
\r
823 pos: -102997000 16687800 0 0 0
\r
825 part: RX$Xtand2$XXsti_tand$XXinv$RN
\r
826 ref_text: 1270000 177800 0 6350000 2514600
\r
829 pos: -85217000 -59512200 0 0 0
\r
831 part: RX$Xtand2$XXtnand$RP
\r
832 ref_text: 1270000 177800 0 6350000 2514600
\r
835 pos: -85217000 -51892200 0 0 0
\r
837 part: RX$Xtand2$XXtnand$RN
\r
838 ref_text: 1270000 177800 0 6350000 2514600
\r
841 pos: -85217000 -44272200 0 0 0
\r
843 part: RX$Xtand3$XXsti_tand$XXinv$RP
\r
844 ref_text: 1270000 177800 0 6350000 2514600
\r
847 pos: -105537000 108127800 0 0 0
\r
849 part: RX$Xtand3$XXsti_tand$XXinv$RN
\r
850 ref_text: 1270000 177800 0 6350000 2514600
\r
853 pos: -105537000 115747800 0 0 0
\r
855 part: RX$Xtand3$XXtnand$RP
\r
856 ref_text: 1270000 177800 0 6350000 2514600
\r
859 pos: -97917000 -36652200 0 0 0
\r
861 part: RX$Xtand3$XXtnand$RN
\r
862 ref_text: 1270000 177800 0 6350000 2514600
\r
865 pos: -97917000 -29032200 0 0 0
\r
867 part: RX$XDecoder$XX1pti$Xinv$RP
\r
868 ref_text: 1270000 177800 0 6350000 2514600
\r
871 pos: -97917000 -21412200 0 0 0
\r
873 part: RX$XDecoder$XX1pti$Xinv$RN
\r
874 ref_text: 1270000 177800 0 6350000 2514600
\r
877 pos: -97917000 -13792200 0 0 0
\r
879 part: RX$XDecoder$XX1sti$XXinv$RP
\r
880 ref_text: 1270000 177800 0 6350000 2514600
\r
883 pos: -97917000 -6172200 0 0 0
\r
885 part: RX$XDecoder$XX1sti$XXinv$RN
\r
886 ref_text: 1270000 177800 0 6350000 2514600
\r
889 pos: -115697000 85267800 0 0 0
\r
891 part: RX$XDecoder$XXinti$Xinv$RP
\r
892 ref_text: 1270000 177800 0 6350000 2514600
\r
895 pos: -115697000 92887800 0 0 0
\r
897 part: RX$XDecoder$XXinti$Xinv$RN
\r
898 ref_text: 1270000 177800 0 6350000 2514600
\r
901 pos: -115697000 100507800 0 0 0
\r
903 part: RX$XDecoder$XX0nor$RP
\r
904 ref_text: 1270000 177800 0 6350000 2514600
\r
907 pos: -120777000 1447800 0 0 0
\r
909 part: RX$XDecoder$XX0nor$RN
\r
910 ref_text: 1270000 177800 0 6350000 2514600
\r
913 pos: -120777000 9067800 0 0 0
\r
916 ref_text: 1270000 177800 0 17780000 4064000
\r
918 shape: "15X2HDR-100"
\r
919 pos: -195580000 53340000 0 0 0
\r
923 net: "XDecoder$XX1pti$NTI_Out" 2 1 0 0 0 0 1
\r
924 pin: 1 X_IC_14_CD4007.5
\r
925 pin: 2 RX$XDecoder$XX1pti$Xinv$RN.2
\r
927 vtx: 1 -85217000 -13792200 11 0 0 0 0
\r
929 vtx: 2 -34086800 77089000 11 0 0 0 0
\r
931 net: "XXmux2$XXdecoder$XX1pti$NTI_Out" 2 1 0 0 0 0 1
\r
932 pin: 1 X_IC_1_CD4007.5
\r
933 pin: 2 RX$XXmux2$XXdecoder$XX1pti$Xinv$RN.2
\r
935 vtx: 1 -49657000 97967800 11 0 0 0 0
\r
937 vtx: 2 -11226800 28829000 11 0 0 0 0
\r
939 net: "XDecoder$XX1sti$NTI_Out" 2 1 0 0 0 0 1
\r
940 pin: 1 X_IC_16_CD4007.8
\r
941 pin: 2 RX$XDecoder$XX1sti$XXinv$RN.2
\r
943 vtx: 1 -102997000 85267800 11 0 0 0 0
\r
945 vtx: 2 -29006800 110109000 11 0 0 0 0
\r
947 net: "Xtand3$XXtnand$NP" 3 2 0 0 0 0 1
\r
948 pin: 1 X_IC_15_CD4007.1
\r
949 pin: 2 X_IC_15_CD4007.13
\r
950 pin: 3 RX$Xtand3$XXtnand$RP.1
\r
952 vtx: 1 -41706800 97409000 11 0 0 0 0
\r
954 vtx: 2 -44246800 89789000 11 0 0 0 0
\r
956 vtx: 1 -97917000 -36652200 11 0 0 0 0
\r
958 vtx: 2 -44246800 89789000 11 0 0 0 0
\r
960 net: "XXmux2$XXdecoder$XX1sti$NTI_Out" 2 1 0 0 0 0 1
\r
961 pin: 1 X_IC_3_CD4007.8
\r
962 pin: 2 RX$XXmux2$XXdecoder$XX1sti$XXinv$RN.2
\r
964 vtx: 1 -54737000 1447800 11 0 0 0 0
\r
966 vtx: 2 -6146800 61849000 11 0 0 0 0
\r
968 net: "XXmux2$XXdecoder$XX0nor$NP" 2 1 0 0 0 0 1
\r
969 pin: 1 X_IC_4_CD4007.1
\r
970 pin: 2 RX$XXmux2$XXdecoder$XX0nor$RP.1
\r
972 vtx: 1 -62357000 -23952200 11 0 0 0 0
\r
974 vtx: 2 -21386800 66929000 11 0 0 0 0
\r
976 net: "CU_Out" 2 1 0 0 0 0 1
\r
977 pin: 1 RX$XXCycle_Up$XXtnor1$RP.2
\r
978 pin: 2 RX$XXCycle_Up$XXtnor1$RN.1
\r
980 vtx: 1 -80137000 -13792200 11 0 0 0 0
\r
982 vtx: 2 -67437000 -21412200 11 0 0 0 0
\r
984 net: "tand3A" 1 0 0 0 0 0 1
\r
985 pin: 1 X_IC_15_CD4007.3
\r
987 net: "Xtand1$XXsti_tand$NTI_Out" 2 1 0 0 0 0 1
\r
988 pin: 1 X_IC_11_CD4007.8
\r
989 pin: 2 RX$Xtand1$XXsti_tand$XXinv$RN.2
\r
991 vtx: 1 -85217000 100507800 11 0 0 0 0
\r
993 vtx: 2 -29006800 46609000 11 0 0 0 0
\r
995 net: "XDecoder$XX0nor$NI" 2 1 0 0 0 0 1
\r
996 pin: 1 X_IC_17_CD4007.2
\r
997 pin: 2 X_IC_17_CD4007.13
\r
999 vtx: 1 -46786800 8509000 11 0 0 0 0
\r
1001 vtx: 2 -46786800 889000 11 0 0 0 0
\r
1003 net: "Dout_i" 3 2 0 0 0 0 1
\r
1004 pin: 1 X_IC_16_CD4007.5
\r
1005 pin: 2 X_IC_17_CD4007.3
\r
1006 pin: 3 RX$XDecoder$XXinti$Xinv$RN.2
\r
1007 connect: 1 2 0 1 0
\r
1008 vtx: 1 -102997000 100507800 11 0 0 0 0
\r
1010 vtx: 2 -34086800 102489000 11 0 0 0 0
\r
1011 connect: 2 1 0 1 0
\r
1012 vtx: 1 -44246800 889000 11 0 0 0 0
\r
1014 vtx: 2 -34086800 102489000 11 0 0 0 0
\r
1016 net: "Xtand1$XXtnand$NI" 2 1 0 0 0 0 1
\r
1017 pin: 1 X_IC_12_CD4007.4
\r
1018 pin: 2 X_IC_12_CD4007.8
\r
1019 connect: 1 1 0 1 0
\r
1020 vtx: 1 -29006800 59309000 11 0 0 0 0
\r
1022 vtx: 2 -36626800 51689000 11 0 0 0 0
\r
1024 net: "XXCycle_Up$_IN_NTI" 3 2 0 0 0 0 1
\r
1025 pin: 1 X_IC_6_CD4007.5
\r
1026 pin: 2 X_IC_9_CD4007.6
\r
1027 pin: 3 RX$XXCycle_Up$XXnti$Xinv$RN.2
\r
1028 connect: 1 2 1 1 0
\r
1029 vtx: 1 -54737000 -51892200 11 0 0 0 0
\r
1031 vtx: 2 -31546800 13589000 11 0 0 0 0
\r
1032 connect: 2 1 0 1 0
\r
1033 vtx: 1 -31546800 13589000 11 0 0 0 0
\r
1035 vtx: 2 -11226800 92329000 11 0 0 0 0
\r
1037 net: "tand2A" 1 0 0 0 0 0 1
\r
1038 pin: 1 X_IC_13_CD4007.3
\r
1040 net: "XXmux1$XXdecoder$XX0nor$NN" 3 2 0 0 0 0 1
\r
1041 pin: 1 X_IC_2_CD4007.5
\r
1042 pin: 2 X_IC_2_CD4007.8
\r
1043 pin: 3 RX$XXmux1$XXdecoder$XX0nor$RN.2
\r
1044 connect: 1 1 0 1 0
\r
1045 vtx: 1 96520000 99060000 11 0 0 0 0
\r
1047 vtx: 2 91440000 91440000 11 0 0 0 0
\r
1048 connect: 2 2 0 1 0
\r
1049 vtx: 1 104140000 83820000 11 0 0 0 0
\r
1051 vtx: 2 91440000 91440000 11 0 0 0 0
\r
1053 net: "tand3B" 1 0 0 0 0 0 1
\r
1054 pin: 1 X_IC_15_CD4007.6
\r
1056 net: "XXmux2$XXdecoder$XX1sti$PTI_Out" 2 1 0 0 0 0 1
\r
1057 pin: 1 X_IC_3_CD4007.13
\r
1058 pin: 2 RX$XXmux2$XXdecoder$XX1sti$XXinv$RP.1
\r
1059 connect: 1 1 0 1 0
\r
1060 vtx: 1 -62357000 105587800 11 0 0 0 0
\r
1062 vtx: 2 -18846800 61849000 11 0 0 0 0
\r
1064 net: "XXCycle_Up$XXtnor1$NN" 3 2 0 0 0 0 1
\r
1065 pin: 1 X_IC_9_CD4007.5
\r
1066 pin: 2 X_IC_9_CD4007.8
\r
1067 pin: 3 RX$XXCycle_Up$XXtnor1$RN.2
\r
1068 connect: 1 1 0 1 0
\r
1069 vtx: 1 -29006800 21209000 11 0 0 0 0
\r
1071 vtx: 2 -34086800 13589000 11 0 0 0 0
\r
1072 connect: 2 2 0 1 0
\r
1073 vtx: 1 -67437000 -13792200 11 0 0 0 0
\r
1075 vtx: 2 -34086800 13589000 11 0 0 0 0
\r
1077 net: "Xtand1$XXsti_tand$PTI_Out" 2 1 0 0 0 0 1
\r
1078 pin: 1 X_IC_11_CD4007.13
\r
1079 pin: 2 RX$Xtand1$XXsti_tand$XXinv$RP.1
\r
1080 connect: 1 1 0 1 0
\r
1081 vtx: 1 -97917000 92887800 11 0 0 0 0
\r
1083 vtx: 2 -41706800 46609000 11 0 0 0 0
\r
1085 net: "XXmux2$CTRL_A" 4 3 0 0 0 0 1
\r
1086 pin: 1 X_IC_3_CD4007.5
\r
1087 pin: 2 X_IC_4_CD4007.3
\r
1088 pin: 3 X_IC_45_CD4016.12
\r
1089 pin: 4 RX$XXmux2$XXdecoder$XXinti$Xinv$RN.2
\r
1090 connect: 1 1 0 1 0
\r
1091 vtx: 1 -16306800 66929000 11 0 0 0 0
\r
1093 vtx: 2 -11226800 54229000 11 0 0 0 0
\r
1094 connect: 2 3 2 1 0
\r
1095 vtx: 1 -49657000 -31572200 11 0 0 0 0
\r
1097 vtx: 2 27940000 -25400000 11 0 0 0 0
\r
1098 connect: 3 2 0 1 0
\r
1099 vtx: 1 27940000 -25400000 11 0 0 0 0
\r
1101 vtx: 2 -11226800 54229000 11 0 0 0 0
\r
1103 net: "XDecoder$XX1sti$PTI_Out" 2 1 0 0 0 0 1
\r
1104 pin: 1 X_IC_16_CD4007.13
\r
1105 pin: 2 RX$XDecoder$XX1sti$XXinv$RP.1
\r
1106 connect: 1 1 0 1 0
\r
1107 vtx: 1 -97917000 -6172200 11 0 0 0 0
\r
1109 vtx: 2 -41706800 110109000 11 0 0 0 0
\r
1111 net: "XDecoder$XX1pti$STI_Out" 2 1 0 0 0 0 1
\r
1112 pin: 1 RX$XDecoder$XX1pti$Xinv$RP.2
\r
1113 pin: 2 RX$XDecoder$XX1pti$Xinv$RN.1
\r
1114 connect: 1 1 0 1 0
\r
1115 vtx: 1 -97917000 -13792200 11 0 0 0 0
\r
1117 vtx: 2 -85217000 -21412200 11 0 0 0 0
\r
1119 net: "tand2B" 1 0 0 0 0 0 1
\r
1120 pin: 1 X_IC_13_CD4007.6
\r
1122 net: "XXmux2$XXdecoder$XX1pti$STI_Out" 2 1 0 0 0 0 1
\r
1123 pin: 1 RX$XXmux2$XXdecoder$XX1pti$Xinv$RP.2
\r
1124 pin: 2 RX$XXmux2$XXdecoder$XX1pti$Xinv$RN.1
\r
1125 connect: 1 1 0 1 0
\r
1126 vtx: 1 -62357000 97967800 11 0 0 0 0
\r
1128 vtx: 2 -49657000 90347800 11 0 0 0 0
\r
1130 net: "M3q" 3 2 0 0 0 0 1
\r
1131 pin: 1 X_IC_46_CD4016.9
\r
1132 pin: 2 X_IC_46_CD4016.10
\r
1133 pin: 3 X_IC_47_CD4016.2
\r
1134 connect: 1 1 0 1 0
\r
1135 vtx: 1 -56946800 33909000 11 0 0 0 0
\r
1137 vtx: 2 -54406800 33909000 11 0 0 0 0
\r
1138 connect: 2 2 1 1 0
\r
1139 vtx: 1 -64566800 38989000 11 0 0 0 0
\r
1141 vtx: 2 -56946800 33909000 11 0 0 0 0
\r
1143 net: "XXCycle_Up$_IN_PTI" 3 2 0 0 0 0 1
\r
1144 pin: 1 X_IC_8_CD4007.13
\r
1145 pin: 2 X_IC_10_CD4007.6
\r
1146 pin: 3 RX$XXCycle_Up$XXpti$Xinv$RP.1
\r
1147 connect: 1 1 0 1 0
\r
1148 vtx: 1 -31546800 26289000 11 0 0 0 0
\r
1150 vtx: 2 -23926800 8509000 11 0 0 0 0
\r
1151 connect: 2 2 0 1 0
\r
1152 vtx: 1 -67437000 -44272200 11 0 0 0 0
\r
1154 vtx: 2 -23926800 8509000 11 0 0 0 0
\r
1156 net: "XXmux2$CTRL_B" 3 2 0 0 0 0 1
\r
1157 pin: 1 X_IC_46_CD4016.5
\r
1158 pin: 2 RX$XXmux2$XXdecoder$XX0nor$RP.2
\r
1159 pin: 3 RX$XXmux2$XXdecoder$XX0nor$RN.1
\r
1160 connect: 1 2 1 1 0
\r
1161 vtx: 1 -62357000 -16332200 11 0 0 0 0
\r
1163 vtx: 2 -49657000 -23952200 11 0 0 0 0
\r
1164 connect: 2 2 0 1 0
\r
1165 vtx: 1 -62357000 -16332200 11 0 0 0 0
\r
1167 vtx: 2 -56946800 26289000 11 0 0 0 0
\r
1169 net: "XXCycle_Up$XXtnor0$NN" 3 2 0 0 0 0 1
\r
1170 pin: 1 X_IC_10_CD4007.5
\r
1171 pin: 2 X_IC_10_CD4007.8
\r
1172 pin: 3 RX$XXCycle_Up$XXtnor0$RN.2
\r
1173 connect: 1 1 0 1 0
\r
1174 vtx: 1 -29006800 33909000 11 0 0 0 0
\r
1176 vtx: 2 -34086800 26289000 11 0 0 0 0
\r
1177 connect: 2 2 1 1 0
\r
1178 vtx: 1 -85217000 85267800 11 0 0 0 0
\r
1180 vtx: 2 -29006800 33909000 11 0 0 0 0
\r
1182 net: "tand1A" 1 0 0 0 0 0 1
\r
1183 pin: 1 X_IC_12_CD4007.3
\r
1185 net: "XXmux3$XXdecoder$XX1sti$NTI_Out" 2 1 0 0 0 0 1
\r
1186 pin: 1 X_IC_5_CD4007.5
\r
1187 pin: 2 RX$XXmux3$XXdecoder$XX1sti$XXinv$RN.2
\r
1188 connect: 1 1 0 1 0
\r
1189 vtx: 1 -67437000 97967800 11 0 0 0 0
\r
1191 vtx: 2 -11226800 79629000 11 0 0 0 0
\r
1193 net: "XXmux2$CTRL_C" 4 3 0 0 0 0 1
\r
1194 pin: 1 X_IC_4_CD4007.6
\r
1195 pin: 2 X_IC_46_CD4016.13
\r
1196 pin: 3 RX$XXmux2$XXdecoder$XX1sti$XXinv$RP.2
\r
1197 pin: 4 RX$XXmux2$XXdecoder$XX1sti$XXinv$RN.1
\r
1198 connect: 1 3 1 1 0
\r
1199 vtx: 1 -67437000 1447800 11 0 0 0 0
\r
1201 vtx: 2 -64566800 33909000 11 0 0 0 0
\r
1202 connect: 2 2 0 1 0
\r
1203 vtx: 1 -49657000 105587800 11 0 0 0 0
\r
1205 vtx: 2 -8686800 66929000 11 0 0 0 0
\r
1206 connect: 3 1 0 1 0
\r
1207 vtx: 1 -64566800 33909000 11 0 0 0 0
\r
1209 vtx: 2 -8686800 66929000 11 0 0 0 0
\r
1211 net: "M2q" 3 2 0 0 0 0 1
\r
1212 pin: 1 X_IC_45_CD4016.10
\r
1213 pin: 2 X_IC_46_CD4016.2
\r
1214 pin: 3 X_IC_46_CD4016.3
\r
1215 connect: 1 2 1 1 0
\r
1216 vtx: 1 -62026800 26289000 11 0 0 0 0
\r
1218 vtx: 2 -64566800 26289000 11 0 0 0 0
\r
1219 connect: 2 2 0 1 0
\r
1220 vtx: 1 -62026800 26289000 11 0 0 0 0
\r
1222 vtx: 2 33020000 -25400000 11 0 0 0 0
\r
1224 net: "XXmux1$XXdecoder$XX0nor$NP" 2 1 0 0 0 0 1
\r
1225 pin: 1 X_IC_2_CD4007.1
\r
1226 pin: 2 RX$XXmux1$XXdecoder$XX0nor$RP.1
\r
1227 connect: 1 1 0 1 0
\r
1228 vtx: 1 71120000 83820000 11 0 0 0 0
\r
1230 vtx: 2 81280000 91440000 11 0 0 0 0
\r
1232 net: "XXmux3$XXdecoder$XX1pti$NTI_Out" 2 1 0 0 0 0 1
\r
1233 pin: 1 X_IC_5_CD4007.8
\r
1234 pin: 2 RX$XXmux3$XXdecoder$XX1pti$Xinv$RN.2
\r
1235 connect: 1 1 0 1 0
\r
1236 vtx: 1 -67437000 82727800 11 0 0 0 0
\r
1238 vtx: 2 -6146800 87249000 11 0 0 0 0
\r
1240 net: "XXCycle_Up$XXtnor1$NP" 2 1 0 0 0 0 1
\r
1241 pin: 1 X_IC_9_CD4007.1
\r
1242 pin: 2 RX$XXCycle_Up$XXtnor1$RP.1
\r
1243 connect: 1 1 0 1 0
\r
1244 vtx: 1 -80137000 -21412200 11 0 0 0 0
\r
1246 vtx: 2 -44246800 13589000 11 0 0 0 0
\r
1248 net: "tand1B" 1 0 0 0 0 0 1
\r
1249 pin: 1 X_IC_12_CD4007.6
\r
1251 net: "Din" 2 1 0 0 0 0 1
\r
1252 pin: 1 X_IC_14_CD4007.3
\r
1253 pin: 2 X_IC_16_CD4007.3
\r
1254 connect: 1 1 0 1 0
\r
1255 vtx: 1 -39166800 102489000 11 0 0 0 0
\r
1257 vtx: 2 -39166800 77089000 11 0 0 0 0
\r
1259 net: "XXmux3$XXdecoder$XX1sti$PTI_Out" 2 1 0 0 0 0 1
\r
1260 pin: 1 X_IC_5_CD4007.1
\r
1261 pin: 2 RX$XXmux3$XXdecoder$XX1sti$XXinv$RP.1
\r
1262 connect: 1 1 0 1 0
\r
1263 vtx: 1 -80137000 90347800 11 0 0 0 0
\r
1265 vtx: 2 -21386800 79629000 11 0 0 0 0
\r
1267 net: "M1q" 4 3 0 0 0 0 1
\r
1268 pin: 1 X_IC_45_CD4016.2
\r
1269 pin: 2 X_IC_45_CD4016.3
\r
1270 pin: 3 X_IC_45_CD4016.9
\r
1272 connect: 1 1 0 1 0
\r
1273 vtx: 1 27940000 -33020000 11 0 0 0 0
\r
1275 vtx: 2 25400000 -33020000 11 0 0 0 0
\r
1276 connect: 2 2 1 1 0
\r
1277 vtx: 1 35560000 -25400000 11 0 0 0 0
\r
1279 vtx: 2 27940000 -33020000 11 0 0 0 0
\r
1280 connect: 3 3 0 1 0
\r
1281 vtx: 1 -185420000 53340000 11 0 0 0 0
\r
1283 vtx: 2 25400000 -33020000 11 0 0 0 0
\r
1285 net: "Xtand2$XXtnand$NI" 2 1 0 0 0 0 1
\r
1286 pin: 1 X_IC_13_CD4007.4
\r
1287 pin: 2 X_IC_13_CD4007.8
\r
1288 connect: 1 1 0 1 0
\r
1289 vtx: 1 -29006800 72009000 11 0 0 0 0
\r
1291 vtx: 2 -36626800 64389000 11 0 0 0 0
\r
1293 net: "XXmux3$XXdecoder$XX0nor$NI" 2 1 0 0 0 0 1
\r
1294 pin: 1 X_IC_7_CD4007.2
\r
1295 pin: 2 X_IC_7_CD4007.13
\r
1296 connect: 1 1 0 1 0
\r
1297 vtx: 1 83820000 58420000 11 0 0 0 0
\r
1299 vtx: 2 83820000 50800000 11 0 0 0 0
\r
1301 net: "XXCycle_Up$XXtnor0$NP" 2 1 0 0 0 0 1
\r
1302 pin: 1 X_IC_10_CD4007.1
\r
1303 pin: 2 RX$XXCycle_Up$XXtnor0$RP.1
\r
1304 connect: 1 1 0 1 0
\r
1305 vtx: 1 -80137000 -6172200 11 0 0 0 0
\r
1307 vtx: 2 -44246800 26289000 11 0 0 0 0
\r
1309 net: "Xtand3$XXsti_tand$NTI_Out" 2 1 0 0 0 0 1
\r
1310 pin: 1 X_IC_14_CD4007.8
\r
1311 pin: 2 RX$Xtand3$XXsti_tand$XXinv$RN.2
\r
1312 connect: 1 1 0 1 0
\r
1313 vtx: 1 -92837000 115747800 11 0 0 0 0
\r
1315 vtx: 2 -29006800 84709000 11 0 0 0 0
\r
1317 net: "M30" 1 0 0 0 0 0 1
\r
1318 pin: 1 X_IC_47_CD4016.1
\r
1320 net: "XDecoder$XX0nor$NN" 3 2 0 0 0 0 1
\r
1321 pin: 1 X_IC_17_CD4007.5
\r
1322 pin: 2 X_IC_17_CD4007.8
\r
1323 pin: 3 RX$XDecoder$XX0nor$RN.2
\r
1324 connect: 1 1 0 1 0
\r
1325 vtx: 1 -34086800 8509000 11 0 0 0 0
\r
1327 vtx: 2 -39166800 889000 11 0 0 0 0
\r
1328 connect: 2 2 0 1 0
\r
1329 vtx: 1 -108077000 9067800 11 0 0 0 0
\r
1331 vtx: 2 -39166800 889000 11 0 0 0 0
\r
1333 net: "Xtand1$XXtnand$NN" 2 1 0 0 0 0 1
\r
1334 pin: 1 X_IC_12_CD4007.9
\r
1335 pin: 2 RX$Xtand1$XXtnand$RN.2
\r
1336 connect: 1 1 0 1 0
\r
1337 vtx: 1 -90297000 9067800 11 0 0 0 0
\r
1339 vtx: 2 -31546800 59309000 11 0 0 0 0
\r
1341 net: "XXmux1$XXdecoder$XXinti$PTI_Out" 2 1 0 0 0 0 1
\r
1342 pin: 1 X_IC_1_CD4007.13
\r
1343 pin: 2 RX$XXmux1$XXdecoder$XXinti$Xinv$RP.1
\r
1344 connect: 1 1 0 1 0
\r
1345 vtx: 1 -62357000 59867800 11 0 0 0 0
\r
1347 vtx: 2 -18846800 36449000 11 0 0 0 0
\r
1349 net: "XXmux3$XXdecoder$XX1pti$STI_Out" 2 1 0 0 0 0 1
\r
1350 pin: 1 RX$XXmux3$XXdecoder$XX1pti$Xinv$RP.2
\r
1351 pin: 2 RX$XXmux3$XXdecoder$XX1pti$Xinv$RN.1
\r
1352 connect: 1 1 0 1 0
\r
1353 vtx: 1 -80137000 82727800 11 0 0 0 0
\r
1355 vtx: 2 -49657000 -8712200 11 0 0 0 0
\r
1357 net: "M31" 1 0 0 0 0 0 1
\r
1358 pin: 1 X_IC_46_CD4016.11
\r
1360 net: "M20" 1 0 0 0 0 0 1
\r
1361 pin: 1 X_IC_46_CD4016.4
\r
1363 net: "Xtand3$AtnandB" 3 2 0 0 0 0 1
\r
1364 pin: 1 X_IC_14_CD4007.6
\r
1365 pin: 2 RX$Xtand3$XXtnand$RP.2
\r
1366 pin: 3 RX$Xtand3$XXtnand$RN.1
\r
1367 connect: 1 2 1 1 0
\r
1368 vtx: 1 -97917000 -29032200 11 0 0 0 0
\r
1370 vtx: 2 -85217000 -36652200 11 0 0 0 0
\r
1371 connect: 2 2 0 1 0
\r
1372 vtx: 1 -97917000 -29032200 11 0 0 0 0
\r
1374 vtx: 2 -31546800 77089000 11 0 0 0 0
\r
1376 net: "M3S" 2 1 0 0 0 0 1
\r
1377 pin: 1 X_IC_5_CD4007.6
\r
1378 pin: 2 X_IC_6_CD4007.6
\r
1379 connect: 1 1 0 1 0
\r
1380 vtx: 1 -8686800 92329000 11 0 0 0 0
\r
1382 vtx: 2 -8686800 79629000 11 0 0 0 0
\r
1384 net: "XXCycle_Up$XXnti$PTI_Out" 2 1 0 0 0 0 1
\r
1385 pin: 1 X_IC_6_CD4007.1
\r
1386 pin: 2 RX$XXCycle_Up$XXnti$Xinv$RP.1
\r
1387 connect: 1 1 0 1 0
\r
1388 vtx: 1 -67437000 -59512200 11 0 0 0 0
\r
1390 vtx: 2 -21386800 92329000 11 0 0 0 0
\r
1392 net: "tand3Y" 2 1 0 0 0 0 1
\r
1393 pin: 1 RX$Xtand3$XXsti_tand$XXinv$RP.2
\r
1394 pin: 2 RX$Xtand3$XXsti_tand$XXinv$RN.1
\r
1395 connect: 1 1 0 1 0
\r
1396 vtx: 1 -105537000 115747800 11 0 0 0 0
\r
1398 vtx: 2 -92837000 108127800 11 0 0 0 0
\r
1400 net: "M2S" 2 1 0 0 0 0 1
\r
1401 pin: 1 X_IC_1_CD4007.3
\r
1402 pin: 2 X_IC_3_CD4007.3
\r
1403 connect: 1 1 0 1 0
\r
1404 vtx: 1 -16306800 54229000 11 0 0 0 0
\r
1406 vtx: 2 -16306800 28829000 11 0 0 0 0
\r
1408 net: "Xtand3$XXsti_tand$PTI_Out" 2 1 0 0 0 0 1
\r
1409 pin: 1 X_IC_14_CD4007.13
\r
1410 pin: 2 RX$Xtand3$XXsti_tand$XXinv$RP.1
\r
1411 connect: 1 1 0 1 0
\r
1412 vtx: 1 -105537000 108127800 11 0 0 0 0
\r
1414 vtx: 2 -41706800 84709000 11 0 0 0 0
\r
1416 net: "M21" 1 0 0 0 0 0 1
\r
1417 pin: 1 X_IC_46_CD4016.1
\r
1419 net: "XXmux3$CTRL_A" 4 3 0 0 0 0 1
\r
1420 pin: 1 X_IC_6_CD4007.8
\r
1421 pin: 2 X_IC_7_CD4007.3
\r
1422 pin: 3 X_IC_46_CD4016.6
\r
1423 pin: 4 RX$XXmux3$XXdecoder$XXinti$Xinv$RN.2
\r
1424 connect: 1 3 2 1 0
\r
1425 vtx: 1 -72517000 1447800 11 0 0 0 0
\r
1427 vtx: 2 -54406800 26289000 11 0 0 0 0
\r
1428 connect: 2 2 0 1 0
\r
1429 vtx: 1 -54406800 26289000 11 0 0 0 0
\r
1431 vtx: 2 -6146800 99949000 11 0 0 0 0
\r
1432 connect: 3 1 0 1 0
\r
1433 vtx: 1 86360000 50800000 11 0 0 0 0
\r
1435 vtx: 2 -6146800 99949000 11 0 0 0 0
\r
1437 net: "XDecoder$XX0nor$NP" 2 1 0 0 0 0 1
\r
1438 pin: 1 X_IC_17_CD4007.1
\r
1439 pin: 2 RX$XDecoder$XX0nor$RP.1
\r
1440 connect: 1 1 0 1 0
\r
1441 vtx: 1 -120777000 1447800 11 0 0 0 0
\r
1443 vtx: 2 -49326800 889000 11 0 0 0 0
\r
1445 net: "XXmux1$XXdecoder$XXinti$STI_Out" 2 1 0 0 0 0 1
\r
1446 pin: 1 RX$XXmux1$XXdecoder$XXinti$Xinv$RP.2
\r
1447 pin: 2 RX$XXmux1$XXdecoder$XXinti$Xinv$RN.1
\r
1448 connect: 1 1 0 1 0
\r
1449 vtx: 1 -62357000 67487800 11 0 0 0 0
\r
1451 vtx: 2 -49657000 59867800 11 0 0 0 0
\r
1453 net: "M10" 2 1 0 0 0 0 1
\r
1454 pin: 1 X_IC_45_CD4016.8
\r
1456 connect: 1 1 0 1 0
\r
1457 vtx: 1 -193040000 53340000 11 0 0 0 0
\r
1459 vtx: 2 38100000 -25400000 11 0 0 0 0
\r
1461 net: "XXmux1$XXdecoder$IN_pti" 3 2 0 0 0 0 1
\r
1462 pin: 1 X_IC_0_CD4007.3
\r
1463 pin: 2 X_IC_0_CD4007.13
\r
1464 pin: 3 RX$XXmux1$XXdecoder$XX1pti$Xinv$RP.1
\r
1465 connect: 1 1 0 1 0
\r
1466 vtx: 1 104140000 17780000 11 0 0 0 0
\r
1468 vtx: 2 106680000 10160000 11 0 0 0 0
\r
1469 connect: 2 2 1 1 0
\r
1470 vtx: 1 -16637000 118287800 11 0 0 0 0
\r
1472 vtx: 2 104140000 17780000 11 0 0 0 0
\r
1474 net: "Xtand1$XXtnand$NP" 3 2 0 0 0 0 1
\r
1475 pin: 1 X_IC_12_CD4007.1
\r
1476 pin: 2 X_IC_12_CD4007.13
\r
1477 pin: 3 RX$Xtand1$XXtnand$RP.1
\r
1478 connect: 1 1 0 1 0
\r
1479 vtx: 1 -41706800 59309000 11 0 0 0 0
\r
1481 vtx: 2 -44246800 51689000 11 0 0 0 0
\r
1482 connect: 2 2 0 1 0
\r
1483 vtx: 1 -102997000 1447800 11 0 0 0 0
\r
1485 vtx: 2 -44246800 51689000 11 0 0 0 0
\r
1487 net: "tand2Y" 2 1 0 0 0 0 1
\r
1488 pin: 1 RX$Xtand2$XXsti_tand$XXinv$RP.2
\r
1489 pin: 2 RX$Xtand2$XXsti_tand$XXinv$RN.1
\r
1490 connect: 1 1 0 1 0
\r
1491 vtx: 1 -85217000 -59512200 11 0 0 0 0
\r
1493 vtx: 2 -90297000 16687800 11 0 0 0 0
\r
1495 net: "XXmux3$CTRL_B" 3 2 0 0 0 0 1
\r
1496 pin: 1 X_IC_47_CD4016.13
\r
1497 pin: 2 RX$XXmux3$XXdecoder$XX0nor$RP.2
\r
1498 pin: 3 RX$XXmux3$XXdecoder$XX0nor$RN.1
\r
1499 connect: 1 1 0 1 0
\r
1500 vtx: 1 -72517000 9067800 11 0 0 0 0
\r
1502 vtx: 2 -64566800 46609000 11 0 0 0 0
\r
1503 connect: 2 2 0 1 0
\r
1504 vtx: 1 83820000 43180000 11 0 0 0 0
\r
1506 vtx: 2 -64566800 46609000 11 0 0 0 0
\r
1508 net: "M1S" 3 2 0 0 0 0 1
\r
1509 pin: 1 X_IC_0_CD4007.6
\r
1510 pin: 2 X_IC_1_CD4007.6
\r
1512 connect: 1 1 0 1 0
\r
1513 vtx: 1 -8686800 28829000 11 0 0 0 0
\r
1515 vtx: 2 114300000 10160000 11 0 0 0 0
\r
1516 connect: 2 2 1 1 0
\r
1517 vtx: 1 -187960000 53340000 11 0 0 0 0
\r
1519 vtx: 2 -8686800 28829000 11 0 0 0 0
\r
1521 net: "$G_Vdd" 34 33 0 0 0 0 1
\r
1522 pin: 1 V$XXpower$Vdd.1
\r
1523 pin: 2 X_IC_0_CD4007.2
\r
1524 pin: 3 X_IC_0_CD4007.14
\r
1525 pin: 4 X_IC_1_CD4007.2
\r
1526 pin: 5 X_IC_1_CD4007.14
\r
1527 pin: 6 X_IC_2_CD4007.14
\r
1528 pin: 7 X_IC_3_CD4007.2
\r
1529 pin: 8 X_IC_3_CD4007.14
\r
1530 pin: 9 X_IC_4_CD4007.14
\r
1531 pin: 10 X_IC_5_CD4007.2
\r
1532 pin: 11 X_IC_5_CD4007.14
\r
1533 pin: 12 X_IC_6_CD4007.2
\r
1534 pin: 13 X_IC_6_CD4007.14
\r
1535 pin: 14 X_IC_7_CD4007.14
\r
1536 pin: 15 X_IC_8_CD4007.2
\r
1537 pin: 16 X_IC_8_CD4007.14
\r
1538 pin: 17 X_IC_9_CD4007.14
\r
1539 pin: 18 X_IC_10_CD4007.14
\r
1540 pin: 19 X_IC_11_CD4007.2
\r
1541 pin: 20 X_IC_11_CD4007.14
\r
1542 pin: 21 X_IC_12_CD4007.2
\r
1543 pin: 22 X_IC_12_CD4007.14
\r
1544 pin: 23 X_IC_13_CD4007.2
\r
1545 pin: 24 X_IC_13_CD4007.14
\r
1546 pin: 25 X_IC_14_CD4007.2
\r
1547 pin: 26 X_IC_14_CD4007.14
\r
1548 pin: 27 X_IC_15_CD4007.2
\r
1549 pin: 28 X_IC_15_CD4007.14
\r
1550 pin: 29 X_IC_16_CD4007.2
\r
1551 pin: 30 X_IC_16_CD4007.14
\r
1552 pin: 31 X_IC_17_CD4007.14
\r
1553 pin: 32 X_IC_45_CD4016.14
\r
1554 pin: 33 X_IC_46_CD4016.14
\r
1555 pin: 34 X_IC_47_CD4016.14
\r
1556 connect: 1 9 8 1 0
\r
1557 vtx: 1 -18846800 79629000 11 0 0 0 0
\r
1559 vtx: 2 -21386800 74549000 11 0 0 0 0
\r
1560 connect: 2 28 27 1 0
\r
1561 vtx: 1 -41706800 102489000 11 0 0 0 0
\r
1563 vtx: 2 -44246800 97409000 11 0 0 0 0
\r
1564 connect: 3 11 10 1 0
\r
1565 vtx: 1 -18846800 92329000 11 0 0 0 0
\r
1567 vtx: 2 -21386800 87249000 11 0 0 0 0
\r
1568 connect: 4 18 17 1 0
\r
1569 vtx: 1 -41706800 38989000 11 0 0 0 0
\r
1571 vtx: 2 -44246800 33909000 11 0 0 0 0
\r
1572 connect: 5 26 25 1 0
\r
1573 vtx: 1 -41706800 89789000 11 0 0 0 0
\r
1575 vtx: 2 -44246800 84709000 11 0 0 0 0
\r
1576 connect: 6 20 19 1 0
\r
1577 vtx: 1 -41706800 51689000 11 0 0 0 0
\r
1579 vtx: 2 -44246800 46609000 11 0 0 0 0
\r
1580 connect: 7 24 23 1 0
\r
1581 vtx: 1 -41706800 77089000 11 0 0 0 0
\r
1583 vtx: 2 -44246800 72009000 11 0 0 0 0
\r
1584 connect: 8 22 21 1 0
\r
1585 vtx: 1 -41706800 64389000 11 0 0 0 0
\r
1587 vtx: 2 -44246800 59309000 11 0 0 0 0
\r
1588 connect: 9 23 22 1 0
\r
1589 vtx: 1 -44246800 72009000 11 0 0 0 0
\r
1591 vtx: 2 -41706800 64389000 11 0 0 0 0
\r
1592 connect: 10 4 3 1 0
\r
1593 vtx: 1 -21386800 36449000 11 0 0 0 0
\r
1595 vtx: 2 -18846800 28829000 11 0 0 0 0
\r
1596 connect: 11 21 20 1 0
\r
1597 vtx: 1 -44246800 59309000 11 0 0 0 0
\r
1599 vtx: 2 -41706800 51689000 11 0 0 0 0
\r
1600 connect: 12 25 24 1 0
\r
1601 vtx: 1 -44246800 84709000 11 0 0 0 0
\r
1603 vtx: 2 -41706800 77089000 11 0 0 0 0
\r
1604 connect: 13 19 18 1 0
\r
1605 vtx: 1 -44246800 46609000 11 0 0 0 0
\r
1607 vtx: 2 -41706800 38989000 11 0 0 0 0
\r
1608 connect: 14 27 26 1 0
\r
1609 vtx: 1 -44246800 97409000 11 0 0 0 0
\r
1611 vtx: 2 -41706800 89789000 11 0 0 0 0
\r
1612 connect: 15 15 14 1 0
\r
1613 vtx: 1 -26466800 8509000 11 0 0 0 0
\r
1615 vtx: 2 -23926800 889000 11 0 0 0 0
\r
1616 connect: 16 12 11 1 0
\r
1617 vtx: 1 -21386800 99949000 11 0 0 0 0
\r
1619 vtx: 2 -18846800 92329000 11 0 0 0 0
\r
1620 connect: 17 2 1 1 0
\r
1621 vtx: 1 101600000 17780000 11 0 0 0 0
\r
1623 vtx: 2 104140000 10160000 11 0 0 0 0
\r
1624 connect: 18 10 9 1 0
\r
1625 vtx: 1 -21386800 87249000 11 0 0 0 0
\r
1627 vtx: 2 -18846800 79629000 11 0 0 0 0
\r
1628 connect: 19 29 28 1 0
\r
1629 vtx: 1 -44246800 110109000 11 0 0 0 0
\r
1631 vtx: 2 -41706800 102489000 11 0 0 0 0
\r
1632 connect: 20 7 6 1 0
\r
1633 vtx: 1 -21386800 61849000 11 0 0 0 0
\r
1635 vtx: 2 -18846800 54229000 11 0 0 0 0
\r
1636 connect: 21 33 32 1 0
\r
1637 vtx: 1 -67106800 46609000 11 0 0 0 0
\r
1639 vtx: 2 -67106800 33909000 11 0 0 0 0
\r
1640 connect: 22 17 16 1 0
\r
1641 vtx: 1 -44246800 33909000 11 0 0 0 0
\r
1643 vtx: 2 -44246800 21209000 11 0 0 0 0
\r
1644 connect: 23 8 7 1 0
\r
1645 vtx: 1 -21386800 74549000 11 0 0 0 0
\r
1647 vtx: 2 -21386800 61849000 11 0 0 0 0
\r
1648 connect: 24 30 16 1 0
\r
1649 vtx: 1 -49326800 8509000 11 0 0 0 0
\r
1651 vtx: 2 -44246800 21209000 11 0 0 0 0
\r
1652 connect: 25 6 4 1 0
\r
1653 vtx: 1 -18846800 54229000 11 0 0 0 0
\r
1655 vtx: 2 -21386800 36449000 11 0 0 0 0
\r
1656 connect: 26 26 10 1 0
\r
1657 vtx: 1 -41706800 89789000 11 0 0 0 0
\r
1659 vtx: 2 -21386800 87249000 11 0 0 0 0
\r
1660 connect: 27 15 3 1 0
\r
1661 vtx: 1 -26466800 8509000 11 0 0 0 0
\r
1663 vtx: 2 -18846800 28829000 11 0 0 0 0
\r
1664 connect: 28 33 19 1 0
\r
1665 vtx: 1 -67106800 46609000 11 0 0 0 0
\r
1667 vtx: 2 -44246800 46609000 11 0 0 0 0
\r
1668 connect: 29 13 5 1 0
\r
1669 vtx: 1 81280000 58420000 11 0 0 0 0
\r
1671 vtx: 2 81280000 99060000 11 0 0 0 0
\r
1672 connect: 30 13 2 1 0
\r
1673 vtx: 1 81280000 58420000 11 0 0 0 0
\r
1675 vtx: 2 101600000 17780000 11 0 0 0 0
\r
1676 connect: 31 31 14 1 0
\r
1677 vtx: 1 22860000 -25400000 11 0 0 0 0
\r
1679 vtx: 2 -23926800 889000 11 0 0 0 0
\r
1680 connect: 32 31 1 1 0
\r
1681 vtx: 1 22860000 -25400000 11 0 0 0 0
\r
1683 vtx: 2 104140000 10160000 11 0 0 0 0
\r
1684 connect: 33 32 0 1 0
\r
1685 vtx: 1 -67106800 33909000 11 0 0 0 0
\r
1687 vtx: 2 -159181800 -42341800 11 0 0 0 0
\r
1689 net: "$G_Vss" 37 36 0 0 0 0 1
\r
1690 pin: 1 V$XXpower$Vss.2
\r
1691 pin: 2 X_IC_0_CD4007.4
\r
1692 pin: 3 X_IC_0_CD4007.7
\r
1693 pin: 4 X_IC_1_CD4007.4
\r
1694 pin: 5 X_IC_1_CD4007.7
\r
1695 pin: 6 X_IC_2_CD4007.4
\r
1696 pin: 7 X_IC_2_CD4007.7
\r
1697 pin: 8 X_IC_3_CD4007.4
\r
1698 pin: 9 X_IC_3_CD4007.7
\r
1699 pin: 10 X_IC_4_CD4007.4
\r
1700 pin: 11 X_IC_4_CD4007.7
\r
1701 pin: 12 X_IC_5_CD4007.4
\r
1702 pin: 13 X_IC_5_CD4007.7
\r
1703 pin: 14 X_IC_6_CD4007.4
\r
1704 pin: 15 X_IC_6_CD4007.7
\r
1705 pin: 16 X_IC_7_CD4007.4
\r
1706 pin: 17 X_IC_7_CD4007.7
\r
1707 pin: 18 X_IC_8_CD4007.4
\r
1708 pin: 19 X_IC_8_CD4007.7
\r
1709 pin: 20 X_IC_9_CD4007.4
\r
1710 pin: 21 X_IC_9_CD4007.7
\r
1711 pin: 22 X_IC_10_CD4007.4
\r
1712 pin: 23 X_IC_10_CD4007.7
\r
1713 pin: 24 X_IC_11_CD4007.4
\r
1714 pin: 25 X_IC_11_CD4007.7
\r
1715 pin: 26 X_IC_12_CD4007.7
\r
1716 pin: 27 X_IC_13_CD4007.7
\r
1717 pin: 28 X_IC_14_CD4007.4
\r
1718 pin: 29 X_IC_14_CD4007.7
\r
1719 pin: 30 X_IC_15_CD4007.7
\r
1720 pin: 31 X_IC_16_CD4007.4
\r
1721 pin: 32 X_IC_16_CD4007.7
\r
1722 pin: 33 X_IC_17_CD4007.4
\r
1723 pin: 34 X_IC_17_CD4007.7
\r
1724 pin: 35 X_IC_45_CD4016.7
\r
1725 pin: 36 X_IC_46_CD4016.7
\r
1726 pin: 37 X_IC_47_CD4016.7
\r
1727 connect: 1 33 32 1 0
\r
1728 vtx: 1 -34086800 889000 11 0 0 0 0
\r
1730 vtx: 2 -41706800 889000 11 0 0 0 0
\r
1731 connect: 2 31 30 1 0
\r
1732 vtx: 1 -29006800 102489000 11 0 0 0 0
\r
1734 vtx: 2 -36626800 102489000 11 0 0 0 0
\r
1735 connect: 3 2 1 1 0
\r
1736 vtx: 1 116840000 10160000 11 0 0 0 0
\r
1738 vtx: 2 109220000 10160000 11 0 0 0 0
\r
1739 connect: 4 28 27 1 0
\r
1740 vtx: 1 -29006800 77089000 11 0 0 0 0
\r
1742 vtx: 2 -36626800 77089000 11 0 0 0 0
\r
1743 connect: 5 24 23 1 0
\r
1744 vtx: 1 -29006800 38989000 11 0 0 0 0
\r
1746 vtx: 2 -36626800 38989000 11 0 0 0 0
\r
1747 connect: 6 22 21 1 0
\r
1748 vtx: 1 -29006800 26289000 11 0 0 0 0
\r
1750 vtx: 2 -36626800 26289000 11 0 0 0 0
\r
1751 connect: 7 20 19 1 0
\r
1752 vtx: 1 -29006800 13589000 11 0 0 0 0
\r
1754 vtx: 2 -36626800 13589000 11 0 0 0 0
\r
1755 connect: 8 18 17 1 0
\r
1756 vtx: 1 -11226800 889000 11 0 0 0 0
\r
1758 vtx: 2 -18846800 889000 11 0 0 0 0
\r
1759 connect: 9 16 15 1 0
\r
1760 vtx: 1 96520000 50800000 11 0 0 0 0
\r
1762 vtx: 2 88900000 50800000 11 0 0 0 0
\r
1763 connect: 10 4 3 1 0
\r
1764 vtx: 1 -6146800 28829000 11 0 0 0 0
\r
1766 vtx: 2 -13766800 28829000 11 0 0 0 0
\r
1767 connect: 11 14 13 1 0
\r
1768 vtx: 1 -6146800 92329000 11 0 0 0 0
\r
1770 vtx: 2 -13766800 92329000 11 0 0 0 0
\r
1771 connect: 12 12 11 1 0
\r
1772 vtx: 1 -6146800 79629000 11 0 0 0 0
\r
1774 vtx: 2 -13766800 79629000 11 0 0 0 0
\r
1775 connect: 13 10 9 1 0
\r
1776 vtx: 1 -6146800 66929000 11 0 0 0 0
\r
1778 vtx: 2 -13766800 66929000 11 0 0 0 0
\r
1779 connect: 14 8 7 1 0
\r
1780 vtx: 1 -6146800 54229000 11 0 0 0 0
\r
1782 vtx: 2 -13766800 54229000 11 0 0 0 0
\r
1783 connect: 15 6 5 1 0
\r
1784 vtx: 1 96520000 91440000 11 0 0 0 0
\r
1786 vtx: 2 88900000 91440000 11 0 0 0 0
\r
1787 connect: 16 36 35 1 0
\r
1788 vtx: 1 -51866800 38989000 11 0 0 0 0
\r
1790 vtx: 2 -51866800 26289000 11 0 0 0 0
\r
1791 connect: 17 23 21 1 0
\r
1792 vtx: 1 -36626800 38989000 11 0 0 0 0
\r
1794 vtx: 2 -36626800 26289000 11 0 0 0 0
\r
1795 connect: 18 28 26 1 0
\r
1796 vtx: 1 -29006800 77089000 11 0 0 0 0
\r
1798 vtx: 2 -29006800 64389000 11 0 0 0 0
\r
1799 connect: 19 11 9 1 0
\r
1800 vtx: 1 -13766800 79629000 11 0 0 0 0
\r
1802 vtx: 2 -13766800 66929000 11 0 0 0 0
\r
1803 connect: 20 26 25 1 0
\r
1804 vtx: 1 -29006800 64389000 11 0 0 0 0
\r
1806 vtx: 2 -29006800 51689000 11 0 0 0 0
\r
1807 connect: 21 22 20 1 0
\r
1808 vtx: 1 -29006800 26289000 11 0 0 0 0
\r
1810 vtx: 2 -29006800 13589000 11 0 0 0 0
\r
1811 connect: 22 10 8 1 0
\r
1812 vtx: 1 -6146800 66929000 11 0 0 0 0
\r
1814 vtx: 2 -6146800 54229000 11 0 0 0 0
\r
1815 connect: 23 13 11 1 0
\r
1816 vtx: 1 -13766800 92329000 11 0 0 0 0
\r
1818 vtx: 2 -13766800 79629000 11 0 0 0 0
\r
1819 connect: 24 31 29 1 0
\r
1820 vtx: 1 -29006800 102489000 11 0 0 0 0
\r
1822 vtx: 2 -29006800 89789000 11 0 0 0 0
\r
1823 connect: 25 29 28 1 0
\r
1824 vtx: 1 -29006800 89789000 11 0 0 0 0
\r
1826 vtx: 2 -29006800 77089000 11 0 0 0 0
\r
1827 connect: 26 25 24 1 0
\r
1828 vtx: 1 -29006800 51689000 11 0 0 0 0
\r
1830 vtx: 2 -29006800 38989000 11 0 0 0 0
\r
1831 connect: 27 33 19 1 0
\r
1832 vtx: 1 -34086800 889000 11 0 0 0 0
\r
1834 vtx: 2 -36626800 13589000 11 0 0 0 0
\r
1835 connect: 28 35 21 1 0
\r
1836 vtx: 1 -51866800 26289000 11 0 0 0 0
\r
1838 vtx: 2 -36626800 26289000 11 0 0 0 0
\r
1839 connect: 29 33 17 1 0
\r
1840 vtx: 1 -34086800 889000 11 0 0 0 0
\r
1842 vtx: 2 -18846800 889000 11 0 0 0 0
\r
1843 connect: 30 22 3 1 0
\r
1844 vtx: 1 -29006800 26289000 11 0 0 0 0
\r
1846 vtx: 2 -13766800 28829000 11 0 0 0 0
\r
1847 connect: 31 25 7 1 0
\r
1848 vtx: 1 -29006800 51689000 11 0 0 0 0
\r
1850 vtx: 2 -13766800 54229000 11 0 0 0 0
\r
1851 connect: 32 15 5 1 0
\r
1852 vtx: 1 88900000 50800000 11 0 0 0 0
\r
1854 vtx: 2 88900000 91440000 11 0 0 0 0
\r
1855 connect: 33 16 1 1 0
\r
1856 vtx: 1 96520000 50800000 11 0 0 0 0
\r
1858 vtx: 2 109220000 10160000 11 0 0 0 0
\r
1859 connect: 34 34 18 1 0
\r
1860 vtx: 1 38100000 -33020000 11 0 0 0 0
\r
1862 vtx: 2 -11226800 889000 11 0 0 0 0
\r
1863 connect: 35 34 1 1 0
\r
1864 vtx: 1 38100000 -33020000 11 0 0 0 0
\r
1866 vtx: 2 109220000 10160000 11 0 0 0 0
\r
1867 connect: 36 32 0 1 0
\r
1868 vtx: 1 -41706800 889000 11 0 0 0 0
\r
1870 vtx: 2 -159181800 -32181800 11 0 0 0 0
\r
1872 net: "XXCycle_Up$_IN" 4 3 0 0 0 0 1
\r
1873 pin: 1 X_IC_6_CD4007.3
\r
1874 pin: 2 X_IC_8_CD4007.6
\r
1875 pin: 3 RX$XXCycle_Up$XXsti$XXinv$RP.2
\r
1876 pin: 4 RX$XXCycle_Up$XXsti$XXinv$RN.1
\r
1877 connect: 1 3 2 1 0
\r
1878 vtx: 1 -80137000 -29032200 11 0 0 0 0
\r
1880 vtx: 2 -67437000 -36652200 11 0 0 0 0
\r
1881 connect: 2 2 1 1 0
\r
1882 vtx: 1 -67437000 -36652200 11 0 0 0 0
\r
1884 vtx: 2 -13766800 889000 11 0 0 0 0
\r
1885 connect: 3 1 0 1 0
\r
1886 vtx: 1 -13766800 889000 11 0 0 0 0
\r
1888 vtx: 2 -16306800 92329000 11 0 0 0 0
\r
1890 net: "M11" 2 1 0 0 0 0 1
\r
1891 pin: 1 X_IC_45_CD4016.4
\r
1893 connect: 1 1 0 1 0
\r
1894 vtx: 1 -190500000 53340000 11 0 0 0 0
\r
1896 vtx: 2 30480000 -33020000 11 0 0 0 0
\r
1898 net: "XXCycle_Up$XXnti$STI_Out" 2 1 0 0 0 0 1
\r
1899 pin: 1 RX$XXCycle_Up$XXnti$Xinv$RP.2
\r
1900 pin: 2 RX$XXCycle_Up$XXnti$Xinv$RN.1
\r
1901 connect: 1 1 0 1 0
\r
1902 vtx: 1 -67437000 -51892200 11 0 0 0 0
\r
1904 vtx: 2 -54737000 -59512200 11 0 0 0 0
\r
1906 net: "Xtand2$AtnandB" 3 2 0 0 0 0 1
\r
1907 pin: 1 X_IC_11_CD4007.3
\r
1908 pin: 2 RX$Xtand2$XXtnand$RP.2
\r
1909 pin: 3 RX$Xtand2$XXtnand$RN.1
\r
1910 connect: 1 2 1 1 0
\r
1911 vtx: 1 -85217000 -44272200 11 0 0 0 0
\r
1913 vtx: 2 -72517000 -51892200 11 0 0 0 0
\r
1914 connect: 2 2 0 1 0
\r
1915 vtx: 1 -85217000 -44272200 11 0 0 0 0
\r
1917 vtx: 2 -39166800 38989000 11 0 0 0 0
\r
1919 net: "Xtand3$XXtnand$NI" 2 1 0 0 0 0 1
\r
1920 pin: 1 X_IC_15_CD4007.4
\r
1921 pin: 2 X_IC_15_CD4007.8
\r
1922 connect: 1 1 0 1 0
\r
1923 vtx: 1 -29006800 97409000 11 0 0 0 0
\r
1925 vtx: 2 -36626800 89789000 11 0 0 0 0
\r
1927 net: "XDecoder$XXinti$PTI_Out" 2 1 0 0 0 0 1
\r
1928 pin: 1 X_IC_16_CD4007.1
\r
1929 pin: 2 RX$XDecoder$XXinti$Xinv$RP.1
\r
1930 connect: 1 1 0 1 0
\r
1931 vtx: 1 -115697000 92887800 11 0 0 0 0
\r
1933 vtx: 2 -44246800 102489000 11 0 0 0 0
\r
1935 net: "XXmux3$CTRL_C" 4 3 0 0 0 0 1
\r
1936 pin: 1 X_IC_7_CD4007.6
\r
1937 pin: 2 X_IC_46_CD4016.12
\r
1938 pin: 3 RX$XXmux3$XXdecoder$XX1sti$XXinv$RP.2
\r
1939 pin: 4 RX$XXmux3$XXdecoder$XX1sti$XXinv$RN.1
\r
1940 connect: 1 3 2 1 0
\r
1941 vtx: 1 -80137000 97967800 11 0 0 0 0
\r
1943 vtx: 2 -67437000 90347800 11 0 0 0 0
\r
1944 connect: 2 2 1 1 0
\r
1945 vtx: 1 -67437000 90347800 11 0 0 0 0
\r
1947 vtx: 2 -62026800 33909000 11 0 0 0 0
\r
1948 connect: 3 1 0 1 0
\r
1949 vtx: 1 -62026800 33909000 11 0 0 0 0
\r
1951 vtx: 2 93980000 50800000 11 0 0 0 0
\r
1953 net: "Xtand2$XXtnand$NN" 2 1 0 0 0 0 1
\r
1954 pin: 1 X_IC_13_CD4007.9
\r
1955 pin: 2 RX$Xtand2$XXtnand$RN.2
\r
1956 connect: 1 1 0 1 0
\r
1957 vtx: 1 -72517000 -44272200 11 0 0 0 0
\r
1959 vtx: 2 -31546800 72009000 11 0 0 0 0
\r
1961 net: "XXmux2$XXdecoder$XXinti$PTI_Out" 2 1 0 0 0 0 1
\r
1962 pin: 1 X_IC_3_CD4007.1
\r
1963 pin: 2 RX$XXmux2$XXdecoder$XXinti$Xinv$RP.1
\r
1964 connect: 1 1 0 1 0
\r
1965 vtx: 1 -69977000 113207800 11 0 0 0 0
\r
1967 vtx: 2 -21386800 54229000 11 0 0 0 0
\r
1969 net: "XXmux3$XXdecoder$XX0nor$NN" 3 2 0 0 0 0 1
\r
1970 pin: 1 X_IC_7_CD4007.5
\r
1971 pin: 2 X_IC_7_CD4007.8
\r
1972 pin: 3 RX$XXmux3$XXdecoder$XX0nor$RN.2
\r
1973 connect: 1 1 0 1 0
\r
1974 vtx: 1 96520000 58420000 11 0 0 0 0
\r
1976 vtx: 2 91440000 50800000 11 0 0 0 0
\r
1977 connect: 2 2 0 1 0
\r
1978 vtx: 1 96520000 43180000 11 0 0 0 0
\r
1980 vtx: 2 91440000 50800000 11 0 0 0 0
\r
1982 net: "XXmux2$XXdecoder$XX0nor$NI" 2 1 0 0 0 0 1
\r
1983 pin: 1 X_IC_4_CD4007.2
\r
1984 pin: 2 X_IC_4_CD4007.13
\r
1985 connect: 1 1 0 1 0
\r
1986 vtx: 1 -18846800 74549000 11 0 0 0 0
\r
1988 vtx: 2 -18846800 66929000 11 0 0 0 0
\r
1990 net: "tand1Y" 2 1 0 0 0 0 1
\r
1991 pin: 1 RX$Xtand1$XXsti_tand$XXinv$RP.2
\r
1992 pin: 2 RX$Xtand1$XXsti_tand$XXinv$RN.1
\r
1993 connect: 1 1 0 1 0
\r
1994 vtx: 1 -97917000 100507800 11 0 0 0 0
\r
1996 vtx: 2 -85217000 92887800 11 0 0 0 0
\r
1998 net: "XXmux2$XXdecoder$IN_pti" 3 2 0 0 0 0 1
\r
1999 pin: 1 X_IC_1_CD4007.1
\r
2000 pin: 2 X_IC_3_CD4007.6
\r
2001 pin: 3 RX$XXmux2$XXdecoder$XX1pti$Xinv$RP.1
\r
2002 connect: 1 1 0 1 0
\r
2003 vtx: 1 -8686800 54229000 11 0 0 0 0
\r
2005 vtx: 2 -21386800 28829000 11 0 0 0 0
\r
2006 connect: 2 2 1 1 0
\r
2007 vtx: 1 -62357000 90347800 11 0 0 0 0
\r
2009 vtx: 2 -8686800 54229000 11 0 0 0 0
\r
2011 net: "XXCycle_Up$INI" 3 2 0 0 0 0 1
\r
2012 pin: 1 X_IC_9_CD4007.3
\r
2013 pin: 2 RX$XXCycle_Up$XXtnor0$RP.2
\r
2014 pin: 3 RX$XXCycle_Up$XXtnor0$RN.1
\r
2015 connect: 1 1 0 1 0
\r
2016 vtx: 1 -67437000 -6172200 11 0 0 0 0
\r
2018 vtx: 2 -39166800 13589000 11 0 0 0 0
\r
2019 connect: 2 2 0 1 0
\r
2020 vtx: 1 -97917000 85267800 11 0 0 0 0
\r
2022 vtx: 2 -39166800 13589000 11 0 0 0 0
\r
2024 net: "XXmux3$XXdecoder$XX0nor$NP" 2 1 0 0 0 0 1
\r
2025 pin: 1 X_IC_7_CD4007.1
\r
2026 pin: 2 RX$XXmux3$XXdecoder$XX0nor$RP.1
\r
2027 connect: 1 1 0 1 0
\r
2028 vtx: 1 -85217000 9067800 11 0 0 0 0
\r
2030 vtx: 2 81280000 50800000 11 0 0 0 0
\r
2032 net: "XDecoder$XXinti$STI_Out" 2 1 0 0 0 0 1
\r
2033 pin: 1 RX$XDecoder$XXinti$Xinv$RP.2
\r
2034 pin: 2 RX$XDecoder$XXinti$Xinv$RN.1
\r
2035 connect: 1 1 0 1 0
\r
2036 vtx: 1 -115697000 100507800 11 0 0 0 0
\r
2038 vtx: 2 -102997000 92887800 11 0 0 0 0
\r
2040 net: "Dout_0" 2 1 0 0 0 0 1
\r
2041 pin: 1 RX$XDecoder$XX0nor$RP.2
\r
2042 pin: 2 RX$XDecoder$XX0nor$RN.1
\r
2043 connect: 1 1 0 1 0
\r
2044 vtx: 1 -120777000 9067800 11 0 0 0 0
\r
2046 vtx: 2 -108077000 1447800 11 0 0 0 0
\r
2048 net: "XXCycle_Up$XXpti$NTI_Out" 2 1 0 0 0 0 1
\r
2049 pin: 1 X_IC_8_CD4007.8
\r
2050 pin: 2 RX$XXCycle_Up$XXpti$Xinv$RN.2
\r
2051 connect: 1 1 0 1 0
\r
2052 vtx: 1 -75057000 113207800 11 0 0 0 0
\r
2054 vtx: 2 -11226800 8509000 11 0 0 0 0
\r
2056 net: "XXmux2$XXdecoder$XXinti$STI_Out" 2 1 0 0 0 0 1
\r
2057 pin: 1 RX$XXmux2$XXdecoder$XXinti$Xinv$RP.2
\r
2058 pin: 2 RX$XXmux2$XXdecoder$XXinti$Xinv$RN.1
\r
2059 connect: 1 1 0 1 0
\r
2060 vtx: 1 -62357000 -31572200 11 0 0 0 0
\r
2062 vtx: 2 -57277000 113207800 11 0 0 0 0
\r
2064 net: "M3i" 1 0 0 0 0 0 1
\r
2065 pin: 1 X_IC_46_CD4016.8
\r
2067 net: "CU_In" 1 0 0 0 0 0 1
\r
2068 pin: 1 X_IC_8_CD4007.3
\r
2070 net: "Xtand2$XXsti_tand$NTI_Out" 2 1 0 0 0 0 1
\r
2071 pin: 1 X_IC_11_CD4007.5
\r
2072 pin: 2 RX$Xtand2$XXsti_tand$XXinv$RN.2
\r
2073 connect: 1 1 0 1 0
\r
2074 vtx: 1 -72517000 -59512200 11 0 0 0 0
\r
2076 vtx: 2 -34086800 38989000 11 0 0 0 0
\r
2078 net: "XXCycle_Up$XXsti$NTI_Out" 2 1 0 0 0 0 1
\r
2079 pin: 1 X_IC_8_CD4007.5
\r
2080 pin: 2 RX$XXCycle_Up$XXsti$XXinv$RN.2
\r
2081 connect: 1 1 0 1 0
\r
2082 vtx: 1 -67437000 -29032200 11 0 0 0 0
\r
2084 vtx: 2 -16306800 889000 11 0 0 0 0
\r
2086 net: "Xtand2$XXtnand$NP" 3 2 0 0 0 0 1
\r
2087 pin: 1 X_IC_13_CD4007.1
\r
2088 pin: 2 X_IC_13_CD4007.13
\r
2089 pin: 3 RX$Xtand2$XXtnand$RP.1
\r
2090 connect: 1 1 0 1 0
\r
2091 vtx: 1 -41706800 72009000 11 0 0 0 0
\r
2093 vtx: 2 -44246800 64389000 11 0 0 0 0
\r
2094 connect: 2 2 0 1 0
\r
2095 vtx: 1 -85217000 -51892200 11 0 0 0 0
\r
2097 vtx: 2 -44246800 64389000 11 0 0 0 0
\r
2099 net: "XXmux1$CTRL_A" 4 3 0 0 0 0 1
\r
2100 pin: 1 X_IC_1_CD4007.8
\r
2101 pin: 2 X_IC_2_CD4007.3
\r
2102 pin: 3 X_IC_45_CD4016.13
\r
2103 pin: 4 RX$XXmux1$XXdecoder$XXinti$Xinv$RN.2
\r
2104 connect: 1 3 0 1 0
\r
2105 vtx: 1 -49657000 67487800 11 0 0 0 0
\r
2107 vtx: 2 -6146800 36449000 11 0 0 0 0
\r
2108 connect: 2 2 0 1 0
\r
2109 vtx: 1 25400000 -25400000 11 0 0 0 0
\r
2111 vtx: 2 -6146800 36449000 11 0 0 0 0
\r
2112 connect: 3 1 0 1 0
\r
2113 vtx: 1 86360000 91440000 11 0 0 0 0
\r
2115 vtx: 2 -6146800 36449000 11 0 0 0 0
\r
2117 net: "XXmux1$XXdecoder$XX1pti$NTI_Out" 2 1 0 0 0 0 1
\r
2118 pin: 1 X_IC_0_CD4007.8
\r
2119 pin: 2 RX$XXmux1$XXdecoder$XX1pti$Xinv$RN.2
\r
2120 connect: 1 1 0 1 0
\r
2121 vtx: 1 -21717000 118287800 11 0 0 0 0
\r
2123 vtx: 2 116840000 17780000 11 0 0 0 0
\r
2125 net: "Xtand2$XXsti_tand$PTI_Out" 2 1 0 0 0 0 1
\r
2126 pin: 1 X_IC_11_CD4007.1
\r
2127 pin: 2 RX$Xtand2$XXsti_tand$XXinv$RP.1
\r
2128 connect: 1 1 0 1 0
\r
2129 vtx: 1 -102997000 16687800 11 0 0 0 0
\r
2131 vtx: 2 -44246800 38989000 11 0 0 0 0
\r
2133 net: "XXmux1$XXdecoder$XX1sti$NTI_Out" 2 1 0 0 0 0 1
\r
2134 pin: 1 X_IC_0_CD4007.5
\r
2135 pin: 2 RX$XXmux1$XXdecoder$XX1sti$XXinv$RN.2
\r
2136 connect: 1 1 0 1 0
\r
2137 vtx: 1 -49657000 52247800 11 0 0 0 0
\r
2139 vtx: 2 111760000 10160000 11 0 0 0 0
\r
2141 net: "Dout_1" 3 2 0 0 0 0 1
\r
2142 pin: 1 X_IC_17_CD4007.6
\r
2143 pin: 2 RX$XDecoder$XX1sti$XXinv$RP.2
\r
2144 pin: 3 RX$XDecoder$XX1sti$XXinv$RN.1
\r
2145 connect: 1 1 0 1 0
\r
2146 vtx: 1 -85217000 -6172200 11 0 0 0 0
\r
2148 vtx: 2 -36626800 889000 11 0 0 0 0
\r
2149 connect: 2 2 1 1 0
\r
2150 vtx: 1 -115697000 85267800 11 0 0 0 0
\r
2152 vtx: 2 -85217000 -6172200 11 0 0 0 0
\r
2154 net: "XXmux3$XXdecoder$XXinti$PTI_Out" 2 1 0 0 0 0 1
\r
2155 pin: 1 X_IC_6_CD4007.13
\r
2156 pin: 2 RX$XXmux3$XXdecoder$XXinti$Xinv$RP.1
\r
2157 connect: 1 1 0 1 0
\r
2158 vtx: 1 -80137000 105587800 11 0 0 0 0
\r
2160 vtx: 2 -18846800 99949000 11 0 0 0 0
\r
2162 net: "M2i" 1 0 0 0 0 0 1
\r
2163 pin: 1 X_IC_45_CD4016.11
\r
2165 net: "XDecoder$IN_pti" 3 2 0 0 0 0 1
\r
2166 pin: 1 X_IC_14_CD4007.1
\r
2167 pin: 2 X_IC_16_CD4007.6
\r
2168 pin: 3 RX$XDecoder$XX1pti$Xinv$RP.1
\r
2169 connect: 1 1 0 1 0
\r
2170 vtx: 1 -31546800 102489000 11 0 0 0 0
\r
2172 vtx: 2 -44246800 77089000 11 0 0 0 0
\r
2173 connect: 2 2 0 1 0
\r
2174 vtx: 1 -97917000 -21412200 11 0 0 0 0
\r
2176 vtx: 2 -44246800 77089000 11 0 0 0 0
\r
2178 net: "XXmux1$CTRL_B" 3 2 0 0 0 0 1
\r
2179 pin: 1 X_IC_45_CD4016.6
\r
2180 pin: 2 RX$XXmux1$XXdecoder$XX0nor$RP.2
\r
2181 pin: 3 RX$XXmux1$XXdecoder$XX0nor$RN.1
\r
2182 connect: 1 2 1 1 0
\r
2183 vtx: 1 91440000 83820000 11 0 0 0 0
\r
2185 vtx: 2 83820000 83820000 11 0 0 0 0
\r
2186 connect: 2 1 0 1 0
\r
2187 vtx: 1 83820000 83820000 11 0 0 0 0
\r
2189 vtx: 2 35560000 -33020000 11 0 0 0 0
\r
2191 net: "XXCycle_Up$XXsti$PTI_Out" 2 1 0 0 0 0 1
\r
2192 pin: 1 X_IC_8_CD4007.1
\r
2193 pin: 2 RX$XXCycle_Up$XXsti$XXinv$RP.1
\r
2194 connect: 1 1 0 1 0
\r
2195 vtx: 1 -80137000 -36652200 11 0 0 0 0
\r
2197 vtx: 2 -26466800 889000 11 0 0 0 0
\r
2199 net: "0" 3 2 0 0 0 0 1
\r
2200 pin: 1 V$XXpower$Vdd.2
\r
2201 pin: 2 V$XXpower$Vss.1
\r
2202 pin: 3 X_IC_10_CD4007.3
\r
2203 connect: 1 1 0 1 0
\r
2204 vtx: 1 -159181800 -34721800 11 0 0 0 0
\r
2206 vtx: 2 -159181800 -39801800 11 0 0 0 0
\r
2207 connect: 2 2 1 1 0
\r
2208 vtx: 1 -39166800 26289000 11 0 0 0 0
\r
2210 vtx: 2 -159181800 -34721800 11 0 0 0 0
\r
2212 net: "XXCycle_Up$XXtnor1$NI" 2 1 0 0 0 0 1
\r
2213 pin: 1 X_IC_9_CD4007.2
\r
2214 pin: 2 X_IC_9_CD4007.13
\r
2215 connect: 1 1 0 1 0
\r
2216 vtx: 1 -41706800 21209000 11 0 0 0 0
\r
2218 vtx: 2 -41706800 13589000 11 0 0 0 0
\r
2220 net: "XXmux1$XXdecoder$XX0nor$NI" 2 1 0 0 0 0 1
\r
2221 pin: 1 X_IC_2_CD4007.2
\r
2222 pin: 2 X_IC_2_CD4007.13
\r
2223 connect: 1 1 0 1 0
\r
2224 vtx: 1 83820000 99060000 11 0 0 0 0
\r
2226 vtx: 2 83820000 91440000 11 0 0 0 0
\r
2228 net: "M1i" 2 1 0 0 0 0 1
\r
2229 pin: 1 X_IC_45_CD4016.1
\r
2231 connect: 1 1 0 1 0
\r
2232 vtx: 1 -195580000 53340000 11 0 0 0 0
\r
2234 vtx: 2 22860000 -33020000 11 0 0 0 0
\r
2236 net: "Xtand1$AtnandB" 3 2 0 0 0 0 1
\r
2237 pin: 1 X_IC_11_CD4007.6
\r
2238 pin: 2 RX$Xtand1$XXtnand$RP.2
\r
2239 pin: 3 RX$Xtand1$XXtnand$RN.1
\r
2240 connect: 1 2 1 1 0
\r
2241 vtx: 1 -102997000 9067800 11 0 0 0 0
\r
2243 vtx: 2 -90297000 1447800 11 0 0 0 0
\r
2244 connect: 2 1 0 1 0
\r
2245 vtx: 1 -90297000 1447800 11 0 0 0 0
\r
2247 vtx: 2 -31546800 38989000 11 0 0 0 0
\r
2249 net: "XXmux3$XXdecoder$IN_pti" 3 2 0 0 0 0 1
\r
2250 pin: 1 X_IC_5_CD4007.3
\r
2251 pin: 2 X_IC_5_CD4007.13
\r
2252 pin: 3 RX$XXmux3$XXdecoder$XX1pti$Xinv$RP.1
\r
2253 connect: 1 1 0 1 0
\r
2254 vtx: 1 -18846800 87249000 11 0 0 0 0
\r
2256 vtx: 2 -16306800 79629000 11 0 0 0 0
\r
2257 connect: 2 2 0 1 0
\r
2258 vtx: 1 -62357000 -8712200 11 0 0 0 0
\r
2260 vtx: 2 -16306800 79629000 11 0 0 0 0
\r
2262 net: "XXmux1$CTRL_C" 4 3 0 0 0 0 1
\r
2263 pin: 1 X_IC_2_CD4007.6
\r
2264 pin: 2 X_IC_45_CD4016.5
\r
2265 pin: 3 RX$XXmux1$XXdecoder$XX1sti$XXinv$RP.2
\r
2266 pin: 4 RX$XXmux1$XXdecoder$XX1sti$XXinv$RN.1
\r
2267 connect: 1 3 2 1 0
\r
2268 vtx: 1 -62357000 52247800 11 0 0 0 0
\r
2270 vtx: 2 -39497000 115747800 11 0 0 0 0
\r
2271 connect: 2 3 1 1 0
\r
2272 vtx: 1 -62357000 52247800 11 0 0 0 0
\r
2274 vtx: 2 33020000 -33020000 11 0 0 0 0
\r
2275 connect: 3 2 0 1 0
\r
2276 vtx: 1 -39497000 115747800 11 0 0 0 0
\r
2278 vtx: 2 93980000 91440000 11 0 0 0 0
\r
2280 net: "XXmux1$XXdecoder$XX1sti$PTI_Out" 2 1 0 0 0 0 1
\r
2281 pin: 1 X_IC_0_CD4007.1
\r
2282 pin: 2 RX$XXmux1$XXdecoder$XX1sti$XXinv$RP.1
\r
2283 connect: 1 1 0 1 0
\r
2284 vtx: 1 -52197000 115747800 11 0 0 0 0
\r
2286 vtx: 2 101600000 10160000 11 0 0 0 0
\r
2288 net: "XXmux3$XXdecoder$XXinti$STI_Out" 2 1 0 0 0 0 1
\r
2289 pin: 1 RX$XXmux3$XXdecoder$XXinti$Xinv$RP.2
\r
2290 pin: 2 RX$XXmux3$XXdecoder$XXinti$Xinv$RN.1
\r
2291 connect: 1 1 0 1 0
\r
2292 vtx: 1 -85217000 1447800 11 0 0 0 0
\r
2294 vtx: 2 -67437000 105587800 11 0 0 0 0
\r
2296 net: "XXmux2$XXdecoder$XX0nor$NN" 3 2 0 0 0 0 1
\r
2297 pin: 1 X_IC_4_CD4007.5
\r
2298 pin: 2 X_IC_4_CD4007.8
\r
2299 pin: 3 RX$XXmux2$XXdecoder$XX0nor$RN.2
\r
2300 connect: 1 1 0 1 0
\r
2301 vtx: 1 -6146800 74549000 11 0 0 0 0
\r
2303 vtx: 2 -11226800 66929000 11 0 0 0 0
\r
2304 connect: 2 2 0 1 0
\r
2305 vtx: 1 -49657000 -16332200 11 0 0 0 0
\r
2307 vtx: 2 -11226800 66929000 11 0 0 0 0
\r
2309 net: "Xtand3$XXtnand$NN" 2 1 0 0 0 0 1
\r
2310 pin: 1 X_IC_15_CD4007.9
\r
2311 pin: 2 RX$Xtand3$XXtnand$RN.2
\r
2312 connect: 1 1 0 1 0
\r
2313 vtx: 1 -85217000 -29032200 11 0 0 0 0
\r
2315 vtx: 2 -31546800 97409000 11 0 0 0 0
\r
2317 net: "XXCycle_Up$XXpti$STI_Out" 2 1 0 0 0 0 1
\r
2318 pin: 1 RX$XXCycle_Up$XXpti$Xinv$RP.2
\r
2319 pin: 2 RX$XXCycle_Up$XXpti$Xinv$RN.1
\r
2320 connect: 1 1 0 1 0
\r
2321 vtx: 1 -87757000 113207800 11 0 0 0 0
\r
2323 vtx: 2 -54737000 -44272200 11 0 0 0 0
\r
2325 net: "XXCycle_Up$XXtnor0$NI" 2 1 0 0 0 0 1
\r
2326 pin: 1 X_IC_10_CD4007.2
\r
2327 pin: 2 X_IC_10_CD4007.13
\r
2328 connect: 1 1 0 1 0
\r
2329 vtx: 1 -41706800 33909000 11 0 0 0 0
\r
2331 vtx: 2 -41706800 26289000 11 0 0 0 0
\r
2333 net: "XXmux1$XXdecoder$XX1pti$STI_Out" 2 1 0 0 0 0 1
\r
2334 pin: 1 RX$XXmux1$XXdecoder$XX1pti$Xinv$RP.2
\r
2335 pin: 2 RX$XXmux1$XXdecoder$XX1pti$Xinv$RN.1
\r
2336 connect: 1 1 0 1 0
\r
2337 vtx: 1 -34417000 118287800 11 0 0 0 0
\r
2339 vtx: 2 -3937000 118287800 11 0 0 0 0
\r