riscv: Support $ in identifiers in extended asm.
[tinycc.git] / riscv64-tok.h
blob5c380c6bf9362c9ee84f5794d102c038fe6bff5e
1 /* ------------------------------------------------------------------ */
2 /* WARNING: relative order of tokens is important. */
4 /*
5 * The specifications are available under https://riscv.org/technical/specifications/
6 */
8 #define DEF_ASM_WITH_SUFFIX(x, y) \
9 DEF(TOK_ASM_ ## x ## _ ## y, #x "." #y)
11 /* register */
12 /* integer */
13 DEF_ASM(x0)
14 DEF_ASM(x1)
15 DEF_ASM(x2)
16 DEF_ASM(x3)
17 DEF_ASM(x4)
18 DEF_ASM(x5)
19 DEF_ASM(x6)
20 DEF_ASM(x7)
21 DEF_ASM(x8)
22 DEF_ASM(x9)
23 DEF_ASM(x10)
24 DEF_ASM(x11)
25 DEF_ASM(x12)
26 DEF_ASM(x13)
27 DEF_ASM(x14)
28 DEF_ASM(x15)
29 DEF_ASM(x16)
30 DEF_ASM(x17)
31 DEF_ASM(x18)
32 DEF_ASM(x19)
33 DEF_ASM(x20)
34 DEF_ASM(x21)
35 DEF_ASM(x22)
36 DEF_ASM(x23)
37 DEF_ASM(x24)
38 DEF_ASM(x25)
39 DEF_ASM(x26)
40 DEF_ASM(x27)
41 DEF_ASM(x28)
42 DEF_ASM(x29)
43 DEF_ASM(x30)
44 DEF_ASM(x31)
45 /* float */
46 DEF_ASM(f0)
47 DEF_ASM(f1)
48 DEF_ASM(f2)
49 DEF_ASM(f3)
50 DEF_ASM(f4)
51 DEF_ASM(f5)
52 DEF_ASM(f6)
53 DEF_ASM(f7)
54 DEF_ASM(f8)
55 DEF_ASM(f9)
56 DEF_ASM(f10)
57 DEF_ASM(f11)
58 DEF_ASM(f12)
59 DEF_ASM(f13)
60 DEF_ASM(f14)
61 DEF_ASM(f15)
62 DEF_ASM(f16)
63 DEF_ASM(f17)
64 DEF_ASM(f18)
65 DEF_ASM(f19)
66 DEF_ASM(f20)
67 DEF_ASM(f21)
68 DEF_ASM(f22)
69 DEF_ASM(f23)
70 DEF_ASM(f24)
71 DEF_ASM(f25)
72 DEF_ASM(f26)
73 DEF_ASM(f27)
74 DEF_ASM(f28)
75 DEF_ASM(f29)
76 DEF_ASM(f30)
77 DEF_ASM(f31)
79 /* register ABI mnemonics, refer to RISC-V ABI 1.0 */
80 /* integer */
81 DEF_ASM(zero)
82 DEF_ASM(ra)
83 DEF_ASM(sp)
84 DEF_ASM(gp)
85 DEF_ASM(tp)
86 DEF_ASM(t0)
87 DEF_ASM(t1)
88 DEF_ASM(t2)
89 DEF_ASM(s0)
90 DEF_ASM(s1)
91 DEF_ASM(a0)
92 DEF_ASM(a1)
93 DEF_ASM(a2)
94 DEF_ASM(a3)
95 DEF_ASM(a4)
96 DEF_ASM(a5)
97 DEF_ASM(a6)
98 DEF_ASM(a7)
99 DEF_ASM(s2)
100 DEF_ASM(s3)
101 DEF_ASM(s4)
102 DEF_ASM(s5)
103 DEF_ASM(s6)
104 DEF_ASM(s7)
105 DEF_ASM(s8)
106 DEF_ASM(s9)
107 DEF_ASM(s10)
108 DEF_ASM(s11)
109 DEF_ASM(t3)
110 DEF_ASM(t4)
111 DEF_ASM(t5)
112 DEF_ASM(t6)
113 /* float */
114 DEF_ASM(ft0)
115 DEF_ASM(ft1)
116 DEF_ASM(ft2)
117 DEF_ASM(ft3)
118 DEF_ASM(ft4)
119 DEF_ASM(ft5)
120 DEF_ASM(ft6)
121 DEF_ASM(ft7)
122 DEF_ASM(fs0)
123 DEF_ASM(fs1)
124 DEF_ASM(fa0)
125 DEF_ASM(fa1)
126 DEF_ASM(fa2)
127 DEF_ASM(fa3)
128 DEF_ASM(fa4)
129 DEF_ASM(fa5)
130 DEF_ASM(fa6)
131 DEF_ASM(fa7)
132 DEF_ASM(fs2)
133 DEF_ASM(fs3)
134 DEF_ASM(fs4)
135 DEF_ASM(fs5)
136 DEF_ASM(fs6)
137 DEF_ASM(fs7)
138 DEF_ASM(fs8)
139 DEF_ASM(fs9)
140 DEF_ASM(fs10)
141 DEF_ASM(fs11)
142 DEF_ASM(ft8)
143 DEF_ASM(ft9)
144 DEF_ASM(ft10)
145 DEF_ASM(ft11)
146 /* not in the ABI */
147 DEF_ASM(pc)
149 /* Loads */
151 DEF_ASM(lb)
152 DEF_ASM(lh)
153 DEF_ASM(lw)
154 DEF_ASM(lbu)
155 DEF_ASM(lhu)
156 /* RV64 */
157 DEF_ASM(ld)
158 DEF_ASM(lwu)
160 /* Stores */
162 DEF_ASM(sb)
163 DEF_ASM(sh)
164 DEF_ASM(sw)
165 /* RV64 */
166 DEF_ASM(sd)
168 /* Shifts */
170 DEF_ASM(sll)
171 DEF_ASM(srl)
172 DEF_ASM(sra)
173 /* RV64 */
174 DEF_ASM(slli)
175 DEF_ASM(srli)
176 DEF_ASM(sllw)
177 DEF_ASM(slliw)
178 DEF_ASM(srlw)
179 DEF_ASM(srliw)
180 DEF_ASM(srai)
181 DEF_ASM(sraw)
182 DEF_ASM(sraiw)
184 /* Arithmetic */
186 DEF_ASM(add)
187 DEF_ASM(addi)
188 DEF_ASM(sub)
189 DEF_ASM(lui)
190 DEF_ASM(auipc)
191 /* RV64 */
192 DEF_ASM(addw)
193 DEF_ASM(addiw)
194 DEF_ASM(subw)
196 /* Logical */
198 DEF_ASM(xor)
199 DEF_ASM(xori)
200 DEF_ASM(or)
201 DEF_ASM(ori)
202 DEF_ASM(and)
203 DEF_ASM(andi)
205 /* Compare */
207 DEF_ASM(slt)
208 DEF_ASM(slti)
209 DEF_ASM(sltu)
210 DEF_ASM(sltiu)
212 /* Branch */
214 DEF_ASM(beq)
215 DEF_ASM(bne)
216 DEF_ASM(blt)
217 DEF_ASM(bge)
218 DEF_ASM(bltu)
219 DEF_ASM(bgeu)
221 /* Jump */
223 DEF_ASM(jal)
224 DEF_ASM(jalr)
226 /* Sync */
228 DEF_ASM(fence)
229 /* Zifencei extension */
230 DEF_ASM_WITH_SUFFIX(fence, i)
232 /* System call */
234 /* used to be called scall and sbreak */
235 DEF_ASM(ecall)
236 DEF_ASM(ebreak)
238 /* Counters */
240 DEF_ASM(rdcycle)
241 DEF_ASM(rdcycleh)
242 DEF_ASM(rdtime)
243 DEF_ASM(rdtimeh)
244 DEF_ASM(rdinstret)
245 DEF_ASM(rdinstreth)
247 /* “M” Standard Extension for Integer Multiplication and Division, V2.0 */
248 DEF_ASM(mul)
249 DEF_ASM(mulh)
250 DEF_ASM(mulhsu)
251 DEF_ASM(mulhu)
252 DEF_ASM(div)
253 DEF_ASM(divu)
254 DEF_ASM(rem)
255 DEF_ASM(remu)
256 /* RV64 */
257 DEF_ASM(mulw)
258 DEF_ASM(divw)
259 DEF_ASM(divuw)
260 DEF_ASM(remw)
261 DEF_ASM(remuw)
263 /* "C" Extension for Compressed Instructions, V2.0 */
264 DEF_ASM_WITH_SUFFIX(c, nop)
265 /* Loads */
266 DEF_ASM_WITH_SUFFIX(c, li)
267 DEF_ASM_WITH_SUFFIX(c, lw)
268 DEF_ASM_WITH_SUFFIX(c, lwsp)
269 /* single float */
270 DEF_ASM_WITH_SUFFIX(c, flw)
271 DEF_ASM_WITH_SUFFIX(c, flwsp)
272 /* double float */
273 DEF_ASM_WITH_SUFFIX(c, fld)
274 DEF_ASM_WITH_SUFFIX(c, fldsp)
275 /* RV64 */
276 DEF_ASM_WITH_SUFFIX(c, ld)
277 DEF_ASM_WITH_SUFFIX(c, ldsp)
279 /* Stores */
281 DEF_ASM_WITH_SUFFIX(c, sw)
282 DEF_ASM_WITH_SUFFIX(c, sd)
283 DEF_ASM_WITH_SUFFIX(c, swsp)
284 DEF_ASM_WITH_SUFFIX(c, sdsp)
285 /* single float */
286 DEF_ASM_WITH_SUFFIX(c, fsw)
287 DEF_ASM_WITH_SUFFIX(c, fswsp)
288 /* double float */
289 DEF_ASM_WITH_SUFFIX(c, fsd)
290 DEF_ASM_WITH_SUFFIX(c, fsdsp)
292 /* Shifts */
293 DEF_ASM_WITH_SUFFIX(c, slli)
294 DEF_ASM_WITH_SUFFIX(c, srli)
295 DEF_ASM_WITH_SUFFIX(c, srai)
297 /* Arithmetic */
298 DEF_ASM_WITH_SUFFIX(c, add)
299 DEF_ASM_WITH_SUFFIX(c, addi)
300 DEF_ASM_WITH_SUFFIX(c, addi16sp)
301 DEF_ASM_WITH_SUFFIX(c, addi4spn)
302 DEF_ASM_WITH_SUFFIX(c, lui)
303 DEF_ASM_WITH_SUFFIX(c, sub)
304 DEF_ASM_WITH_SUFFIX(c, mv)
305 /* RV64 */
306 DEF_ASM_WITH_SUFFIX(c, addw)
307 DEF_ASM_WITH_SUFFIX(c, addiw)
308 DEF_ASM_WITH_SUFFIX(c, subw)
310 /* Logical */
311 DEF_ASM_WITH_SUFFIX(c, xor)
312 DEF_ASM_WITH_SUFFIX(c, or)
313 DEF_ASM_WITH_SUFFIX(c, and)
314 DEF_ASM_WITH_SUFFIX(c, andi)
316 /* Branch */
317 DEF_ASM_WITH_SUFFIX(c, beqz)
318 DEF_ASM_WITH_SUFFIX(c, bnez)
320 /* Jump */
321 DEF_ASM_WITH_SUFFIX(c, j)
322 DEF_ASM_WITH_SUFFIX(c, jr)
323 DEF_ASM_WITH_SUFFIX(c, jal)
324 DEF_ASM_WITH_SUFFIX(c, jalr)
326 /* System call */
327 DEF_ASM_WITH_SUFFIX(c, ebreak)
329 /* XXX F Extension: Single-Precision Floating Point */
330 /* XXX D Extension: Double-Precision Floating Point */
331 /* from the spec: Tables 16.5–16.7 list the RVC instructions. */
333 /* “Zicsr”, Control and Status Register (CSR) Instructions, V2.0 */
334 DEF_ASM(csrrw)
335 DEF_ASM(csrrs)
336 DEF_ASM(csrrc)
337 DEF_ASM(csrrwi)
338 DEF_ASM(csrrsi)
339 DEF_ASM(csrrci)
340 /* registers */
341 DEF_ASM(cycle)
342 DEF_ASM(fcsr)
343 DEF_ASM(fflags)
344 DEF_ASM(frm)
345 DEF_ASM(instret)
346 DEF_ASM(time)
347 /* RV32I-only */
348 DEF_ASM(cycleh)
349 DEF_ASM(instreth)
350 DEF_ASM(timeh)
351 /* pseudo */
352 DEF_ASM(csrc)
353 DEF_ASM(csrci)
354 DEF_ASM(csrr)
355 DEF_ASM(csrs)
356 DEF_ASM(csrsi)
357 DEF_ASM(csrw)
358 DEF_ASM(csrwi)
359 DEF_ASM(frcsr)
360 DEF_ASM(frflags)
361 DEF_ASM(frrm)
362 DEF_ASM(fscsr)
363 DEF_ASM(fsflags)
364 DEF_ASM(fsrm)
366 /* Privileged Instructions */
368 DEF_ASM(mrts)
369 DEF_ASM(mrth)
370 DEF_ASM(hrts)
371 DEF_ASM(wfi)
373 /* pseudoinstructions */
374 DEF_ASM(beqz)
375 DEF_ASM(bgez)
376 DEF_ASM(bgt)
377 DEF_ASM(bgtu)
378 DEF_ASM(bgtz)
379 DEF_ASM(ble)
380 DEF_ASM(bleu)
381 DEF_ASM(blez)
382 DEF_ASM(bltz)
383 DEF_ASM(bnez)
384 DEF_ASM(call)
385 DEF_ASM_WITH_SUFFIX(fabs, d)
386 DEF_ASM_WITH_SUFFIX(fabs, s)
387 DEF_ASM(fld)
388 DEF_ASM(flw)
389 DEF_ASM_WITH_SUFFIX(fmv, d)
390 DEF_ASM_WITH_SUFFIX(fmv, s)
391 DEF_ASM_WITH_SUFFIX(fneg, d)
392 DEF_ASM_WITH_SUFFIX(fneg, s)
393 DEF_ASM(fsd)
394 DEF_ASM(fsw)
395 DEF_ASM(j)
396 DEF_ASM(jump)
397 DEF_ASM(jr)
398 DEF_ASM(la)
399 DEF_ASM(li)
400 DEF_ASM(lla)
401 DEF_ASM(mv)
402 DEF_ASM(neg)
403 DEF_ASM(negw)
404 DEF_ASM(nop)
405 DEF_ASM(not)
406 DEF_ASM(ret)
407 DEF_ASM(seqz)
408 DEF_ASM_WITH_SUFFIX(sext, w)
409 DEF_ASM(sgtz)
410 DEF_ASM(sltz)
411 DEF_ASM(snez)
412 DEF_ASM(tail)
414 #undef DEF_ASM_WITH_SUFFIX