fixup! riscv: Implement large addend for global address
[tinycc.git] / riscv64-tok.h
blobeeaa29c6b833b366cdb0f2ee3419d5d336069ce3
1 /* ------------------------------------------------------------------ */
2 /* WARNING: relative order of tokens is important. */
4 /*
5 * The specifications are available under https://riscv.org/technical/specifications/
6 */
8 #define DEF_ASM_WITH_SUFFIX(x, y) \
9 DEF(TOK_ASM_ ## x ## _ ## y, #x "." #y)
11 #define DEF_ASM_WITH_SUFFIXES(x, y, z) \
12 DEF(TOK_ASM_ ## x ## _ ## y ## _ ## z, #x "." #y "." #z)
14 #define DEF_ASM_FENCE(x) \
15 DEF(TOK_ASM_ ## x ## _fence, #x)
17 /* register */
18 /* integer */
19 DEF_ASM(x0)
20 DEF_ASM(x1)
21 DEF_ASM(x2)
22 DEF_ASM(x3)
23 DEF_ASM(x4)
24 DEF_ASM(x5)
25 DEF_ASM(x6)
26 DEF_ASM(x7)
27 DEF_ASM(x8)
28 DEF_ASM(x9)
29 DEF_ASM(x10)
30 DEF_ASM(x11)
31 DEF_ASM(x12)
32 DEF_ASM(x13)
33 DEF_ASM(x14)
34 DEF_ASM(x15)
35 DEF_ASM(x16)
36 DEF_ASM(x17)
37 DEF_ASM(x18)
38 DEF_ASM(x19)
39 DEF_ASM(x20)
40 DEF_ASM(x21)
41 DEF_ASM(x22)
42 DEF_ASM(x23)
43 DEF_ASM(x24)
44 DEF_ASM(x25)
45 DEF_ASM(x26)
46 DEF_ASM(x27)
47 DEF_ASM(x28)
48 DEF_ASM(x29)
49 DEF_ASM(x30)
50 DEF_ASM(x31)
51 /* float */
52 DEF_ASM(f0)
53 DEF_ASM(f1)
54 DEF_ASM(f2)
55 DEF_ASM(f3)
56 DEF_ASM(f4)
57 DEF_ASM(f5)
58 DEF_ASM(f6)
59 DEF_ASM(f7)
60 DEF_ASM(f8)
61 DEF_ASM(f9)
62 DEF_ASM(f10)
63 DEF_ASM(f11)
64 DEF_ASM(f12)
65 DEF_ASM(f13)
66 DEF_ASM(f14)
67 DEF_ASM(f15)
68 DEF_ASM(f16)
69 DEF_ASM(f17)
70 DEF_ASM(f18)
71 DEF_ASM(f19)
72 DEF_ASM(f20)
73 DEF_ASM(f21)
74 DEF_ASM(f22)
75 DEF_ASM(f23)
76 DEF_ASM(f24)
77 DEF_ASM(f25)
78 DEF_ASM(f26)
79 DEF_ASM(f27)
80 DEF_ASM(f28)
81 DEF_ASM(f29)
82 DEF_ASM(f30)
83 DEF_ASM(f31)
85 /* register ABI mnemonics, refer to RISC-V ABI 1.0 */
86 /* integer */
87 DEF_ASM(zero)
88 DEF_ASM(ra)
89 DEF_ASM(sp)
90 DEF_ASM(gp)
91 DEF_ASM(tp)
92 DEF_ASM(t0)
93 DEF_ASM(t1)
94 DEF_ASM(t2)
95 DEF_ASM(s0)
96 DEF_ASM(s1)
97 DEF_ASM(a0)
98 DEF_ASM(a1)
99 DEF_ASM(a2)
100 DEF_ASM(a3)
101 DEF_ASM(a4)
102 DEF_ASM(a5)
103 DEF_ASM(a6)
104 DEF_ASM(a7)
105 DEF_ASM(s2)
106 DEF_ASM(s3)
107 DEF_ASM(s4)
108 DEF_ASM(s5)
109 DEF_ASM(s6)
110 DEF_ASM(s7)
111 DEF_ASM(s8)
112 DEF_ASM(s9)
113 DEF_ASM(s10)
114 DEF_ASM(s11)
115 DEF_ASM(t3)
116 DEF_ASM(t4)
117 DEF_ASM(t5)
118 DEF_ASM(t6)
119 /* float */
120 DEF_ASM(ft0)
121 DEF_ASM(ft1)
122 DEF_ASM(ft2)
123 DEF_ASM(ft3)
124 DEF_ASM(ft4)
125 DEF_ASM(ft5)
126 DEF_ASM(ft6)
127 DEF_ASM(ft7)
128 DEF_ASM(fs0)
129 DEF_ASM(fs1)
130 DEF_ASM(fa0)
131 DEF_ASM(fa1)
132 DEF_ASM(fa2)
133 DEF_ASM(fa3)
134 DEF_ASM(fa4)
135 DEF_ASM(fa5)
136 DEF_ASM(fa6)
137 DEF_ASM(fa7)
138 DEF_ASM(fs2)
139 DEF_ASM(fs3)
140 DEF_ASM(fs4)
141 DEF_ASM(fs5)
142 DEF_ASM(fs6)
143 DEF_ASM(fs7)
144 DEF_ASM(fs8)
145 DEF_ASM(fs9)
146 DEF_ASM(fs10)
147 DEF_ASM(fs11)
148 DEF_ASM(ft8)
149 DEF_ASM(ft9)
150 DEF_ASM(ft10)
151 DEF_ASM(ft11)
152 /* not in the ABI */
153 DEF_ASM(pc)
155 /* Loads */
157 DEF_ASM(lb)
158 DEF_ASM(lh)
159 DEF_ASM(lw)
160 DEF_ASM(lbu)
161 DEF_ASM(lhu)
162 /* RV64 */
163 DEF_ASM(ld)
164 DEF_ASM(lwu)
166 /* Stores */
168 DEF_ASM(sb)
169 DEF_ASM(sh)
170 DEF_ASM(sw)
171 /* RV64 */
172 DEF_ASM(sd)
174 /* Shifts */
176 DEF_ASM(sll)
177 DEF_ASM(srl)
178 DEF_ASM(sra)
179 /* RV64 */
180 DEF_ASM(slli)
181 DEF_ASM(srli)
182 DEF_ASM(sllw)
183 DEF_ASM(slliw)
184 DEF_ASM(srlw)
185 DEF_ASM(srliw)
186 DEF_ASM(srai)
187 DEF_ASM(sraw)
188 DEF_ASM(sraiw)
190 /* Arithmetic */
192 DEF_ASM(add)
193 DEF_ASM(addi)
194 DEF_ASM(sub)
195 DEF_ASM(lui)
196 DEF_ASM(auipc)
197 /* RV64 */
198 DEF_ASM(addw)
199 DEF_ASM(addiw)
200 DEF_ASM(subw)
202 /* Logical */
204 DEF_ASM(xor)
205 DEF_ASM(xori)
206 DEF_ASM(or)
207 DEF_ASM(ori)
208 DEF_ASM(and)
209 DEF_ASM(andi)
211 /* Compare */
213 DEF_ASM(slt)
214 DEF_ASM(slti)
215 DEF_ASM(sltu)
216 DEF_ASM(sltiu)
218 /* Branch */
220 DEF_ASM(beq)
221 DEF_ASM(bne)
222 DEF_ASM(blt)
223 DEF_ASM(bge)
224 DEF_ASM(bltu)
225 DEF_ASM(bgeu)
227 /* Jump */
229 DEF_ASM(jal)
230 DEF_ASM(jalr)
232 /* Sync */
234 DEF_ASM(fence)
235 /* Zifencei extension */
236 DEF_ASM_WITH_SUFFIX(fence, i)
238 /* System call */
240 /* used to be called scall and sbreak */
241 DEF_ASM(ecall)
242 DEF_ASM(ebreak)
244 /* Counters */
246 DEF_ASM(rdcycle)
247 DEF_ASM(rdcycleh)
248 DEF_ASM(rdtime)
249 DEF_ASM(rdtimeh)
250 DEF_ASM(rdinstret)
251 DEF_ASM(rdinstreth)
253 /* “M” Standard Extension for Integer Multiplication and Division, V2.0 */
254 DEF_ASM(mul)
255 DEF_ASM(mulh)
256 DEF_ASM(mulhsu)
257 DEF_ASM(mulhu)
258 DEF_ASM(div)
259 DEF_ASM(divu)
260 DEF_ASM(rem)
261 DEF_ASM(remu)
262 /* RV64 */
263 DEF_ASM(mulw)
264 DEF_ASM(divw)
265 DEF_ASM(divuw)
266 DEF_ASM(remw)
267 DEF_ASM(remuw)
269 /* "C" Extension for Compressed Instructions, V2.0 */
270 DEF_ASM_WITH_SUFFIX(c, nop)
271 /* Loads */
272 DEF_ASM_WITH_SUFFIX(c, li)
273 DEF_ASM_WITH_SUFFIX(c, lw)
274 DEF_ASM_WITH_SUFFIX(c, lwsp)
275 /* single float */
276 DEF_ASM_WITH_SUFFIX(c, flw)
277 DEF_ASM_WITH_SUFFIX(c, flwsp)
278 /* double float */
279 DEF_ASM_WITH_SUFFIX(c, fld)
280 DEF_ASM_WITH_SUFFIX(c, fldsp)
281 /* RV64 */
282 DEF_ASM_WITH_SUFFIX(c, ld)
283 DEF_ASM_WITH_SUFFIX(c, ldsp)
285 /* Stores */
287 DEF_ASM_WITH_SUFFIX(c, sw)
288 DEF_ASM_WITH_SUFFIX(c, sd)
289 DEF_ASM_WITH_SUFFIX(c, swsp)
290 DEF_ASM_WITH_SUFFIX(c, sdsp)
291 /* single float */
292 DEF_ASM_WITH_SUFFIX(c, fsw)
293 DEF_ASM_WITH_SUFFIX(c, fswsp)
294 /* double float */
295 DEF_ASM_WITH_SUFFIX(c, fsd)
296 DEF_ASM_WITH_SUFFIX(c, fsdsp)
298 /* Shifts */
299 DEF_ASM_WITH_SUFFIX(c, slli)
300 DEF_ASM_WITH_SUFFIX(c, srli)
301 DEF_ASM_WITH_SUFFIX(c, srai)
303 /* Arithmetic */
304 DEF_ASM_WITH_SUFFIX(c, add)
305 DEF_ASM_WITH_SUFFIX(c, addi)
306 DEF_ASM_WITH_SUFFIX(c, addi16sp)
307 DEF_ASM_WITH_SUFFIX(c, addi4spn)
308 DEF_ASM_WITH_SUFFIX(c, lui)
309 DEF_ASM_WITH_SUFFIX(c, sub)
310 DEF_ASM_WITH_SUFFIX(c, mv)
311 /* RV64 */
312 DEF_ASM_WITH_SUFFIX(c, addw)
313 DEF_ASM_WITH_SUFFIX(c, addiw)
314 DEF_ASM_WITH_SUFFIX(c, subw)
316 /* Logical */
317 DEF_ASM_WITH_SUFFIX(c, xor)
318 DEF_ASM_WITH_SUFFIX(c, or)
319 DEF_ASM_WITH_SUFFIX(c, and)
320 DEF_ASM_WITH_SUFFIX(c, andi)
322 /* Branch */
323 DEF_ASM_WITH_SUFFIX(c, beqz)
324 DEF_ASM_WITH_SUFFIX(c, bnez)
326 /* Jump */
327 DEF_ASM_WITH_SUFFIX(c, j)
328 DEF_ASM_WITH_SUFFIX(c, jr)
329 DEF_ASM_WITH_SUFFIX(c, jal)
330 DEF_ASM_WITH_SUFFIX(c, jalr)
332 /* System call */
333 DEF_ASM_WITH_SUFFIX(c, ebreak)
335 /* XXX F Extension: Single-Precision Floating Point */
336 /* XXX D Extension: Double-Precision Floating Point */
337 /* from the spec: Tables 16.5–16.7 list the RVC instructions. */
339 /* “Zicsr”, Control and Status Register (CSR) Instructions, V2.0 */
340 DEF_ASM(csrrw)
341 DEF_ASM(csrrs)
342 DEF_ASM(csrrc)
343 DEF_ASM(csrrwi)
344 DEF_ASM(csrrsi)
345 DEF_ASM(csrrci)
346 /* registers */
347 DEF_ASM(cycle)
348 DEF_ASM(fcsr)
349 DEF_ASM(fflags)
350 DEF_ASM(frm)
351 DEF_ASM(instret)
352 DEF_ASM(time)
353 /* RV32I-only */
354 DEF_ASM(cycleh)
355 DEF_ASM(instreth)
356 DEF_ASM(timeh)
357 /* pseudo */
358 DEF_ASM(csrc)
359 DEF_ASM(csrci)
360 DEF_ASM(csrr)
361 DEF_ASM(csrs)
362 DEF_ASM(csrsi)
363 DEF_ASM(csrw)
364 DEF_ASM(csrwi)
365 DEF_ASM(frcsr)
366 DEF_ASM(frflags)
367 DEF_ASM(frrm)
368 DEF_ASM(fscsr)
369 DEF_ASM(fsflags)
370 DEF_ASM(fsrm)
372 /* Privileged Instructions */
374 DEF_ASM(mrts)
375 DEF_ASM(mrth)
376 DEF_ASM(hrts)
377 DEF_ASM(wfi)
379 /* pseudoinstructions */
380 DEF_ASM(beqz)
381 DEF_ASM(bgez)
382 DEF_ASM(bgt)
383 DEF_ASM(bgtu)
384 DEF_ASM(bgtz)
385 DEF_ASM(ble)
386 DEF_ASM(bleu)
387 DEF_ASM(blez)
388 DEF_ASM(bltz)
389 DEF_ASM(bnez)
390 DEF_ASM(call)
391 DEF_ASM_WITH_SUFFIX(fabs, d)
392 DEF_ASM_WITH_SUFFIX(fabs, s)
393 DEF_ASM(fld)
394 DEF_ASM(flw)
395 DEF_ASM_WITH_SUFFIX(fmv, d)
396 DEF_ASM_WITH_SUFFIX(fmv, s)
397 DEF_ASM_WITH_SUFFIX(fneg, d)
398 DEF_ASM_WITH_SUFFIX(fneg, s)
399 DEF_ASM(fsd)
400 DEF_ASM(fsw)
401 DEF_ASM(j)
402 DEF_ASM(jump)
403 DEF_ASM(jr)
404 DEF_ASM(la)
405 DEF_ASM(li)
406 DEF_ASM(lla)
407 DEF_ASM(mv)
408 DEF_ASM(neg)
409 DEF_ASM(negw)
410 DEF_ASM(nop)
411 DEF_ASM(not)
412 DEF_ASM(ret)
413 DEF_ASM(seqz)
414 DEF_ASM_WITH_SUFFIX(sext, w)
415 DEF_ASM(sgtz)
416 DEF_ASM(sltz)
417 DEF_ASM(snez)
418 DEF_ASM(tail)
420 /* Possible values for .option directive */
421 DEF_ASM(arch)
422 DEF_ASM(rvc)
423 DEF_ASM(norvc)
424 DEF_ASM(pic)
425 DEF_ASM(nopic)
426 DEF_ASM(relax)
427 DEF_ASM(norelax)
428 DEF_ASM(push)
429 DEF_ASM(pop)
431 /* “A” Standard Extension for Atomic Instructions, Version 2.1 */
432 /* XXX: Atomic memory operations */
433 DEF_ASM_WITH_SUFFIX(lr, w)
434 DEF_ASM_WITH_SUFFIXES(lr, w, aq)
435 DEF_ASM_WITH_SUFFIXES(lr, w, rl)
436 DEF_ASM_WITH_SUFFIXES(lr, w, aqrl)
438 DEF_ASM_WITH_SUFFIX(lr, d)
439 DEF_ASM_WITH_SUFFIXES(lr, d, aq)
440 DEF_ASM_WITH_SUFFIXES(lr, d, rl)
441 DEF_ASM_WITH_SUFFIXES(lr, d, aqrl)
444 DEF_ASM_WITH_SUFFIX(sc, w)
445 DEF_ASM_WITH_SUFFIXES(sc, w, aq)
446 DEF_ASM_WITH_SUFFIXES(sc, w, rl)
447 DEF_ASM_WITH_SUFFIXES(sc, w, aqrl)
449 DEF_ASM_WITH_SUFFIX(sc, d)
450 DEF_ASM_WITH_SUFFIXES(sc, d, aq)
451 DEF_ASM_WITH_SUFFIXES(sc, d, rl)
452 DEF_ASM_WITH_SUFFIXES(sc, d, aqrl)
454 /* `fence` arguments */
455 /* NOTE: Order is important */
456 DEF_ASM_FENCE(w)
457 DEF_ASM_FENCE(r)
458 DEF_ASM_FENCE(rw)
460 DEF_ASM_FENCE(o)
461 DEF_ASM_FENCE(ow)
462 DEF_ASM_FENCE(or)
463 DEF_ASM_FENCE(orw)
465 DEF_ASM_FENCE(i)
466 DEF_ASM_FENCE(iw)
467 DEF_ASM_FENCE(ir)
468 DEF_ASM_FENCE(irw)
470 DEF_ASM_FENCE(io)
471 DEF_ASM_FENCE(iow)
472 DEF_ASM_FENCE(ior)
473 DEF_ASM_FENCE(iorw)
475 #undef DEF_ASM_WITH_SUFFIX