com32/include/cpuid.h

   1 /* ----------------------------------------------------------------------- *
   2  *
   3  *   Copyright 2006 Erwan Velu - All Rights Reserved
   4  *
   5  *   Permission is hereby granted, free of charge, to any person
   6  *   obtaining a copy of this software and associated documentation
   7  *   files (the "Software"), to deal in the Software without
   8  *   restriction, including without limitation the rights to use,
   9  *   copy, modify, merge, publish, distribute, sublicense, and/or
  10  *   sell copies of the Software, and to permit persons to whom
  11  *   the Software is furnished to do so, subject to the following
  12  *   conditions:
  13  *
  14  *   The above copyright notice and this permission notice shall
  15  *   be included in all copies or substantial portions of the Software.
  16  *
  17  *   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  *   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  19  *   OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  20  *   NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  21  *   HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  22  *   WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  23  *   FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  24  *   OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  * ----------------------------------------------------------------------- */
  27
  28 #ifndef _CPUID_H
  29 #define _CPUID_H
  30
  31 #include <stdbool.h>
  32 #include <stdint.h>
  33 #include <cpufeature.h>
  34 #include <sys/cpu.h>
  35 #include <klibc/compiler.h>
  36
  37 #define PAGE_SIZE 4096
  38
  39 #define CPU_MODEL_SIZE  48
  40 #define CPU_VENDOR_SIZE 48
  41
  42 typedef struct {
  43         bool fpu; /* Onboard FPU */
  44         bool vme; /* Virtual Mode Extensions */
  45         bool de;  /* Debugging Extensions */
  46         bool pse; /* Page Size Extensions */
  47         bool tsc; /* Time Stamp Counter */
  48         bool msr; /* Model-Specific Registers, RDMSR, WRMSR */
  49         bool pae; /* Physical Address Extensions */
  50         bool mce; /* Machine Check Architecture */
  51         bool cx8; /* CMPXCHG8 instruction */
  52         bool apic;/* Onboard APIC */
  53         bool sep; /* SYSENTER/SYSEXIT */
  54         bool mtrr;/* Memory Type Range Registers */
  55         bool pge; /* Page Global Enable */
  56         bool mca; /* Machine Check Architecture */
  57         bool cmov;/* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */
  58         bool pat; /* Page Attribute Table */
  59         bool pse_36; /* 36-bit PSEs */
  60         bool psn; /* Processor serial number */
  61         bool clflsh; /* Supports the CLFLUSH instruction */
  62         bool dts; /* Debug Trace Store */
  63         bool acpi;/* ACPI via MSR */
  64         bool mmx; /* Multimedia Extensions */
  65         bool fxsr;/* FXSAVE and FXRSTOR instructions (fast save and restore */
  66                   /* of FPU context), and CR4.OSFXSR available */
  67         bool sse; /* Streaming SIMD Extensions */
  68         bool sse2;/* Streaming SIMD Extensions 2*/
  69         bool ss;  /* CPU self snoop */
  70         bool htt; /* Hyper-Threading */
  71         bool acc; /* Automatic clock control */
  72         bool syscall; /* SYSCALL/SYSRET */
  73         bool mp;  /* MP Capable. */
  74         bool nx;  /* Execute Disable */
  75         bool mmxext;  /* AMD MMX extensions */
  76         bool lm;  /* Long Mode (x86-64) */
  77         bool nowext;/* AMD 3DNow! extensions */
  78         bool now;   /* 3DNow! */
  79         bool smp;  /* A smp configuration has been found*/
  80 } s_cpu_flags;
  81
  82 typedef struct {
  83         char        vendor[CPU_VENDOR_SIZE];
  84         uint8_t     vendor_id;
  85         uint8_t     family;
  86         char        model[CPU_MODEL_SIZE];
  87         uint8_t     model_id;
  88         uint8_t     stepping;
  89         s_cpu_flags flags;
  90 } s_cpu;
  91
  92 /**********************************************************************************/
  93 /**********************************************************************************/
  94 /* From this point this is some internal stuff mainly taken from the linux kernel */
  95 /**********************************************************************************/
  96 /**********************************************************************************/
  97
  98 /*
  99  * EFLAGS bits
 100  */
 101 #define X86_EFLAGS_CF   0x00000001 /* Carry Flag */
 102 #define X86_EFLAGS_PF   0x00000004 /* Parity Flag */
 103 #define X86_EFLAGS_AF   0x00000010 /* Auxillary carry Flag */
 104 #define X86_EFLAGS_ZF   0x00000040 /* Zero Flag */
 105 #define X86_EFLAGS_SF   0x00000080 /* Sign Flag */
 106 #define X86_EFLAGS_TF   0x00000100 /* Trap Flag */
 107 #define X86_EFLAGS_IF   0x00000200 /* Interrupt Flag */
 108 #define X86_EFLAGS_DF   0x00000400 /* Direction Flag */
 109 #define X86_EFLAGS_OF   0x00000800 /* Overflow Flag */
 110 #define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
 111 #define X86_EFLAGS_NT   0x00004000 /* Nested Task */
 112 #define X86_EFLAGS_RF   0x00010000 /* Resume Flag */
 113 #define X86_EFLAGS_VM   0x00020000 /* Virtual Mode */
 114 #define X86_EFLAGS_AC   0x00040000 /* Alignment Check */
 115 #define X86_EFLAGS_VIF  0x00080000 /* Virtual Interrupt Flag */
 116 #define X86_EFLAGS_VIP  0x00100000 /* Virtual Interrupt Pending */
 117 #define X86_EFLAGS_ID   0x00200000 /* CPUID detection flag */
 118
 119 #define X86_VENDOR_INTEL 0
 120 #define X86_VENDOR_CYRIX 1
 121 #define X86_VENDOR_AMD 2
 122 #define X86_VENDOR_UMC 3
 123 #define X86_VENDOR_NEXGEN 4
 124 #define X86_VENDOR_CENTAUR 5
 125 #define X86_VENDOR_RISE 6
 126 #define X86_VENDOR_TRANSMETA 7
 127 #define X86_VENDOR_NSC 8
 128 #define X86_VENDOR_NUM 9
 129 #define X86_VENDOR_UNKNOWN 0xff
 130
 131 static inline __purefunc bool test_bit(int nr, const uint32_t *addr)
 132 {
 133         return ((1UL << (nr & 31)) & (addr[nr >> 5])) != 0;
 134 }
 135
 136 #define cpu_has(c, bit)                test_bit(bit, (c)->x86_capability)
 137
 138 /*
 139  *  CPU type and hardware bug flags. Kept separately for each CPU.
 140  *  Members of this structure are referenced in head.S, so think twice
 141  *  before touching them. [mj]
 142  */
 143
 144 struct cpuinfo_x86 {
 145         uint8_t  x86;            /* CPU family */
 146         uint8_t  x86_vendor;     /* CPU vendor */
 147         uint8_t  x86_model;
 148         uint8_t  x86_mask;
 149         char     wp_works_ok;    /* It doesn't on 386's */
 150         char     hlt_works_ok;   /* Problems on some 486Dx4's and old 386's */
 151         char     hard_math;
 152         char     rfu;
 153         int      cpuid_level;    /* Maximum supported CPUID level, -1=no CPUID */
 154         uint32_t x86_capability[NCAPINTS];
 155         char     x86_vendor_id[16];
 156         char     x86_model_id[64];
 157         int      x86_cache_size;        /* in KB, if available */
 158         int      x86_cache_alignment;    /* in bytes */
 159         char     fdiv_bug;
 160         char     f00f_bug;
 161         char     coma_bug;
 162         char     pad0;
 163         int      x86_power;
 164         unsigned long loops_per_jiffy;
 165 #ifdef CONFIG_SMP
 166         cpumask_t llc_shared_map;       /* cpus sharing the last level cache */
 167 #endif
 168         unsigned char x86_max_cores;    /* cpuid returned max cores value */
 169         unsigned char booted_cores;     /* number of cores as seen by OS */
 170         unsigned char apicid;
 171 } __attribute__((__packed__));
 172 #endif
 173
 174 struct cpu_model_info {
 175         int vendor;
 176         int family;
 177         char *model_names[16];
 178 };
 179
 180 /* attempt to consolidate cpu attributes */
 181 struct cpu_dev {
 182         char    * c_vendor;
 183
 184         /* some have two possibilities for cpuid string */
 185         char    * c_ident[2];
 186
 187         struct          cpu_model_info c_models[4];
 188
 189         void            (*c_init)(struct cpuinfo_x86 * c);
 190         void            (*c_identify)(struct cpuinfo_x86 * c);
 191         unsigned int    (*c_size_cache)(struct cpuinfo_x86 * c, unsigned int size);
 192 };
 193
 194 /*
 195  * Structure definitions for SMP machines following the
 196  * Intel Multiprocessing Specification 1.1 and 1.4.
 197  */
 198
 199 /*
 200  * This tag identifies where the SMP configuration
 201  * information is.
 202  */
 203
 204 #define SMP_MAGIC_IDENT (('_'<<24)|('P'<<16)|('M'<<8)|'_')
 205
 206 struct intel_mp_floating
 207 {
 208         char     mpf_signature[4];      /* "_MP_"                       */
 209         uint32_t mpf_physptr;           /* Configuration table address  */
 210         uint8_t  mpf_length;            /* Our length (paragraphs)      */
 211         uint8_t  mpf_specification;     /* Specification version        */
 212         uint8_t  mpf_checksum;          /* Checksum (makes sum 0)       */
 213         uint8_t  mpf_feature1;          /* Standard or configuration ?  */
 214         uint8_t  mpf_feature2;          /* Bit7 set for IMCR|PIC        */
 215         uint8_t  mpf_feature3;          /* Unused (0)                   */
 216         uint8_t  mpf_feature4;          /* Unused (0)                   */
 217         uint8_t  mpf_feature5;          /* Unused (0)                   */
 218 };
 219
 220
 221 extern void get_cpu_vendor(struct cpuinfo_x86 *c);
 222 extern void detect_cpu(s_cpu *cpu);