target-riscv.c

   1 #include "lib.h"
   2 #include "symbol.h"
   3 #include "target.h"
   4 #include "machine.h"
   5 #include <string.h>
   6 #include <stdio.h>
   7
   8 #define RISCV_32BIT     (1 << 0)
   9 #define RISCV_64BIT     (1 << 1)
  10 #define RISCV_MUL       (1 << 2)
  11 #define RISCV_DIV       (1 << 3)
  12 #define RISCV_ATOMIC    (1 << 4)
  13 #define RISCV_FLOAT     (1 << 5)
  14 #define RISCV_DOUBLE    (1 << 6)
  15 #define RISCV_FDIV      (1 << 7)
  16 #define RISCV_COMP      (1 << 8)
  17 #define RISCV_EMBD      (1 << 9)
  18 #define RISCV_FPU       (RISCV_FLOAT|RISCV_DOUBLE|RISCV_FDIV)
  19 #define RISCV_GENERIC   (RISCV_MUL|RISCV_DIV|RISCV_ATOMIC|RISCV_FPU)
  20 #define RISCV_ZICSR     (1 << 10)
  21 #define RISCV_ZIFENCEI  (1 << 11)
  22
  23 static unsigned int riscv_flags;
  24
  25 static void parse_march_riscv(const char *arg)
  26 {
  27         static struct {
  28                 const char *pattern;
  29                 unsigned int flags;
  30         } basic_sets[] = {
  31                 { "rv32i",      RISCV_32BIT },
  32                 { "rv32e",      RISCV_32BIT|RISCV_EMBD },
  33                 { "rv32g",      RISCV_32BIT|RISCV_GENERIC },
  34                 { "rv64i",      RISCV_64BIT },
  35                 { "rv64g",      RISCV_64BIT|RISCV_GENERIC },
  36         }, extensions[] = {
  37                 { "m",          RISCV_MUL|RISCV_DIV },
  38                 { "a",          RISCV_ATOMIC },
  39                 { "f",          RISCV_FLOAT|RISCV_FDIV|RISCV_ZICSR },
  40                 { "d",          RISCV_DOUBLE|RISCV_FDIV|RISCV_ZICSR },
  41                 { "c",          RISCV_COMP },
  42                 { "_zicsr",     RISCV_ZICSR },
  43                 { "_zifencei",  RISCV_ZIFENCEI },
  44         };
  45         int i;
  46
  47         // Each -march=.. options entirely overrides previous ones
  48         riscv_flags = 0;
  49
  50         for (i = 0; i < ARRAY_SIZE(basic_sets); i++) {
  51                 const char *pat = basic_sets[i].pattern;
  52                 size_t len = strlen(pat);
  53
  54                 if (!strncmp(arg, pat, len)) {
  55                         riscv_flags |= basic_sets[i].flags;
  56                         arg += len;
  57                         goto ext;
  58                 }
  59         }
  60
  61 unknown:
  62         fprintf(stderr, "WARNING: invalid argument to '-march': '%s'\n", arg);
  63         return;
  64
  65 ext:
  66         for (i = 0; i < ARRAY_SIZE(extensions); i++) {
  67                 const char *pat = extensions[i].pattern;
  68                 size_t len = strlen(pat);
  69
  70                 if (!strncmp(arg, pat, len)) {
  71                         riscv_flags |= extensions[i].flags;
  72                         arg += len;
  73                 }
  74         }
  75         if (arg[0])
  76                 goto unknown;
  77 }
  78
  79 static void init_riscv(const struct target *self)
  80 {
  81         if (arch_cmodel == CMODEL_UNKNOWN)
  82                 arch_cmodel = CMODEL_MEDLOW;
  83         if (fpic)
  84                 arch_cmodel = CMODEL_PIC;
  85
  86         if (riscv_flags == 0)
  87                 riscv_flags = self->flags;
  88 }
  89
  90 static void init_riscv32(const struct target *self)
  91 {
  92         fast16_ctype = &int_ctype;
  93         ufast16_ctype = &uint_ctype;
  94         fast32_ctype = &int_ctype;
  95         ufast32_ctype = &uint_ctype;
  96
  97         init_riscv(self);
  98 }
  99
 100 static void predefine_riscv(const struct target *self)
 101 {
 102         static const char *cmodels[CMODEL_LAST] = {
 103                 [CMODEL_MEDANY] = "medany",
 104                 [CMODEL_MEDLOW] = "medlow",
 105                 [CMODEL_PIC]    = "pic",
 106         };
 107         const char *cmodel = cmodels[arch_cmodel];
 108
 109         predefine("__riscv", 1, "1");
 110         predefine("__riscv_xlen", 1, "%d", ptr_ctype.bit_size);
 111
 112         if (riscv_flags & RISCV_ATOMIC)
 113                 predefine("__riscv_atomic", 1, "1");
 114         if (riscv_flags & RISCV_COMP)
 115                 predefine("__riscv_compressed", 1, "1");
 116         if (riscv_flags & RISCV_DIV)
 117                 predefine("__riscv_div", 1, "1");
 118         if (riscv_flags & RISCV_EMBD)
 119                 predefine("__riscv_32e", 1, "1");
 120         if (riscv_flags & RISCV_FPU)
 121                 predefine("__riscv_flen", 1, "%d", (riscv_flags & RISCV_DOUBLE) ? 64 : 32);
 122         if (riscv_flags & RISCV_FDIV)
 123                 predefine("__riscv_fdiv", 1, "1");
 124         if (riscv_flags & RISCV_FDIV)
 125                 predefine("__riscv_fsqrt", 1, "1");
 126         if (riscv_flags & RISCV_MUL)
 127                 predefine("__riscv_mul", 1, "1");
 128         if ((riscv_flags & RISCV_MUL) && (riscv_flags & RISCV_DIV))
 129                 predefine("__riscv_muldiv", 1, "1");
 130         if (riscv_flags & RISCV_ZICSR)
 131                 predefine("__riscv_zicsr", 1, "1");
 132         if (riscv_flags & RISCV_ZIFENCEI)
 133                 predefine("__riscv_zifencei", 1, "1");
 134
 135         if (cmodel)
 136                 predefine_strong("__riscv_cmodel_%s", cmodel);
 137 }
 138
 139 const struct target target_riscv32 = {
 140         .mach = MACH_RISCV32,
 141         .bitness = ARCH_LP32,
 142         .big_endian = 0,
 143         .unsigned_char = 1,
 144         .flags = RISCV_32BIT|RISCV_GENERIC|RISCV_COMP,
 145
 146         .target_64bit = &target_riscv64,
 147
 148         .init = init_riscv32,
 149         .predefine = predefine_riscv,
 150         .parse_march = parse_march_riscv,
 151 };
 152
 153 const struct target target_riscv64 = {
 154         .mach = MACH_RISCV64,
 155         .bitness = ARCH_LP64,
 156         .big_endian = 0,
 157         .unsigned_char = 1,
 158         .has_int128 = 1,
 159         .flags = RISCV_64BIT|RISCV_GENERIC|RISCV_COMP,
 160
 161         .target_32bit = &target_riscv32,
 162
 163         .init = init_riscv,
 164         .predefine = predefine_riscv,
 165         .parse_march = parse_march_riscv,
 166 };