src/runtime/x86-64-arch.c

   1 /*
   2  * This software is part of the SBCL system. See the README file for
   3  * more information.
   4  *
   5  * This software is derived from the CMU CL system, which was
   6  * written at Carnegie Mellon University and released into the
   7  * public domain. The software is in the public domain and is
   8  * provided with absolutely no warranty. See the COPYING and CREDITS
   9  * files for more information.
  10  */
  11
  12 #include <stdio.h>
  13
  14 #include "sbcl.h"
  15 #include "runtime.h"
  16 #include "globals.h"
  17 #include "validate.h"
  18 #include "os.h"
  19 #include "sbcl.h"
  20 #include "arch.h"
  21 #include "lispregs.h"
  22 #include "signal.h"
  23 #include "alloc.h"
  24 #include "interrupt.h"
  25 #include "interr.h"
  26 #include "breakpoint.h"
  27 #include "thread.h"
  28
  29 #include "genesis/static-symbols.h"
  30 #include "genesis/symbol.h"
  31
  32 #define BREAKPOINT_INST 0xcc    /* INT3 */
  33
  34 unsigned long fast_random_state = 1;
  35
  36 void arch_init(void)
  37 {}
  38
  39 os_vm_address_t
  40 arch_get_bad_addr(int sig, siginfo_t *code, os_context_t *context)
  41 {
  42     return (os_vm_address_t)code->si_addr;
  43 }
  44
  45 \f
  46 /*
  47  * hacking signal contexts
  48  *
  49  * (This depends both on architecture, which determines what we might
  50  * want to get to, and on OS, which determines how we get to it.)
  51  */
  52
  53 os_context_register_t *
  54 context_eflags_addr(os_context_t *context)
  55 {
  56 #if defined __linux__
  57     /* KLUDGE: As of kernel 2.2.14 on Red Hat 6.2, there's code in the
  58      * <sys/ucontext.h> file to define symbolic names for offsets into
  59      * gregs[], but it's conditional on __USE_GNU and not defined, so
  60      * we need to do this nasty absolute index magic number thing
  61      * instead. */
  62     return &context->uc_mcontext.gregs[17];
  63 #elif defined __FreeBSD__
  64     return &context->uc_mcontext.mc_rflags;
  65 #elif defined LISP_FEATURE_DARWIN
  66 #ifdef MAC_OS_X_VERSION_10_5
  67     return &context->uc_mcontext->__ss.__rflags;
  68 #else
  69     return &context->uc_mcontext->ss.rflags;
  70 #endif
  71 #elif defined __OpenBSD__
  72     return &context->sc_eflags;
  73 #else
  74 #error unsupported OS
  75 #endif
  76 }
  77 \f
  78 void arch_skip_instruction(os_context_t *context)
  79 {
  80     /* Assuming we get here via an INT3 xxx instruction, the PC now
  81      * points to the interrupt code (a Lisp value) so we just move
  82      * past it. Skip the code; after that, if the code is an
  83      * error-trap or cerror-trap then skip the data bytes that follow. */
  84
  85     int vlen;
  86     long code;
  87
  88
  89     /* Get and skip the Lisp interrupt code. */
  90     code = *(char*)(*os_context_pc_addr(context))++;
  91     switch (code)
  92         {
  93         case trap_Error:
  94         case trap_Cerror:
  95             /* Lisp error arg vector length */
  96             vlen = *(char*)(*os_context_pc_addr(context))++;
  97             /* Skip Lisp error arg data bytes. */
  98             while (vlen-- > 0) {
  99                 ++*os_context_pc_addr(context);
 100             }
 101             break;
 102
 103         case trap_Breakpoint:           /* not tested */
 104         case trap_FunEndBreakpoint: /* not tested */
 105             break;
 106
 107         case trap_PendingInterrupt:
 108         case trap_Halt:
 109         case trap_SingleStepAround:
 110         case trap_SingleStepBefore:
 111             /* only needed to skip the Code */
 112             break;
 113
 114         default:
 115             fprintf(stderr,"[arch_skip_inst invalid code %ld\n]\n",code);
 116             break;
 117         }
 118
 119     FSHOW((stderr,
 120            "/[arch_skip_inst resuming at %x]\n",
 121            *os_context_pc_addr(context)));
 122 }
 123
 124 unsigned char *
 125 arch_internal_error_arguments(os_context_t *context)
 126 {
 127     return 1 + (unsigned char *)(*os_context_pc_addr(context));
 128 }
 129
 130 boolean
 131 arch_pseudo_atomic_atomic(os_context_t *context)
 132 {
 133     return get_pseudo_atomic_atomic(arch_os_get_current_thread());
 134 }
 135
 136 void
 137 arch_set_pseudo_atomic_interrupted(os_context_t *context)
 138 {
 139     struct thread *thread = arch_os_get_current_thread();
 140     set_pseudo_atomic_interrupted(thread);
 141 }
 142
 143 void
 144 arch_clear_pseudo_atomic_interrupted(os_context_t *context)
 145 {
 146     struct thread *thread = arch_os_get_current_thread();
 147     clear_pseudo_atomic_interrupted(thread);
 148 }
 149 \f
 150 /*
 151  * This stuff seems to get called for TRACE and debug activity.
 152  */
 153
 154 unsigned int
 155 arch_install_breakpoint(void *pc)
 156 {
 157     unsigned int result = *(unsigned int*)pc;
 158
 159     *(char*)pc = BREAKPOINT_INST;               /* x86 INT3       */
 160     *((char*)pc+1) = trap_Breakpoint;           /* Lisp trap code */
 161
 162     return result;
 163 }
 164
 165 void
 166 arch_remove_breakpoint(void *pc, unsigned int orig_inst)
 167 {
 168     *((char *)pc) = orig_inst & 0xff;
 169     *((char *)pc + 1) = (orig_inst & 0xff00) >> 8;
 170 }
 171 \f
 172 /* When single stepping, single_stepping holds the original instruction
 173  * PC location. */
 174 unsigned int *single_stepping = NULL;
 175 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 176 unsigned int  single_step_save1;
 177 unsigned int  single_step_save2;
 178 unsigned int  single_step_save3;
 179 #endif
 180
 181 void
 182 arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst)
 183 {
 184     unsigned int *pc = (unsigned int*)(*os_context_pc_addr(context));
 185
 186     /* Put the original instruction back. */
 187     *((char *)pc) = orig_inst & 0xff;
 188     *((char *)pc + 1) = (orig_inst & 0xff00) >> 8;
 189
 190 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 191     /* Install helper instructions for the single step:
 192      * pushf; or [esp],0x100; popf. */
 193     single_step_save1 = *(pc-3);
 194     single_step_save2 = *(pc-2);
 195     single_step_save3 = *(pc-1);
 196     *(pc-3) = 0x9c909090;
 197     *(pc-2) = 0x00240c81;
 198     *(pc-1) = 0x9d000001;
 199 #else
 200     *context_eflags_addr(context) |= 0x100;
 201 #endif
 202
 203     single_stepping = pc;
 204
 205 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 206     *os_context_pc_addr(context) = (os_context_register_t)((char *)pc - 9);
 207 #endif
 208 }
 209
 210 void
 211 arch_handle_breakpoint(os_context_t *context)
 212 {
 213     --*os_context_pc_addr(context);
 214     handle_breakpoint(context);
 215 }
 216
 217 void
 218 arch_handle_fun_end_breakpoint(os_context_t *context)
 219 {
 220     --*os_context_pc_addr(context);
 221     *os_context_pc_addr(context) =
 222         (unsigned long)handle_fun_end_breakpoint(context);
 223 }
 224
 225 void
 226 arch_handle_single_step_trap(os_context_t *context, int trap)
 227 {
 228     arch_skip_instruction(context);
 229     /* On x86-64 the fdefn / function is always in RAX, so we pass
 230      * 0 as the register_offset. */
 231     handle_single_step_trap(context, trap, 0);
 232 }
 233
 234 \f
 235 void
 236 sigtrap_handler(int signal, siginfo_t *info, void *void_context)
 237 {
 238     os_context_t *context = (os_context_t*)void_context;
 239     unsigned int trap;
 240
 241     if (single_stepping && (signal==SIGTRAP))
 242     {
 243 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 244         /* Un-install single step helper instructions. */
 245         *(single_stepping-3) = single_step_save1;
 246         *(single_stepping-2) = single_step_save2;
 247         *(single_stepping-1) = single_step_save3;
 248 #else
 249         *context_eflags_addr(context) ^= 0x100;
 250 #endif
 251         /* Re-install the breakpoint if possible. */
 252         if ((char *)*os_context_pc_addr(context) ==
 253             (char *)single_stepping + 1) {
 254             fprintf(stderr, "warning: couldn't reinstall breakpoint\n");
 255         } else {
 256             *((char *)single_stepping) = BREAKPOINT_INST;       /* x86 INT3 */
 257             *((char *)single_stepping+1) = trap_Breakpoint;
 258         }
 259
 260         single_stepping = NULL;
 261         return;
 262     }
 263
 264     /* This is just for info in case the monitor wants to print an
 265      * approximation. */
 266     current_control_stack_pointer =
 267         (lispobj *)*os_context_sp_addr(context);
 268
 269     /* FIXME: CMUCL puts the float control restoration code here.
 270        Thus, it seems to me that single-stepping won't restore the
 271        float control.  Since SBCL currently doesn't support
 272        single-stepping (as far as I can tell) this is somewhat moot,
 273        but it might be worth either moving this code up or deleting
 274        the single-stepping code entirely.  -- CSR, 2002-07-15 */
 275 #if defined(LISP_FEATURE_LINUX) || defined(RESTORE_FP_CONTROL_FROM_CONTEXT)
 276     os_restore_fp_control(context);
 277 #endif
 278
 279     /* On entry %eip points just after the INT3 byte and aims at the
 280      * 'kind' value (eg trap_Cerror). For error-trap and Cerror-trap a
 281      * number of bytes will follow, the first is the length of the byte
 282      * arguments to follow. */
 283     trap = *(unsigned char *)(*os_context_pc_addr(context));
 284
 285     handle_trap(context, trap);
 286 }
 287
 288 void
 289 sigill_handler(int signal, siginfo_t *siginfo, void *void_context) {
 290     os_context_t *context = (os_context_t*)void_context;
 291
 292     /* Triggering SIGTRAP using int3 is unreliable on OS X/x86, so
 293      * we need to use illegal instructions for traps.
 294      */
 295 #if defined(LISP_FEATURE_DARWIN) && !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
 296     if (*((unsigned short *)*os_context_pc_addr(context)) == 0x0b0f) {
 297         *os_context_pc_addr(context) += 2;
 298         return sigtrap_handler(signal, siginfo, void_context);
 299     }
 300 #endif
 301
 302     fake_foreign_function_call(context);
 303     lose("Unhandled SIGILL.");
 304 }
 305
 306 #ifdef X86_64_SIGFPE_FIXUP
 307 #define MXCSR_IE (0x01)         /* Invalid Operation */
 308 #define MXCSR_DE (0x02)         /* Denormal */
 309 #define MXCSR_ZE (0x04)         /* Devide-by-Zero */
 310 #define MXCSR_OE (0x08)         /* Overflow */
 311 #define MXCSR_UE (0x10)         /* Underflow */
 312 #define MXCSR_PE (0x20)         /* Precision */
 313
 314 static inline int
 315 mxcsr_to_code(unsigned int mxcsr)
 316 {
 317     /* Extract unmasked exception bits. */
 318     mxcsr &= ~(mxcsr >> 7) & 0x3F;
 319
 320     /* This order is defined at "Intel 64 and IA-32 Architectures
 321      * Software Developerfs Manual" Volume 1: "Basic Architecture",
 322      * 4.9.2 "Floating-Point Exception Priority". */
 323     if (mxcsr & MXCSR_IE)
 324         return FPE_FLTINV;
 325     else if (mxcsr & MXCSR_ZE)
 326         return FPE_FLTDIV;
 327     else if (mxcsr & MXCSR_DE)
 328         return FPE_FLTUND;
 329     else if (mxcsr & MXCSR_OE)
 330         return FPE_FLTOVF;
 331     else if (mxcsr & MXCSR_UE)
 332         return FPE_FLTUND;
 333     else if (mxcsr & MXCSR_PE)
 334         return FPE_FLTRES;
 335
 336     return 0;
 337 }
 338
 339 static void
 340 sigfpe_handler(int signal, siginfo_t *siginfo, void *void_context)
 341 {
 342     os_context_t *context = arch_os_get_context(&void_context);
 343     unsigned int *mxcsr = arch_os_context_mxcsr_addr(context);
 344
 345     if (siginfo->si_code == 0) { /* XMM exception */
 346         siginfo->si_code = mxcsr_to_code(*mxcsr);
 347
 348         /* Clear sticky exception flag. */
 349         *mxcsr &= ~0x3F;
 350     }
 351
 352     interrupt_handle_now(signal, siginfo, context);
 353 }
 354 #endif
 355
 356 void
 357 arch_install_interrupt_handlers()
 358 {
 359     SHOW("entering arch_install_interrupt_handlers()");
 360
 361     /* Note: The old CMU CL code here used sigtrap_handler() to handle
 362      * SIGILL as well as SIGTRAP. I couldn't see any reason to do
 363      * things that way. So, I changed to separate handlers when
 364      * debugging a problem on OpenBSD, where SBCL wasn't catching
 365      * SIGILL properly, but was instead letting the process be
 366      * terminated with an "Illegal instruction" output. If this change
 367      * turns out to break something (maybe breakpoint handling on some
 368      * OS I haven't tested on?) and we have to go back to the old CMU
 369      * CL way, I hope there will at least be a comment to explain
 370      * why.. -- WHN 2001-06-07 */
 371 #if !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
 372     undoably_install_low_level_interrupt_handler(SIGILL , sigill_handler);
 373     undoably_install_low_level_interrupt_handler(SIGTRAP, sigtrap_handler);
 374 #endif
 375
 376 #ifdef X86_64_SIGFPE_FIXUP
 377     undoably_install_low_level_interrupt_handler(SIGFPE, sigfpe_handler);
 378 #endif
 379
 380     SHOW("returning from arch_install_interrupt_handlers()");
 381 }
 382 \f
 383 #ifdef LISP_FEATURE_LINKAGE_TABLE
 384 /* FIXME: It might be cleaner to generate these from the lisp side of
 385  * things.
 386  */
 387
 388 void
 389 arch_write_linkage_table_jmp(char * reloc, void * fun)
 390 {
 391     unsigned long addr = (unsigned long) fun;
 392     int i;
 393
 394     *reloc++ = 0xFF; /* Opcode for near jump to absolute reg/mem64. */
 395     *reloc++ = 0x25; /* ModRM #b00 100 101, i.e. RIP-relative. */
 396     *reloc++ = 0x00; /* 32-bit displacement field = 0 */
 397     *reloc++ = 0x00; /* ... */
 398     *reloc++ = 0x00; /* ... */
 399     *reloc++ = 0x00; /* ... */
 400
 401     for (i = 0; i < 8; i++) {
 402         *reloc++ = addr & 0xff;
 403         addr >>= 8;
 404     }
 405
 406     /* write a nop for good measure. */
 407     *reloc = 0x90;
 408 }
 409
 410 void
 411 arch_write_linkage_table_ref(void * reloc, void * data)
 412 {
 413     *(unsigned long *)reloc = (unsigned long)data;
 414 }
 415
 416 #endif
 417
 418 /* These setup and check *both* the sse2 and x87 FPUs. While lisp code
 419    only uses the sse2 FPU, other code (such as libc) may use the x87 FPU.
 420  */
 421
 422 unsigned int
 423 arch_get_fp_modes()
 424 {
 425     unsigned int temp;
 426     unsigned int result;
 427     /* return the x87 exception flags ored in with the sse2
 428      * control+status flags */
 429     asm ("fnstsw %0" : "=m" (temp));
 430     result = temp;
 431     result &= 0x3F;
 432     asm ("stmxcsr %0" : "=m" (temp));
 433     result |= temp;
 434     /* flip exception mask bits */
 435     return result ^ (0x3F << 7);
 436 }
 437
 438 struct fpenv
 439 {
 440     unsigned short cw;
 441     unsigned short unused1;
 442     unsigned short sw;
 443     unsigned short unused2;
 444     unsigned int other_regs[5];
 445 };
 446
 447 void
 448 arch_set_fp_modes(unsigned int mxcsr)
 449 {
 450     struct fpenv f_env;
 451     unsigned int temp;
 452
 453     /* turn trap enable bits into exception mask */
 454     mxcsr ^= 0x3F << 7;
 455
 456     /* set x87 modes */
 457     asm ("fnstenv %0" : "=m" (f_env));
 458     /* set control word: always long double precision
 459      * get traps and rounding from mxcsr word */
 460     f_env.cw = 0x300 | ((mxcsr >> 7) & 0x3F) | (((mxcsr >> 13) & 0x3) << 10);
 461     /* set status word: only override exception flags, from mxcsr */
 462     f_env.sw &= ~0x3F;
 463     f_env.sw |= (mxcsr & 0x3F);
 464
 465     asm ("fldenv %0" : : "m" (f_env));
 466
 467     /* now, simply, load up the mxcsr register */
 468     temp = mxcsr;
 469     asm ("ldmxcsr %0" : : "m" (temp));
 470 }