src/runtime/x86-64-arch.c

   1 /*
   2  * This software is part of the SBCL system. See the README file for
   3  * more information.
   4  *
   5  * This software is derived from the CMU CL system, which was
   6  * written at Carnegie Mellon University and released into the
   7  * public domain. The software is in the public domain and is
   8  * provided with absolutely no warranty. See the COPYING and CREDITS
   9  * files for more information.
  10  */
  11
  12 #include <stdio.h>
  13
  14 #include "sbcl.h"
  15 #include "runtime.h"
  16 #include "globals.h"
  17 #include "validate.h"
  18 #include "os.h"
  19 #include "sbcl.h"
  20 #include "arch.h"
  21 #include "lispregs.h"
  22 #include "signal.h"
  23 #include "alloc.h"
  24 #include "interrupt.h"
  25 #include "interr.h"
  26 #include "breakpoint.h"
  27 #include "thread.h"
  28 #include "pseudo-atomic.h"
  29
  30 #include "genesis/static-symbols.h"
  31 #include "genesis/symbol.h"
  32
  33 #define BREAKPOINT_INST 0xcc    /* INT3 */
  34 #define UD2_INST 0x0b0f         /* UD2 */
  35
  36 #ifndef LISP_FEATURE_UD2_BREAKPOINTS
  37 #define BREAKPOINT_WIDTH 1
  38 #else
  39 #define BREAKPOINT_WIDTH 2
  40 #endif
  41
  42 unsigned long fast_random_state = 1;
  43
  44 void arch_init(void)
  45 {}
  46
  47 os_vm_address_t
  48 arch_get_bad_addr(int sig, siginfo_t *code, os_context_t *context)
  49 {
  50     return (os_vm_address_t)code->si_addr;
  51 }
  52
  53 \f
  54 /*
  55  * hacking signal contexts
  56  *
  57  * (This depends both on architecture, which determines what we might
  58  * want to get to, and on OS, which determines how we get to it.)
  59  */
  60
  61 os_context_register_t *
  62 context_eflags_addr(os_context_t *context)
  63 {
  64 #if defined __linux__ || defined __sun
  65     /* KLUDGE: As of kernel 2.2.14 on Red Hat 6.2, there's code in the
  66      * <sys/ucontext.h> file to define symbolic names for offsets into
  67      * gregs[], but it's conditional on __USE_GNU and not defined, so
  68      * we need to do this nasty absolute index magic number thing
  69      * instead. */
  70     return &context->uc_mcontext.gregs[17];
  71 #elif defined __FreeBSD__
  72     return &context->uc_mcontext.mc_rflags;
  73 #elif defined LISP_FEATURE_DARWIN
  74     return CONTEXT_ADDR_FROM_STEM(rflags);
  75 #elif defined __OpenBSD__
  76     return &context->sc_rflags;
  77 #elif defined __NetBSD__
  78     return CONTEXT_ADDR_FROM_STEM(RFLAGS);
  79 #else
  80 #error unsupported OS
  81 #endif
  82 }
  83 \f
  84 void arch_skip_instruction(os_context_t *context)
  85 {
  86     /* Assuming we get here via an INT3 xxx instruction, the PC now
  87      * points to the interrupt code (a Lisp value) so we just move
  88      * past it. Skip the code; after that, if the code is an
  89      * error-trap or cerror-trap then skip the data bytes that follow. */
  90
  91     int vlen;
  92     long code;
  93
  94
  95     /* Get and skip the Lisp interrupt code. */
  96     code = *(char*)(*os_context_pc_addr(context))++;
  97     switch (code)
  98         {
  99         case trap_Error:
 100         case trap_Cerror:
 101             /* Lisp error arg vector length */
 102             vlen = *(char*)(*os_context_pc_addr(context))++;
 103             /* Skip Lisp error arg data bytes. */
 104             while (vlen-- > 0) {
 105                 ++*os_context_pc_addr(context);
 106             }
 107             break;
 108
 109         case trap_Breakpoint:           /* not tested */
 110         case trap_FunEndBreakpoint: /* not tested */
 111             break;
 112
 113         case trap_PendingInterrupt:
 114         case trap_Halt:
 115         case trap_SingleStepAround:
 116         case trap_SingleStepBefore:
 117             /* only needed to skip the Code */
 118             break;
 119
 120         default:
 121             fprintf(stderr,"[arch_skip_inst invalid code %ld\n]\n",code);
 122             break;
 123         }
 124
 125     FSHOW((stderr,
 126            "/[arch_skip_inst resuming at %x]\n",
 127            *os_context_pc_addr(context)));
 128 }
 129
 130 unsigned char *
 131 arch_internal_error_arguments(os_context_t *context)
 132 {
 133     return 1 + (unsigned char *)(*os_context_pc_addr(context));
 134 }
 135
 136 boolean
 137 arch_pseudo_atomic_atomic(os_context_t *context)
 138 {
 139     return get_pseudo_atomic_atomic(arch_os_get_current_thread());
 140 }
 141
 142 void
 143 arch_set_pseudo_atomic_interrupted(os_context_t *context)
 144 {
 145     struct thread *thread = arch_os_get_current_thread();
 146     set_pseudo_atomic_interrupted(thread);
 147 }
 148
 149 void
 150 arch_clear_pseudo_atomic_interrupted(os_context_t *context)
 151 {
 152     struct thread *thread = arch_os_get_current_thread();
 153     clear_pseudo_atomic_interrupted(thread);
 154 }
 155 \f
 156 /*
 157  * This stuff seems to get called for TRACE and debug activity.
 158  */
 159
 160 unsigned int
 161 arch_install_breakpoint(void *pc)
 162 {
 163     unsigned int result = *(unsigned int*)pc;
 164
 165 #ifndef LISP_FEATURE_UD2_BREAKPOINTS
 166     *(char*)pc = BREAKPOINT_INST;               /* x86 INT3       */
 167     *((char*)pc+1) = trap_Breakpoint;           /* Lisp trap code */
 168 #else
 169     *(char*)pc = UD2_INST & 0xff;
 170     *((char*)pc+1) = UD2_INST >> 8;
 171     *((char*)pc+2) = trap_Breakpoint;
 172 #endif
 173
 174     return result;
 175 }
 176
 177 void
 178 arch_remove_breakpoint(void *pc, unsigned int orig_inst)
 179 {
 180     *((char *)pc) = orig_inst & 0xff;
 181     *((char *)pc + 1) = (orig_inst & 0xff00) >> 8;
 182 #if BREAKPOINT_WIDTH > 1
 183     *((char *)pc + 2) = (orig_inst & 0xff0000) >> 16;
 184 #endif
 185 }
 186 \f
 187 /* When single stepping, single_stepping holds the original instruction
 188  * PC location. */
 189 unsigned int *single_stepping = NULL;
 190 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 191 unsigned int  single_step_save1;
 192 unsigned int  single_step_save2;
 193 unsigned int  single_step_save3;
 194 #endif
 195
 196 void
 197 arch_do_displaced_inst(os_context_t *context, unsigned int orig_inst)
 198 {
 199     unsigned int *pc = (unsigned int*)(*os_context_pc_addr(context));
 200
 201     /* Put the original instruction back. */
 202     arch_remove_breakpoint(pc, orig_inst);
 203
 204 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 205     /* Install helper instructions for the single step:
 206      * pushf; or [esp],0x100; popf. */
 207     single_step_save1 = *(pc-3);
 208     single_step_save2 = *(pc-2);
 209     single_step_save3 = *(pc-1);
 210     *(pc-3) = 0x9c909090;
 211     *(pc-2) = 0x00240c81;
 212     *(pc-1) = 0x9d000001;
 213 #else
 214     *context_eflags_addr(context) |= 0x100;
 215 #endif
 216
 217     single_stepping = pc;
 218
 219 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 220     *os_context_pc_addr(context) = (os_context_register_t)((char *)pc - 9);
 221 #endif
 222 }
 223
 224 void
 225 arch_handle_breakpoint(os_context_t *context)
 226 {
 227     *os_context_pc_addr(context) -= BREAKPOINT_WIDTH;
 228     handle_breakpoint(context);
 229 }
 230
 231 void
 232 arch_handle_fun_end_breakpoint(os_context_t *context)
 233 {
 234     *os_context_pc_addr(context) -= BREAKPOINT_WIDTH;
 235     *os_context_pc_addr(context) =
 236         (unsigned long)handle_fun_end_breakpoint(context);
 237 }
 238
 239 void
 240 arch_handle_single_step_trap(os_context_t *context, int trap)
 241 {
 242     arch_skip_instruction(context);
 243     /* On x86-64 the fdefn / function is always in RAX, so we pass
 244      * 0 as the register_offset. */
 245     handle_single_step_trap(context, trap, 0);
 246 }
 247
 248 \f
 249 void
 250 sigtrap_handler(int signal, siginfo_t *info, os_context_t *context)
 251 {
 252     unsigned int trap;
 253
 254     if (single_stepping) {
 255 #ifdef CANNOT_GET_TO_SINGLE_STEP_FLAG
 256         /* Un-install single step helper instructions. */
 257         *(single_stepping-3) = single_step_save1;
 258         *(single_stepping-2) = single_step_save2;
 259         *(single_stepping-1) = single_step_save3;
 260 #else
 261         *context_eflags_addr(context) ^= 0x100;
 262 #endif
 263         /* Re-install the breakpoint if possible. */
 264         if (((char *)*os_context_pc_addr(context) >
 265              (char *)single_stepping) &&
 266             ((char *)*os_context_pc_addr(context) <=
 267              (char *)single_stepping + BREAKPOINT_WIDTH)) {
 268             fprintf(stderr, "warning: couldn't reinstall breakpoint\n");
 269         } else {
 270             arch_install_breakpoint(single_stepping);
 271         }
 272
 273         single_stepping = NULL;
 274         return;
 275     }
 276
 277     /* This is just for info in case the monitor wants to print an
 278      * approximation. */
 279     current_control_stack_pointer =
 280         (lispobj *)*os_context_sp_addr(context);
 281
 282     /* On entry %eip points just after the INT3 byte and aims at the
 283      * 'kind' value (eg trap_Cerror). For error-trap and Cerror-trap a
 284      * number of bytes will follow, the first is the length of the byte
 285      * arguments to follow. */
 286     trap = *(unsigned char *)(*os_context_pc_addr(context));
 287
 288     handle_trap(context, trap);
 289 }
 290
 291 void
 292 sigill_handler(int signal, siginfo_t *siginfo, os_context_t *context) {
 293     /* Triggering SIGTRAP using int3 is unreliable on OS X/x86, so
 294      * we need to use illegal instructions for traps.
 295      */
 296 #if defined(LISP_FEATURE_UD2_BREAKPOINTS) && !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
 297     if (*((unsigned short *)*os_context_pc_addr(context)) == UD2_INST) {
 298         *os_context_pc_addr(context) += 2;
 299         return sigtrap_handler(signal, siginfo, context);
 300     }
 301 #endif
 302
 303     fake_foreign_function_call(context);
 304     lose("Unhandled SIGILL.");
 305 }
 306
 307 #ifdef X86_64_SIGFPE_FIXUP
 308 #define MXCSR_IE (0x01)         /* Invalid Operation */
 309 #define MXCSR_DE (0x02)         /* Denormal */
 310 #define MXCSR_ZE (0x04)         /* Devide-by-Zero */
 311 #define MXCSR_OE (0x08)         /* Overflow */
 312 #define MXCSR_UE (0x10)         /* Underflow */
 313 #define MXCSR_PE (0x20)         /* Precision */
 314
 315 static inline int
 316 mxcsr_to_code(unsigned int mxcsr)
 317 {
 318     /* Extract unmasked exception bits. */
 319     mxcsr &= ~(mxcsr >> 7) & 0x3F;
 320
 321     /* This order is defined at "Intel 64 and IA-32 Architectures
 322      * Software Developerfs Manual" Volume 1: "Basic Architecture",
 323      * 4.9.2 "Floating-Point Exception Priority". */
 324     if (mxcsr & MXCSR_IE)
 325         return FPE_FLTINV;
 326     else if (mxcsr & MXCSR_ZE)
 327         return FPE_FLTDIV;
 328     else if (mxcsr & MXCSR_DE)
 329         return FPE_FLTUND;
 330     else if (mxcsr & MXCSR_OE)
 331         return FPE_FLTOVF;
 332     else if (mxcsr & MXCSR_UE)
 333         return FPE_FLTUND;
 334     else if (mxcsr & MXCSR_PE)
 335         return FPE_FLTRES;
 336
 337     return 0;
 338 }
 339
 340 static void
 341 sigfpe_handler(int signal, siginfo_t *siginfo, os_context_t *context)
 342 {
 343     unsigned int *mxcsr = arch_os_context_mxcsr_addr(context);
 344
 345     if (siginfo->si_code == 0) { /* XMM exception */
 346         siginfo->si_code = mxcsr_to_code(*mxcsr);
 347
 348         /* Clear sticky exception flag. */
 349         *mxcsr &= ~0x3F;
 350     }
 351
 352     interrupt_handle_now(signal, siginfo, context);
 353 }
 354 #endif
 355
 356 void
 357 arch_install_interrupt_handlers()
 358 {
 359     SHOW("entering arch_install_interrupt_handlers()");
 360
 361     /* Note: The old CMU CL code here used sigtrap_handler() to handle
 362      * SIGILL as well as SIGTRAP. I couldn't see any reason to do
 363      * things that way. So, I changed to separate handlers when
 364      * debugging a problem on OpenBSD, where SBCL wasn't catching
 365      * SIGILL properly, but was instead letting the process be
 366      * terminated with an "Illegal instruction" output. If this change
 367      * turns out to break something (maybe breakpoint handling on some
 368      * OS I haven't tested on?) and we have to go back to the old CMU
 369      * CL way, I hope there will at least be a comment to explain
 370      * why.. -- WHN 2001-06-07 */
 371 #if !defined(LISP_FEATURE_MACH_EXCEPTION_HANDLER)
 372     undoably_install_low_level_interrupt_handler(SIGILL , sigill_handler);
 373     undoably_install_low_level_interrupt_handler(SIGTRAP, sigtrap_handler);
 374 #endif
 375
 376 #ifdef X86_64_SIGFPE_FIXUP
 377     undoably_install_low_level_interrupt_handler(SIGFPE, sigfpe_handler);
 378 #endif
 379
 380     SHOW("returning from arch_install_interrupt_handlers()");
 381 }
 382 \f
 383 #ifdef LISP_FEATURE_LINKAGE_TABLE
 384 /* FIXME: It might be cleaner to generate these from the lisp side of
 385  * things.
 386  */
 387
 388 void
 389 arch_write_linkage_table_jmp(char * reloc, void * fun)
 390 {
 391     unsigned long addr = (unsigned long) fun;
 392     int i;
 393
 394     *reloc++ = 0xFF; /* Opcode for near jump to absolute reg/mem64. */
 395     *reloc++ = 0x25; /* ModRM #b00 100 101, i.e. RIP-relative. */
 396     *reloc++ = 0x00; /* 32-bit displacement field = 0 */
 397     *reloc++ = 0x00; /* ... */
 398     *reloc++ = 0x00; /* ... */
 399     *reloc++ = 0x00; /* ... */
 400
 401     for (i = 0; i < 8; i++) {
 402         *reloc++ = addr & 0xff;
 403         addr >>= 8;
 404     }
 405
 406     /* write a nop for good measure. */
 407     *reloc = 0x90;
 408 }
 409
 410 void
 411 arch_write_linkage_table_ref(void * reloc, void * data)
 412 {
 413     *(unsigned long *)reloc = (unsigned long)data;
 414 }
 415
 416 #endif
 417
 418 /* These setup and check *both* the sse2 and x87 FPUs. While lisp code
 419    only uses the sse2 FPU, other code (such as libc) may use the x87 FPU.
 420  */
 421
 422 unsigned int
 423 arch_get_fp_modes()
 424 {
 425     unsigned int temp;
 426     unsigned int result;
 427     /* return the x87 exception flags ored in with the sse2
 428      * control+status flags */
 429     asm ("fnstsw %0" : "=m" (temp));
 430     result = temp;
 431     result &= 0x3F;
 432     asm ("stmxcsr %0" : "=m" (temp));
 433     result |= temp;
 434     /* flip exception mask bits */
 435     return result ^ (0x3F << 7);
 436 }
 437
 438 struct fpenv
 439 {
 440     unsigned short cw;
 441     unsigned short unused1;
 442     unsigned short sw;
 443     unsigned short unused2;
 444     unsigned int other_regs[5];
 445 };
 446
 447 void
 448 arch_set_fp_modes(unsigned int mxcsr)
 449 {
 450     struct fpenv f_env;
 451     unsigned int temp;
 452
 453     /* turn trap enable bits into exception mask */
 454     mxcsr ^= 0x3F << 7;
 455
 456     /* set x87 modes */
 457     asm ("fnstenv %0" : "=m" (f_env));
 458     /* set control word: always long double precision
 459      * get traps and rounding from mxcsr word */
 460     f_env.cw = 0x300 | ((mxcsr >> 7) & 0x3F) | (((mxcsr >> 13) & 0x3) << 10);
 461     /* set status word: only override exception flags, from mxcsr */
 462     f_env.sw &= ~0x3F;
 463     f_env.sw |= (mxcsr & 0x3F);
 464
 465     asm ("fldenv %0" : : "m" (f_env));
 466
 467     /* now, simply, load up the mxcsr register */
 468     temp = mxcsr;
 469     asm ("ldmxcsr %0" : : "m" (temp));
 470 }