target-i386/exec.h

   1 /*
   2  *  i386 execution defines
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #include "dyngen-exec.h"
  22
  23 /* XXX: factorize this mess */
  24 #ifdef TARGET_X86_64
  25 #define TARGET_LONG_BITS 64
  26 #else
  27 #define TARGET_LONG_BITS 32
  28 #endif
  29
  30 #include "cpu-defs.h"
  31
  32 register struct CPUX86State *env asm(AREG0);
  33
  34 extern FILE *logfile;
  35 extern int loglevel;
  36
  37 #define EAX (env->regs[R_EAX])
  38 #define ECX (env->regs[R_ECX])
  39 #define EDX (env->regs[R_EDX])
  40 #define EBX (env->regs[R_EBX])
  41 #define ESP (env->regs[R_ESP])
  42 #define EBP (env->regs[R_EBP])
  43 #define ESI (env->regs[R_ESI])
  44 #define EDI (env->regs[R_EDI])
  45 #define EIP (env->eip)
  46 #define DF  (env->df)
  47
  48 #define CC_SRC (env->cc_src)
  49 #define CC_DST (env->cc_dst)
  50 #define CC_OP  (env->cc_op)
  51
  52 /* float macros */
  53 #define FT0    (env->ft0)
  54 #define ST0    (env->fpregs[env->fpstt].d)
  55 #define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
  56 #define ST1    ST(1)
  57
  58 #include "cpu.h"
  59 #include "exec-all.h"
  60
  61 void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
  62 void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
  63 void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
  64 void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
  65 int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
  66                              int is_write, int mmu_idx, int is_softmmu);
  67 void tlb_fill(target_ulong addr, int is_write, int mmu_idx,
  68               void *retaddr);
  69 void __hidden cpu_lock(void);
  70 void __hidden cpu_unlock(void);
  71 void do_interrupt(int intno, int is_int, int error_code,
  72                   target_ulong next_eip, int is_hw);
  73 void do_interrupt_user(int intno, int is_int, int error_code,
  74                        target_ulong next_eip);
  75 void raise_interrupt(int intno, int is_int, int error_code,
  76                      int next_eip_addend);
  77 void raise_exception_err(int exception_index, int error_code);
  78 void raise_exception(int exception_index);
  79 void do_smm_enter(void);
  80 void __hidden cpu_loop_exit(void);
  81
  82 void OPPROTO op_movl_eflags_T0(void);
  83 void OPPROTO op_movl_T0_eflags(void);
  84
  85 /* n must be a constant to be efficient */
  86 static inline target_long lshift(target_long x, int n)
  87 {
  88     if (n >= 0)
  89         return x << n;
  90     else
  91         return x >> (-n);
  92 }
  93
  94 #include "helper.h"
  95
  96 static inline void svm_check_intercept(uint32_t type)
  97 {
  98     helper_svm_check_intercept_param(type, 0);
  99 }
 100
 101 #if !defined(CONFIG_USER_ONLY)
 102
 103 #include "softmmu_exec.h"
 104
 105 #endif /* !defined(CONFIG_USER_ONLY) */
 106
 107 #ifdef USE_X86LDOUBLE
 108 /* use long double functions */
 109 #define floatx_to_int32 floatx80_to_int32
 110 #define floatx_to_int64 floatx80_to_int64
 111 #define floatx_to_int32_round_to_zero floatx80_to_int32_round_to_zero
 112 #define floatx_to_int64_round_to_zero floatx80_to_int64_round_to_zero
 113 #define int32_to_floatx int32_to_floatx80
 114 #define int64_to_floatx int64_to_floatx80
 115 #define float32_to_floatx float32_to_floatx80
 116 #define float64_to_floatx float64_to_floatx80
 117 #define floatx_to_float32 floatx80_to_float32
 118 #define floatx_to_float64 floatx80_to_float64
 119 #define floatx_abs floatx80_abs
 120 #define floatx_chs floatx80_chs
 121 #define floatx_round_to_int floatx80_round_to_int
 122 #define floatx_compare floatx80_compare
 123 #define floatx_compare_quiet floatx80_compare_quiet
 124 #define sin sinl
 125 #define cos cosl
 126 #define sqrt sqrtl
 127 #define pow powl
 128 #define log logl
 129 #define tan tanl
 130 #define atan2 atan2l
 131 #define floor floorl
 132 #define ceil ceill
 133 #define ldexp ldexpl
 134 #else
 135 #define floatx_to_int32 float64_to_int32
 136 #define floatx_to_int64 float64_to_int64
 137 #define floatx_to_int32_round_to_zero float64_to_int32_round_to_zero
 138 #define floatx_to_int64_round_to_zero float64_to_int64_round_to_zero
 139 #define int32_to_floatx int32_to_float64
 140 #define int64_to_floatx int64_to_float64
 141 #define float32_to_floatx float32_to_float64
 142 #define float64_to_floatx(x, e) (x)
 143 #define floatx_to_float32 float64_to_float32
 144 #define floatx_to_float64(x, e) (x)
 145 #define floatx_abs float64_abs
 146 #define floatx_chs float64_chs
 147 #define floatx_round_to_int float64_round_to_int
 148 #define floatx_compare float64_compare
 149 #define floatx_compare_quiet float64_compare_quiet
 150 #endif
 151
 152 extern CPU86_LDouble sin(CPU86_LDouble x);
 153 extern CPU86_LDouble cos(CPU86_LDouble x);
 154 extern CPU86_LDouble sqrt(CPU86_LDouble x);
 155 extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
 156 extern CPU86_LDouble log(CPU86_LDouble x);
 157 extern CPU86_LDouble tan(CPU86_LDouble x);
 158 extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
 159 extern CPU86_LDouble floor(CPU86_LDouble x);
 160 extern CPU86_LDouble ceil(CPU86_LDouble x);
 161
 162 #define RC_MASK         0xc00
 163 #define RC_NEAR         0x000
 164 #define RC_DOWN         0x400
 165 #define RC_UP           0x800
 166 #define RC_CHOP         0xc00
 167
 168 #define MAXTAN 9223372036854775808.0
 169
 170 #ifdef USE_X86LDOUBLE
 171
 172 /* only for x86 */
 173 typedef union {
 174     long double d;
 175     struct {
 176         unsigned long long lower;
 177         unsigned short upper;
 178     } l;
 179 } CPU86_LDoubleU;
 180
 181 /* the following deal with x86 long double-precision numbers */
 182 #define MAXEXPD 0x7fff
 183 #define EXPBIAS 16383
 184 #define EXPD(fp)        (fp.l.upper & 0x7fff)
 185 #define SIGND(fp)       ((fp.l.upper) & 0x8000)
 186 #define MANTD(fp)       (fp.l.lower)
 187 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
 188
 189 #else
 190
 191 /* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
 192 typedef union {
 193     double d;
 194 #if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
 195     struct {
 196         uint32_t lower;
 197         int32_t upper;
 198     } l;
 199 #else
 200     struct {
 201         int32_t upper;
 202         uint32_t lower;
 203     } l;
 204 #endif
 205 #ifndef __arm__
 206     int64_t ll;
 207 #endif
 208 } CPU86_LDoubleU;
 209
 210 /* the following deal with IEEE double-precision numbers */
 211 #define MAXEXPD 0x7ff
 212 #define EXPBIAS 1023
 213 #define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
 214 #define SIGND(fp)       ((fp.l.upper) & 0x80000000)
 215 #ifdef __arm__
 216 #define MANTD(fp)       (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
 217 #else
 218 #define MANTD(fp)       (fp.ll & ((1LL << 52) - 1))
 219 #endif
 220 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
 221 #endif
 222
 223 static inline void fpush(void)
 224 {
 225     env->fpstt = (env->fpstt - 1) & 7;
 226     env->fptags[env->fpstt] = 0; /* validate stack entry */
 227 }
 228
 229 static inline void fpop(void)
 230 {
 231     env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
 232     env->fpstt = (env->fpstt + 1) & 7;
 233 }
 234
 235 #ifndef USE_X86LDOUBLE
 236 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 237 {
 238     CPU86_LDoubleU temp;
 239     int upper, e;
 240     uint64_t ll;
 241
 242     /* mantissa */
 243     upper = lduw(ptr + 8);
 244     /* XXX: handle overflow ? */
 245     e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
 246     e |= (upper >> 4) & 0x800; /* sign */
 247     ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
 248 #ifdef __arm__
 249     temp.l.upper = (e << 20) | (ll >> 32);
 250     temp.l.lower = ll;
 251 #else
 252     temp.ll = ll | ((uint64_t)e << 52);
 253 #endif
 254     return temp.d;
 255 }
 256
 257 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 258 {
 259     CPU86_LDoubleU temp;
 260     int e;
 261
 262     temp.d = f;
 263     /* mantissa */
 264     stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
 265     /* exponent + sign */
 266     e = EXPD(temp) - EXPBIAS + 16383;
 267     e |= SIGND(temp) >> 16;
 268     stw(ptr + 8, e);
 269 }
 270 #else
 271
 272 /* we use memory access macros */
 273
 274 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 275 {
 276     CPU86_LDoubleU temp;
 277
 278     temp.l.lower = ldq(ptr);
 279     temp.l.upper = lduw(ptr + 8);
 280     return temp.d;
 281 }
 282
 283 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 284 {
 285     CPU86_LDoubleU temp;
 286
 287     temp.d = f;
 288     stq(ptr, temp.l.lower);
 289     stw(ptr + 8, temp.l.upper);
 290 }
 291
 292 #endif /* USE_X86LDOUBLE */
 293
 294 #define FPUS_IE (1 << 0)
 295 #define FPUS_DE (1 << 1)
 296 #define FPUS_ZE (1 << 2)
 297 #define FPUS_OE (1 << 3)
 298 #define FPUS_UE (1 << 4)
 299 #define FPUS_PE (1 << 5)
 300 #define FPUS_SF (1 << 6)
 301 #define FPUS_SE (1 << 7)
 302 #define FPUS_B  (1 << 15)
 303
 304 #define FPUC_EM 0x3f
 305
 306 extern const CPU86_LDouble f15rk[7];
 307
 308 void fpu_raise_exception(void);
 309 void restore_native_fp_state(CPUState *env);
 310 void save_native_fp_state(CPUState *env);
 311
 312 extern const uint8_t parity_table[256];
 313 extern const uint8_t rclw_table[32];
 314 extern const uint8_t rclb_table[32];
 315
 316 static inline uint32_t compute_eflags(void)
 317 {
 318     return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
 319 }
 320
 321 /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
 322 static inline void load_eflags(int eflags, int update_mask)
 323 {
 324     CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
 325     DF = 1 - (2 * ((eflags >> 10) & 1));
 326     env->eflags = (env->eflags & ~update_mask) |
 327         (eflags & update_mask) | 0x2;
 328 }
 329
 330 static inline void env_to_regs(void)
 331 {
 332 #ifdef reg_EAX
 333     EAX = env->regs[R_EAX];
 334 #endif
 335 #ifdef reg_ECX
 336     ECX = env->regs[R_ECX];
 337 #endif
 338 #ifdef reg_EDX
 339     EDX = env->regs[R_EDX];
 340 #endif
 341 #ifdef reg_EBX
 342     EBX = env->regs[R_EBX];
 343 #endif
 344 #ifdef reg_ESP
 345     ESP = env->regs[R_ESP];
 346 #endif
 347 #ifdef reg_EBP
 348     EBP = env->regs[R_EBP];
 349 #endif
 350 #ifdef reg_ESI
 351     ESI = env->regs[R_ESI];
 352 #endif
 353 #ifdef reg_EDI
 354     EDI = env->regs[R_EDI];
 355 #endif
 356 }
 357
 358 static inline void regs_to_env(void)
 359 {
 360 #ifdef reg_EAX
 361     env->regs[R_EAX] = EAX;
 362 #endif
 363 #ifdef reg_ECX
 364     env->regs[R_ECX] = ECX;
 365 #endif
 366 #ifdef reg_EDX
 367     env->regs[R_EDX] = EDX;
 368 #endif
 369 #ifdef reg_EBX
 370     env->regs[R_EBX] = EBX;
 371 #endif
 372 #ifdef reg_ESP
 373     env->regs[R_ESP] = ESP;
 374 #endif
 375 #ifdef reg_EBP
 376     env->regs[R_EBP] = EBP;
 377 #endif
 378 #ifdef reg_ESI
 379     env->regs[R_ESI] = ESI;
 380 #endif
 381 #ifdef reg_EDI
 382     env->regs[R_EDI] = EDI;
 383 #endif
 384 }
 385
 386 static inline int cpu_halted(CPUState *env) {
 387     /* handle exit of HALTED state */
 388     if (!env->halted)
 389         return 0;
 390     /* disable halt condition */
 391     if (((env->interrupt_request & CPU_INTERRUPT_HARD) &&
 392          (env->eflags & IF_MASK)) ||
 393         (env->interrupt_request & CPU_INTERRUPT_NMI)) {
 394         env->halted = 0;
 395         return 0;
 396     }
 397     return EXCP_HALTED;
 398 }
 399