target-i386/exec.h

   1 /*
   2  *  i386 execution defines
   3  *
   4  *  Copyright (c) 2003 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20 #include "config.h"
  21 #include "dyngen-exec.h"
  22
  23 /* XXX: factorize this mess */
  24 #ifdef TARGET_X86_64
  25 #define TARGET_LONG_BITS 64
  26 #else
  27 #define TARGET_LONG_BITS 32
  28 #endif
  29
  30 #include "cpu-defs.h"
  31
  32 /* at least 4 register variables are defined */
  33 register struct CPUX86State *env asm(AREG0);
  34
  35 #if TARGET_LONG_BITS > HOST_LONG_BITS
  36
  37 /* no registers can be used */
  38 #define T0 (env->t0)
  39 #define T1 (env->t1)
  40 #define T2 (env->t2)
  41
  42 #else
  43
  44 /* XXX: use unsigned long instead of target_ulong - better code will
  45    be generated for 64 bit CPUs */
  46 register target_ulong T0 asm(AREG1);
  47 register target_ulong T1 asm(AREG2);
  48 register target_ulong T2 asm(AREG3);
  49
  50 /* if more registers are available, we define some registers too */
  51 #ifdef AREG4
  52 register target_ulong EAX asm(AREG4);
  53 #define reg_EAX
  54 #endif
  55
  56 #ifdef AREG5
  57 register target_ulong ESP asm(AREG5);
  58 #define reg_ESP
  59 #endif
  60
  61 #ifdef AREG6
  62 register target_ulong EBP asm(AREG6);
  63 #define reg_EBP
  64 #endif
  65
  66 #ifdef AREG7
  67 register target_ulong ECX asm(AREG7);
  68 #define reg_ECX
  69 #endif
  70
  71 #ifdef AREG8
  72 register target_ulong EDX asm(AREG8);
  73 #define reg_EDX
  74 #endif
  75
  76 #ifdef AREG9
  77 register target_ulong EBX asm(AREG9);
  78 #define reg_EBX
  79 #endif
  80
  81 #ifdef AREG10
  82 register target_ulong ESI asm(AREG10);
  83 #define reg_ESI
  84 #endif
  85
  86 #ifdef AREG11
  87 register target_ulong EDI asm(AREG11);
  88 #define reg_EDI
  89 #endif
  90
  91 #endif /* ! (TARGET_LONG_BITS > HOST_LONG_BITS) */
  92
  93 #define A0 T2
  94
  95 extern FILE *logfile;
  96 extern int loglevel;
  97
  98 #ifndef reg_EAX
  99 #define EAX (env->regs[R_EAX])
 100 #endif
 101 #ifndef reg_ECX
 102 #define ECX (env->regs[R_ECX])
 103 #endif
 104 #ifndef reg_EDX
 105 #define EDX (env->regs[R_EDX])
 106 #endif
 107 #ifndef reg_EBX
 108 #define EBX (env->regs[R_EBX])
 109 #endif
 110 #ifndef reg_ESP
 111 #define ESP (env->regs[R_ESP])
 112 #endif
 113 #ifndef reg_EBP
 114 #define EBP (env->regs[R_EBP])
 115 #endif
 116 #ifndef reg_ESI
 117 #define ESI (env->regs[R_ESI])
 118 #endif
 119 #ifndef reg_EDI
 120 #define EDI (env->regs[R_EDI])
 121 #endif
 122 #define EIP  (env->eip)
 123 #define DF  (env->df)
 124
 125 #define CC_SRC (env->cc_src)
 126 #define CC_DST (env->cc_dst)
 127 #define CC_OP  (env->cc_op)
 128
 129 /* float macros */
 130 #define FT0    (env->ft0)
 131 #define ST0    (env->fpregs[env->fpstt].d)
 132 #define ST(n)  (env->fpregs[(env->fpstt + (n)) & 7].d)
 133 #define ST1    ST(1)
 134
 135 #ifdef USE_FP_CONVERT
 136 #define FP_CONVERT  (env->fp_convert)
 137 #endif
 138
 139 #include "cpu.h"
 140 #include "exec-all.h"
 141
 142 typedef struct CCTable {
 143     int (*compute_all)(void); /* return all the flags */
 144     int (*compute_c)(void);  /* return the C flag */
 145 } CCTable;
 146
 147 extern CCTable cc_table[];
 148
 149 void load_seg(int seg_reg, int selector);
 150 void helper_ljmp_protected_T0_T1(int next_eip);
 151 void helper_lcall_real_T0_T1(int shift, int next_eip);
 152 void helper_lcall_protected_T0_T1(int shift, int next_eip);
 153 void helper_iret_real(int shift);
 154 void helper_iret_protected(int shift, int next_eip);
 155 void helper_lret_protected(int shift, int addend);
 156 void helper_lldt_T0(void);
 157 void helper_ltr_T0(void);
 158 void helper_movl_crN_T0(int reg);
 159 void helper_movl_drN_T0(int reg);
 160 void helper_invlpg(target_ulong addr);
 161 void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
 162 void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
 163 void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
 164 void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
 165 int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
 166                              int is_write, int is_user, int is_softmmu);
 167 void tlb_fill(target_ulong addr, int is_write, int is_user,
 168               void *retaddr);
 169 void __hidden cpu_lock(void);
 170 void __hidden cpu_unlock(void);
 171 void do_interrupt(int intno, int is_int, int error_code,
 172                   target_ulong next_eip, int is_hw);
 173 void do_interrupt_user(int intno, int is_int, int error_code,
 174                        target_ulong next_eip);
 175 void raise_interrupt(int intno, int is_int, int error_code,
 176                      int next_eip_addend);
 177 void raise_exception_err(int exception_index, int error_code);
 178 void raise_exception(int exception_index);
 179 void __hidden cpu_loop_exit(void);
 180
 181 void OPPROTO op_movl_eflags_T0(void);
 182 void OPPROTO op_movl_T0_eflags(void);
 183 void helper_divl_EAX_T0(void);
 184 void helper_idivl_EAX_T0(void);
 185 void helper_mulq_EAX_T0(void);
 186 void helper_imulq_EAX_T0(void);
 187 void helper_imulq_T0_T1(void);
 188 void helper_divq_EAX_T0(void);
 189 void helper_idivq_EAX_T0(void);
 190 void helper_cmpxchg8b(void);
 191 void helper_cpuid(void);
 192 void helper_enter_level(int level, int data32);
 193 void helper_enter64_level(int level, int data64);
 194 void helper_sysenter(void);
 195 void helper_sysexit(void);
 196 void helper_syscall(int next_eip_addend);
 197 void helper_sysret(int dflag);
 198 void helper_rdtsc(void);
 199 void helper_rdmsr(void);
 200 void helper_wrmsr(void);
 201 void helper_lsl(void);
 202 void helper_lar(void);
 203 void helper_verr(void);
 204 void helper_verw(void);
 205
 206 void check_iob_T0(void);
 207 void check_iow_T0(void);
 208 void check_iol_T0(void);
 209 void check_iob_DX(void);
 210 void check_iow_DX(void);
 211 void check_iol_DX(void);
 212
 213 #if !defined(CONFIG_USER_ONLY)
 214
 215 #include "softmmu_exec.h"
 216
 217 static inline double ldfq(target_ulong ptr)
 218 {
 219     union {
 220         double d;
 221         uint64_t i;
 222     } u;
 223     u.i = ldq(ptr);
 224     return u.d;
 225 }
 226
 227 static inline void stfq(target_ulong ptr, double v)
 228 {
 229     union {
 230         double d;
 231         uint64_t i;
 232     } u;
 233     u.d = v;
 234     stq(ptr, u.i);
 235 }
 236
 237 static inline float ldfl(target_ulong ptr)
 238 {
 239     union {
 240         float f;
 241         uint32_t i;
 242     } u;
 243     u.i = ldl(ptr);
 244     return u.f;
 245 }
 246
 247 static inline void stfl(target_ulong ptr, float v)
 248 {
 249     union {
 250         float f;
 251         uint32_t i;
 252     } u;
 253     u.f = v;
 254     stl(ptr, u.i);
 255 }
 256
 257 #endif /* !defined(CONFIG_USER_ONLY) */
 258
 259 #ifdef USE_X86LDOUBLE
 260 /* use long double functions */
 261 #define floatx_to_int32 floatx80_to_int32
 262 #define floatx_to_int64 floatx80_to_int64
 263 #define floatx_abs floatx80_abs
 264 #define floatx_chs floatx80_chs
 265 #define floatx_round_to_int floatx80_round_to_int
 266 #define floatx_compare floatx80_compare
 267 #define floatx_compare_quiet floatx80_compare_quiet
 268 #define sin sinl
 269 #define cos cosl
 270 #define sqrt sqrtl
 271 #define pow powl
 272 #define log logl
 273 #define tan tanl
 274 #define atan2 atan2l
 275 #define floor floorl
 276 #define ceil ceill
 277 #define ldexp ldexpl
 278 #else
 279 #define floatx_to_int32 float64_to_int32
 280 #define floatx_to_int64 float64_to_int64
 281 #define floatx_abs float64_abs
 282 #define floatx_chs float64_chs
 283 #define floatx_round_to_int float64_round_to_int
 284 #define floatx_compare float64_compare
 285 #define floatx_compare_quiet float64_compare_quiet
 286 #endif
 287
 288 extern CPU86_LDouble sin(CPU86_LDouble x);
 289 extern CPU86_LDouble cos(CPU86_LDouble x);
 290 extern CPU86_LDouble sqrt(CPU86_LDouble x);
 291 extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
 292 extern CPU86_LDouble log(CPU86_LDouble x);
 293 extern CPU86_LDouble tan(CPU86_LDouble x);
 294 extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
 295 extern CPU86_LDouble floor(CPU86_LDouble x);
 296 extern CPU86_LDouble ceil(CPU86_LDouble x);
 297
 298 #define RC_MASK         0xc00
 299 #define RC_NEAR         0x000
 300 #define RC_DOWN         0x400
 301 #define RC_UP           0x800
 302 #define RC_CHOP         0xc00
 303
 304 #define MAXTAN 9223372036854775808.0
 305
 306 #ifdef USE_X86LDOUBLE
 307
 308 /* only for x86 */
 309 typedef union {
 310     long double d;
 311     struct {
 312         unsigned long long lower;
 313         unsigned short upper;
 314     } l;
 315 } CPU86_LDoubleU;
 316
 317 /* the following deal with x86 long double-precision numbers */
 318 #define MAXEXPD 0x7fff
 319 #define EXPBIAS 16383
 320 #define EXPD(fp)        (fp.l.upper & 0x7fff)
 321 #define SIGND(fp)       ((fp.l.upper) & 0x8000)
 322 #define MANTD(fp)       (fp.l.lower)
 323 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
 324
 325 #else
 326
 327 /* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
 328 typedef union {
 329     double d;
 330 #if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
 331     struct {
 332         uint32_t lower;
 333         int32_t upper;
 334     } l;
 335 #else
 336     struct {
 337         int32_t upper;
 338         uint32_t lower;
 339     } l;
 340 #endif
 341 #ifndef __arm__
 342     int64_t ll;
 343 #endif
 344 } CPU86_LDoubleU;
 345
 346 /* the following deal with IEEE double-precision numbers */
 347 #define MAXEXPD 0x7ff
 348 #define EXPBIAS 1023
 349 #define EXPD(fp)        (((fp.l.upper) >> 20) & 0x7FF)
 350 #define SIGND(fp)       ((fp.l.upper) & 0x80000000)
 351 #ifdef __arm__
 352 #define MANTD(fp)       (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
 353 #else
 354 #define MANTD(fp)       (fp.ll & ((1LL << 52) - 1))
 355 #endif
 356 #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
 357 #endif
 358
 359 static inline void fpush(void)
 360 {
 361     env->fpstt = (env->fpstt - 1) & 7;
 362     env->fptags[env->fpstt] = 0; /* validate stack entry */
 363 }
 364
 365 static inline void fpop(void)
 366 {
 367     env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
 368     env->fpstt = (env->fpstt + 1) & 7;
 369 }
 370
 371 #ifndef USE_X86LDOUBLE
 372 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 373 {
 374     CPU86_LDoubleU temp;
 375     int upper, e;
 376     uint64_t ll;
 377
 378     /* mantissa */
 379     upper = lduw(ptr + 8);
 380     /* XXX: handle overflow ? */
 381     e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
 382     e |= (upper >> 4) & 0x800; /* sign */
 383     ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
 384 #ifdef __arm__
 385     temp.l.upper = (e << 20) | (ll >> 32);
 386     temp.l.lower = ll;
 387 #else
 388     temp.ll = ll | ((uint64_t)e << 52);
 389 #endif
 390     return temp.d;
 391 }
 392
 393 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 394 {
 395     CPU86_LDoubleU temp;
 396     int e;
 397
 398     temp.d = f;
 399     /* mantissa */
 400     stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
 401     /* exponent + sign */
 402     e = EXPD(temp) - EXPBIAS + 16383;
 403     e |= SIGND(temp) >> 16;
 404     stw(ptr + 8, e);
 405 }
 406 #else
 407
 408 /* XXX: same endianness assumed */
 409
 410 #ifdef CONFIG_USER_ONLY
 411
 412 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 413 {
 414     return *(CPU86_LDouble *)ptr;
 415 }
 416
 417 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 418 {
 419     *(CPU86_LDouble *)ptr = f;
 420 }
 421
 422 #else
 423
 424 /* we use memory access macros */
 425
 426 static inline CPU86_LDouble helper_fldt(target_ulong ptr)
 427 {
 428     CPU86_LDoubleU temp;
 429
 430     temp.l.lower = ldq(ptr);
 431     temp.l.upper = lduw(ptr + 8);
 432     return temp.d;
 433 }
 434
 435 static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
 436 {
 437     CPU86_LDoubleU temp;
 438
 439     temp.d = f;
 440     stq(ptr, temp.l.lower);
 441     stw(ptr + 8, temp.l.upper);
 442 }
 443
 444 #endif /* !CONFIG_USER_ONLY */
 445
 446 #endif /* USE_X86LDOUBLE */
 447
 448 #define FPUS_IE (1 << 0)
 449 #define FPUS_DE (1 << 1)
 450 #define FPUS_ZE (1 << 2)
 451 #define FPUS_OE (1 << 3)
 452 #define FPUS_UE (1 << 4)
 453 #define FPUS_PE (1 << 5)
 454 #define FPUS_SF (1 << 6)
 455 #define FPUS_SE (1 << 7)
 456 #define FPUS_B  (1 << 15)
 457
 458 #define FPUC_EM 0x3f
 459
 460 extern const CPU86_LDouble f15rk[7];
 461
 462 void helper_fldt_ST0_A0(void);
 463 void helper_fstt_ST0_A0(void);
 464 void fpu_raise_exception(void);
 465 CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
 466 void helper_fbld_ST0_A0(void);
 467 void helper_fbst_ST0_A0(void);
 468 void helper_f2xm1(void);
 469 void helper_fyl2x(void);
 470 void helper_fptan(void);
 471 void helper_fpatan(void);
 472 void helper_fxtract(void);
 473 void helper_fprem1(void);
 474 void helper_fprem(void);
 475 void helper_fyl2xp1(void);
 476 void helper_fsqrt(void);
 477 void helper_fsincos(void);
 478 void helper_frndint(void);
 479 void helper_fscale(void);
 480 void helper_fsin(void);
 481 void helper_fcos(void);
 482 void helper_fxam_ST0(void);
 483 void helper_fstenv(target_ulong ptr, int data32);
 484 void helper_fldenv(target_ulong ptr, int data32);
 485 void helper_fsave(target_ulong ptr, int data32);
 486 void helper_frstor(target_ulong ptr, int data32);
 487 void helper_fxsave(target_ulong ptr, int data64);
 488 void helper_fxrstor(target_ulong ptr, int data64);
 489 void restore_native_fp_state(CPUState *env);
 490 void save_native_fp_state(CPUState *env);
 491 float approx_rsqrt(float a);
 492 float approx_rcp(float a);
 493 void update_fp_status(void);
 494
 495 extern const uint8_t parity_table[256];
 496 extern const uint8_t rclw_table[32];
 497 extern const uint8_t rclb_table[32];
 498
 499 static inline uint32_t compute_eflags(void)
 500 {
 501     return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
 502 }
 503
 504 /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
 505 static inline void load_eflags(int eflags, int update_mask)
 506 {
 507     CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
 508     DF = 1 - (2 * ((eflags >> 10) & 1));
 509     env->eflags = (env->eflags & ~update_mask) |
 510         (eflags & update_mask);
 511 }
 512
 513 static inline void env_to_regs(void)
 514 {
 515 #ifdef reg_EAX
 516     EAX = env->regs[R_EAX];
 517 #endif
 518 #ifdef reg_ECX
 519     ECX = env->regs[R_ECX];
 520 #endif
 521 #ifdef reg_EDX
 522     EDX = env->regs[R_EDX];
 523 #endif
 524 #ifdef reg_EBX
 525     EBX = env->regs[R_EBX];
 526 #endif
 527 #ifdef reg_ESP
 528     ESP = env->regs[R_ESP];
 529 #endif
 530 #ifdef reg_EBP
 531     EBP = env->regs[R_EBP];
 532 #endif
 533 #ifdef reg_ESI
 534     ESI = env->regs[R_ESI];
 535 #endif
 536 #ifdef reg_EDI
 537     EDI = env->regs[R_EDI];
 538 #endif
 539 }
 540
 541 static inline void regs_to_env(void)
 542 {
 543 #ifdef reg_EAX
 544     env->regs[R_EAX] = EAX;
 545 #endif
 546 #ifdef reg_ECX
 547     env->regs[R_ECX] = ECX;
 548 #endif
 549 #ifdef reg_EDX
 550     env->regs[R_EDX] = EDX;
 551 #endif
 552 #ifdef reg_EBX
 553     env->regs[R_EBX] = EBX;
 554 #endif
 555 #ifdef reg_ESP
 556     env->regs[R_ESP] = ESP;
 557 #endif
 558 #ifdef reg_EBP
 559     env->regs[R_EBP] = EBP;
 560 #endif
 561 #ifdef reg_ESI
 562     env->regs[R_ESI] = ESI;
 563 #endif
 564 #ifdef reg_EDI
 565     env->regs[R_EDI] = EDI;
 566 #endif
 567 }