repo.or.cz
/
qemu
/
kevin.git
/
search
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
log
|
graphiclog1
|
graphiclog2
|
commit
|
commitdiff
|
tree
|
refs
|
edit
|
fork
first
·
prev
·
next
misc: Remove redundant new line in perror()
2021-06-24
A
l
istair Francis
hw/risc
v
:
O
p
enTitan:
C
onnect the mtime
and mti
m
ec
m
p
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-24
Alistair F
r
anci
s
hw
/
tim
e
r: I
n
itial commit of
Ibex
T
i
mer
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-24
A
listair Francis
h
w/char/ibex_uart
:
Make
the re
g
i
ste
r
layout
privat
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-24
Alistair Francis
target/risc
v
:
U
s
e targ
e
t
_
ulo
n
g for the DisasContext
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-07
Alistair F
r
ancis
ta
r
g
et/riscv/pmp: Add ass
e
rt for ePMP o
p
e
r
a
tions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-06-07
Alistair Fr
a
ncis
docs/system:
Move
t
he RISC-
V
-b
i
os
informat
i
on to remove
d
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair F
r
a
n
cis
target/r
i
scv: Fix th
e
RV64H de
c
o
de comme
n
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Francis
t
a
rg
e
t
/
r
i
s
cv
:
Con
s
o
l
i
d
ate RV32/64 16-bit instruc
t
ions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Franc
i
s
target/riscv:
C
onso
l
i
date RV3
2
/64 32-bit instructions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Ali
s
t
a
i
r
Francis
target/riscv: Remove an
unused CAS
E
_OP_32_64 m
a
cro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Francis
target/riscv:
Remove t
h
e
unus
e
d HSTATUS_WPRI mac
r
o
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Francis
target/ri
s
cv: Remove the hardcode
d
S
ATP_MODE macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alista
i
r Francis
target/
r
i
scv: R
e
m
o
v
e
the
h
a
r
dcoded
M
STATUS_SD macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
A
l
i
stair Francis
targ
e
t/riscv: Remove th
e
ha
r
dco
d
ed HGATP_M
O
DE
ma
c
ro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Fra
n
cis
target/riscv: Remove the
hardcoded
SSTAT
U
S_SD m
a
c
ro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
A
listai
r
Francis
target/
r
iscv: Remove the
h
ardcoded RVXL
E
N
macr
o
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alis
t
air Francis
targ
e
t/r
i
scv: Add ePMP support for the
Ibex C
P
U
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair F
r
ancis
targe
t
/riscv/pmp:
Remove outdated
c
omment
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Francis
target/riscv: Add
t
h
e ePMP feature
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
A
listair Francis
t
a
r
get
/
ri
s
cv: Fi
x
the
PMP is locked ch
e
c
k
when u
s
ing TOR
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
A
listai
r
Francis
h
w
/ri
s
c
v
: Enable
V
I
RTIO
_
VGA for RISC-V virt machi
n
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair
F
rancis
hw/open
t
itan: Update t
h
e interrupt
l
ayout
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Fra
n
cis
M
A
INTA
I
NERS: Upda
t
e th
e
RISC-V CPU M
a
intai
n
e
r
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair F
r
a
ncis
t
a
rget/riscv: Use RISCVExceptio
n
enum for CSR access
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
A
listair Francis
target/riscv: Use
t
he RISCVE
x
ception enum for CS
R
operations
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Fra
n
cis
target/riscv:
F
ix 32
-
bi
t
HS mode a
c
cess permissions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair
F
rancis
t
arget/
r
i
scv:
Use the RISCVException enum for CSR predicates
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-05-11
Alistair Franc
i
s
target/riscv:
C
o
nvert the
RISC-V exceptions t
o
a
n enum
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-03-04
Alistair Francis
MAI
N
T
AINE
R
S:
Add a
SiFive machine section
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-02-13
Alista
i
r Fr
a
n
c
is
linux-
u
s
er/signal: Decod
e
waitid s
i
_code
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2021-01-16
Alistair Francis
riscv
:
Pass RISCVHartArrayState by p
o
i
n
te
r
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistai
r
Fran
c
is
riscv
/
op
e
nti
t
a
n
:
Update
t
h
e
Ope
n
Ti
t
a
n memory layout
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Francis
hw/
r
iscv: U
s
e the CPU
to determine if
3
2-
b
it
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistai
r
F
ra
n
ci
s
t
a
rget/riscv: cpu: Set
XLEN indep
e
ndently
f
rom target
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alis
t
air Francis
ta
r
get/riscv: csr: Remove compi
l
e time XLEN checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistai
r
Fran
c
is
t
a
rget/risc
v
:
cpu_helper:
R
e
m
o
ve compile time XL
E
N
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alist
a
ir F
r
ancis
target/riscv:
cp
u
: Remove com
p
ile time XLEN checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alist
a
ir Franc
i
s
target/r
i
scv: Specif
y
th
e
XLE
N
f
or
C
PUs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Ali
s
tair Fra
n
c
i
s
targe
t
/riscv:
A
dd
a
riscv_cpu_is_32bit() helper functio
n
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
listair Francis
target/riscv
:
fp
u
_helper: Match function defs in HELPER
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Ali
s
tair
Fra
n
ci
s
hw/riscv:
s
ifive_u: Remove
com
p
i
l
e
time
X
LEN checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Al
i
stair Francis
hw/ris
c
v: spik
e
: Remo
v
e compile time
XLEN checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Ali
s
tair Franci
s
hw/riscv:
v
irt: Remove co
m
pi
l
e tim
e
XLEN chec
k
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
l
istair F
r
ancis
hw/r
i
scv:
boot: Remo
v
e compile
t
ime
X
L
EN checks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
l
i
stair F
r
a
ncis
riscv: virt: Remove target macro c
o
nditionals
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alistair Fra
n
cis
riscv: spike:
R
emove target macro con
d
itionals
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
l
ista
i
r Franci
s
tar
g
et/risc
v
: Add a TYPE_RISCV_CPU
_
B
A
S
E CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
A
listai
r
Francis
hw/riscv
:
Expand the is 32-bit chec
k
t
o
s
upport more
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-12-18
Alis
t
air Francis
i
n
tc
/
ibex_
p
lic: Clear interrupts tha
t
occur during
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-17
A
listair Fr
a
nci
s
register: Remove
u
n
n
e
c
e
s
sary NULL
check
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-14
Alistair Francis
in
t
c/ibex_
p
lic: En
s
ure we do
n
't loose interrupts
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-14
Alistair Francis
i
ntc/ibex_plic
:
Fix so
m
e typos in
t
he comments
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alis
t
air Francis
hw/intc/ibex_plic: Clear
the claim
regi
s
t
er when r
e
a
d
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
A
listair Francis
target/riscv:
Split
the
H
y
pervisor execute load
helpers
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
A
l
istai
r
Francis
target/riscv: Remove t
h
e
hyp loa
d
and store
functi
o
ns
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
A
l
i
stair Francis
target/riscv: Remove the HS_TWO_STAGE fla
g
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistair Francis
targ
e
t
/
risc
v
: Set th
e
virtua
l
is
e
d MMU mode whe
n
doing
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-09
Alistair Francis
t
ar
g
et/risc
v
:
Add
a virtu
a
lise
d
MMU Mode
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-11-04
Alistair Franc
i
s
linux-user/sysc
a
ll: Fix missi
n
g targ
e
t_to_
h
o
s
t_time
s
pec64
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
A
l
i
s
tair F
r
anci
s
hw/riscv:
Load
t
h
e
kerne
l
after the firmware
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Ali
s
tair F
r
ancis
hw
/
riscv: Add a risc
v
_
i
s
_
32_bit()
function
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Alistair Francis
hw/ri
s
c
v
:
Retu
r
n the en
d
a
d
dress o
f
the loaded firmwar
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Alis
t
a
ir
F
r
ancis
hw/riscv
:
sif
i
ve_u:
A
llow specifying
the CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-10-22
Alistair F
r
an
c
is
riscv
:
Convert
i
nterrupt l
o
gs t
o
use qemu_lo
g
_mask()
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-09-25
Alistair
F
rancis
c
ore/regi
s
t
er
:
Spe
c
ify i
n
stan
c
e_size in
the TypeIn
f
o
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistai
r
Francis
target/
r
iscv: Support the V
i
rtual Instruction fa
u
lt
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Ali
s
t
air
F
ranci
s
target/r
i
scv
:
Return t
h
e exception from invalid CSR
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
li
s
tair Fran
c
is
targ
e
t/riscv: Support the v0
.
6 Hypervisor extension
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Ali
s
tai
r
Francis
t
a
r
get/
r
iscv: Only support little endian gues
t
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
l
i
s
t
air Fr
a
n
cis
targe
t
/ri
s
cv: Only support a single VSXL le
n
gth
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alis
t
air Franc
i
s
target/ris
c
v: U
p
date
the CSRs to the v0
.
6 Hyp extension
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair
Franc
i
s
target/riscv: Update t
h
e Hyper
v
isor trap re
t
urn/entry
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Al
i
s
tair Francis
t
arget/riscv: Fix the i
n
terrupt
cause code
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Franci
s
ta
r
get/riscv: Conver
t
MSTATUS MTL to GVA
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
listair
F
rancis
target/riscv: Don'
t
allow guest
t
o wr
i
te to h
t
inst
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
A
l
istair
Francis
targ
e
t/ris
c
v: Do two-sta
g
e lo
o
ku
p
s on hl
v
/hlvx
/
hsv
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alistair Francis
target/r
i
scv:
Al
l
ow gene
r
a
t
i
ng hlv/
h
l
v
x/h
s
v i
n
str
u
cti
o
n
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-25
Alis
t
air
F
rancis
targe
t
/riscv: All
o
w setting
a t
w
o-sta
g
e lookup in
t
h
e
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
A
l
istair
F
r
ancis
hw/intc: ibex_plic: Ho
n
o
u
r source pr
i
orit
i
es
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
Alist
a
i
r
Francis
hw/int
c
:
ibex_plic: Don
'
t allow repe
a
t interrupt
s
on
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-22
Alistair F
r
anc
i
s
hw/intc:
i
bex_plic: U
p
date the pen
d
ing
i
rqs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-08-21
A
lista
i
r Fran
c
is
hw
/
sd/pl181: Replace fprintf(stderr, "*
\
n
"
)
w
i
th
e
r
ro
r
_repor
t
(
)
Signed-off-by:
Alistair Francis
<alistair.francis@xilinx.com>
commit
|
commitdiff
|
tree
2020-07-14
A
l
istair Franci
s
hw/char: Convert the Ib
e
x U
A
RT to use the
r
eg
i
sterfie
l
ds API
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-07-14
Alistair Francis
hw/ch
a
r: C
o
nvert the Ibex
U
ART to use
the qde
v
Cloc
k
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-07-02
Alistair
F
rancis
hw
/
r
i
scv: A
l
low 64 bit acce
s
s to SiFive CLINT
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Fra
n
c
i
s
t
arg
e
t/riscv:
U
se a smaller guess size for
n
o-MMU PMP
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
listair Francis
riscv/o
p
entitan: C
o
nnect th
e
UART device
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
l
istair
Francis
r
iscv/open
t
itan:
Connect
t
h
e
P
LIC
d
evic
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Fran
c
i
s
hw/intc
:
I
n
itial co
m
mit o
f
l
owRISC Ib
e
x
PLIC
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
listair Franc
i
s
hw/char: In
i
tia
l
commit of Ibex
UA
R
T
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
list
a
ir Fra
n
ci
s
r
i
scv/
o
pe
n
t
itan: Fi
x
the
R
OM size
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
A
l
istair Francis
target/ri
s
cv: Im
p
lement ch
e
cks for hfence
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Ali
s
tair Francis
targ
e
t/ri
s
cv: Move the hfence in
s
tructions to the r
v
h
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistair Francis
t
arget/
r
iscv
:
Report e
r
rors validating 2nd-stage PTE
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alistai
r
Francis
t
a
r
ge
t
/riscv: S
e
t access as dat
a
_load when validati
n
g
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-19
Alist
a
ir Fr
a
nci
s
sifi
v
e
_
e
: Support the
r
evB machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Francis
riscv: Initial commi
t
of
Op
e
n
T
i
tan machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair F
r
ancis
target/ris
c
v:
A
dd the lowRI
S
C Ibex CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Fran
c
is
target/ri
s
cv
:
Don't set
PMP fea
t
ure in the cpu i
n
it
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2020-06-03
Alistair Fr
a
nci
s
target/riscv: Disable the MMU correc
t
l
y
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
next