| commit | 330d2ae32af9a278bc8aa88d598f7750ff27f3dd | |
| author | Alistair Francis <alistair.francis@wdc.com> | |
| Thu, 1 Apr 2021 15:17:29 +0000 (1 11:17 -0400) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Tue, 11 May 2021 10:02:06 +0000 (11 20:02 +1000) | ||
| tree | ba139a94e8a4b885d7178630b8f6a64f044b1c81 | treesnapshot (tar.gz zip) |
| parent | 8a2aca3d79f8719b9cf79fdcdfbb89bc6bdb522a | commitdiff |
target/riscv: Convert the RISC-V exceptions to an enum
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: f191dcf08bf413a822e743a7c7f824d68879a527.1617290165.git.alistair.francis@wdc.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: f191dcf08bf413a822e743a7c7f824d68879a527.1617290165.git.alistair.francis@wdc.com
| target/riscv/cpu.c | diffblobblamehistory | |
| target/riscv/cpu_bits.h | diffblobblamehistory | |
| target/riscv/cpu_helper.c | diffblobblamehistory |