2 * Copyright (c) 2018 Jean-Christophe Dubois <jcd@tribudubois.net>
4 * i.MX6UL SOC emulation.
6 * Based on hw/arm/fsl-imx7.c
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
19 #include "qemu/osdep.h"
20 #include "qapi/error.h"
21 #include "hw/arm/fsl-imx6ul.h"
22 #include "hw/misc/unimp.h"
23 #include "hw/usb/imx-usb-phy.h"
24 #include "hw/boards.h"
25 #include "sysemu/sysemu.h"
26 #include "qemu/error-report.h"
27 #include "qemu/module.h"
31 static void fsl_imx6ul_init(Object
*obj
)
33 FslIMX6ULState
*s
= FSL_IMX6UL(obj
);
37 object_initialize_child(obj
, "cpu0", &s
->cpu
,
38 ARM_CPU_TYPE_NAME("cortex-a7"));
43 object_initialize_child(obj
, "a7mpcore", &s
->a7mpcore
,
49 object_initialize_child(obj
, "ccm", &s
->ccm
, TYPE_IMX6UL_CCM
);
54 object_initialize_child(obj
, "src", &s
->src
, TYPE_IMX6_SRC
);
59 object_initialize_child(obj
, "gpcv2", &s
->gpcv2
, TYPE_IMX_GPCV2
);
64 object_initialize_child(obj
, "snvs", &s
->snvs
, TYPE_IMX7_SNVS
);
69 object_initialize_child(obj
, "gpr", &s
->gpr
, TYPE_IMX7_GPR
);
74 for (i
= 0; i
< FSL_IMX6UL_NUM_GPIOS
; i
++) {
75 snprintf(name
, NAME_SIZE
, "gpio%d", i
);
76 object_initialize_child(obj
, name
, &s
->gpio
[i
], TYPE_IMX_GPIO
);
82 for (i
= 0; i
< FSL_IMX6UL_NUM_GPTS
; i
++) {
83 snprintf(name
, NAME_SIZE
, "gpt%d", i
);
84 object_initialize_child(obj
, name
, &s
->gpt
[i
], TYPE_IMX6UL_GPT
);
90 for (i
= 0; i
< FSL_IMX6UL_NUM_EPITS
; i
++) {
91 snprintf(name
, NAME_SIZE
, "epit%d", i
+ 1);
92 object_initialize_child(obj
, name
, &s
->epit
[i
], TYPE_IMX_EPIT
);
98 for (i
= 0; i
< FSL_IMX6UL_NUM_ECSPIS
; i
++) {
99 snprintf(name
, NAME_SIZE
, "spi%d", i
+ 1);
100 object_initialize_child(obj
, name
, &s
->spi
[i
], TYPE_IMX_SPI
);
106 for (i
= 0; i
< FSL_IMX6UL_NUM_I2CS
; i
++) {
107 snprintf(name
, NAME_SIZE
, "i2c%d", i
+ 1);
108 object_initialize_child(obj
, name
, &s
->i2c
[i
], TYPE_IMX_I2C
);
114 for (i
= 0; i
< FSL_IMX6UL_NUM_UARTS
; i
++) {
115 snprintf(name
, NAME_SIZE
, "uart%d", i
);
116 object_initialize_child(obj
, name
, &s
->uart
[i
], TYPE_IMX_SERIAL
);
122 for (i
= 0; i
< FSL_IMX6UL_NUM_ETHS
; i
++) {
123 snprintf(name
, NAME_SIZE
, "eth%d", i
);
124 object_initialize_child(obj
, name
, &s
->eth
[i
], TYPE_IMX_ENET
);
128 for (i
= 0; i
< FSL_IMX6UL_NUM_USB_PHYS
; i
++) {
129 snprintf(name
, NAME_SIZE
, "usbphy%d", i
);
130 object_initialize_child(obj
, name
, &s
->usbphy
[i
], TYPE_IMX_USBPHY
);
132 for (i
= 0; i
< FSL_IMX6UL_NUM_USBS
; i
++) {
133 snprintf(name
, NAME_SIZE
, "usb%d", i
);
134 object_initialize_child(obj
, name
, &s
->usb
[i
], TYPE_CHIPIDEA
);
140 for (i
= 0; i
< FSL_IMX6UL_NUM_USDHCS
; i
++) {
141 snprintf(name
, NAME_SIZE
, "usdhc%d", i
);
142 object_initialize_child(obj
, name
, &s
->usdhc
[i
], TYPE_IMX_USDHC
);
148 for (i
= 0; i
< FSL_IMX6UL_NUM_WDTS
; i
++) {
149 snprintf(name
, NAME_SIZE
, "wdt%d", i
);
150 object_initialize_child(obj
, name
, &s
->wdt
[i
], TYPE_IMX2_WDT
);
154 static void fsl_imx6ul_realize(DeviceState
*dev
, Error
**errp
)
156 MachineState
*ms
= MACHINE(qdev_get_machine());
157 FslIMX6ULState
*s
= FSL_IMX6UL(dev
);
159 char name
[NAME_SIZE
];
163 if (ms
->smp
.cpus
> 1) {
164 error_setg(errp
, "%s: Only a single CPU is supported (%d requested)",
165 TYPE_FSL_IMX6UL
, ms
->smp
.cpus
);
169 qdev_realize(DEVICE(&s
->cpu
), NULL
, &error_abort
);
174 object_property_set_int(OBJECT(&s
->a7mpcore
), "num-cpu", 1, &error_abort
);
175 object_property_set_int(OBJECT(&s
->a7mpcore
), "num-irq",
176 FSL_IMX6UL_MAX_IRQ
+ GIC_INTERNAL
, &error_abort
);
177 sysbus_realize(SYS_BUS_DEVICE(&s
->a7mpcore
), &error_abort
);
178 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->a7mpcore
), 0, FSL_IMX6UL_A7MPCORE_ADDR
);
180 sbd
= SYS_BUS_DEVICE(&s
->a7mpcore
);
183 sysbus_connect_irq(sbd
, 0, qdev_get_gpio_in(d
, ARM_CPU_IRQ
));
184 sysbus_connect_irq(sbd
, 1, qdev_get_gpio_in(d
, ARM_CPU_FIQ
));
185 sysbus_connect_irq(sbd
, 2, qdev_get_gpio_in(d
, ARM_CPU_VIRQ
));
186 sysbus_connect_irq(sbd
, 3, qdev_get_gpio_in(d
, ARM_CPU_VFIQ
));
191 create_unimplemented_device("a7mpcore-dap", FSL_IMX6UL_A7MPCORE_DAP_ADDR
,
197 for (i
= 0; i
< FSL_IMX6UL_NUM_GPTS
; i
++) {
198 static const hwaddr FSL_IMX6UL_GPTn_ADDR
[FSL_IMX6UL_NUM_GPTS
] = {
199 FSL_IMX6UL_GPT1_ADDR
,
200 FSL_IMX6UL_GPT2_ADDR
,
203 static const int FSL_IMX6UL_GPTn_IRQ
[FSL_IMX6UL_NUM_GPTS
] = {
208 s
->gpt
[i
].ccm
= IMX_CCM(&s
->ccm
);
209 sysbus_realize(SYS_BUS_DEVICE(&s
->gpt
[i
]), &error_abort
);
211 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->gpt
[i
]), 0,
212 FSL_IMX6UL_GPTn_ADDR
[i
]);
214 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->gpt
[i
]), 0,
215 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
216 FSL_IMX6UL_GPTn_IRQ
[i
]));
222 for (i
= 0; i
< FSL_IMX6UL_NUM_EPITS
; i
++) {
223 static const hwaddr FSL_IMX6UL_EPITn_ADDR
[FSL_IMX6UL_NUM_EPITS
] = {
224 FSL_IMX6UL_EPIT1_ADDR
,
225 FSL_IMX6UL_EPIT2_ADDR
,
228 static const int FSL_IMX6UL_EPITn_IRQ
[FSL_IMX6UL_NUM_EPITS
] = {
229 FSL_IMX6UL_EPIT1_IRQ
,
230 FSL_IMX6UL_EPIT2_IRQ
,
233 s
->epit
[i
].ccm
= IMX_CCM(&s
->ccm
);
234 sysbus_realize(SYS_BUS_DEVICE(&s
->epit
[i
]), &error_abort
);
236 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->epit
[i
]), 0,
237 FSL_IMX6UL_EPITn_ADDR
[i
]);
239 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->epit
[i
]), 0,
240 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
241 FSL_IMX6UL_EPITn_IRQ
[i
]));
247 for (i
= 0; i
< FSL_IMX6UL_NUM_GPIOS
; i
++) {
248 static const hwaddr FSL_IMX6UL_GPIOn_ADDR
[FSL_IMX6UL_NUM_GPIOS
] = {
249 FSL_IMX6UL_GPIO1_ADDR
,
250 FSL_IMX6UL_GPIO2_ADDR
,
251 FSL_IMX6UL_GPIO3_ADDR
,
252 FSL_IMX6UL_GPIO4_ADDR
,
253 FSL_IMX6UL_GPIO5_ADDR
,
256 static const int FSL_IMX6UL_GPIOn_LOW_IRQ
[FSL_IMX6UL_NUM_GPIOS
] = {
257 FSL_IMX6UL_GPIO1_LOW_IRQ
,
258 FSL_IMX6UL_GPIO2_LOW_IRQ
,
259 FSL_IMX6UL_GPIO3_LOW_IRQ
,
260 FSL_IMX6UL_GPIO4_LOW_IRQ
,
261 FSL_IMX6UL_GPIO5_LOW_IRQ
,
264 static const int FSL_IMX6UL_GPIOn_HIGH_IRQ
[FSL_IMX6UL_NUM_GPIOS
] = {
265 FSL_IMX6UL_GPIO1_HIGH_IRQ
,
266 FSL_IMX6UL_GPIO2_HIGH_IRQ
,
267 FSL_IMX6UL_GPIO3_HIGH_IRQ
,
268 FSL_IMX6UL_GPIO4_HIGH_IRQ
,
269 FSL_IMX6UL_GPIO5_HIGH_IRQ
,
272 sysbus_realize(SYS_BUS_DEVICE(&s
->gpio
[i
]), &error_abort
);
274 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->gpio
[i
]), 0,
275 FSL_IMX6UL_GPIOn_ADDR
[i
]);
277 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->gpio
[i
]), 0,
278 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
279 FSL_IMX6UL_GPIOn_LOW_IRQ
[i
]));
281 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->gpio
[i
]), 1,
282 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
283 FSL_IMX6UL_GPIOn_HIGH_IRQ
[i
]));
287 * IOMUXC and IOMUXC_GPR
289 for (i
= 0; i
< 1; i
++) {
290 static const hwaddr FSL_IMX6UL_IOMUXCn_ADDR
[FSL_IMX6UL_NUM_IOMUXCS
] = {
291 FSL_IMX6UL_IOMUXC_ADDR
,
292 FSL_IMX6UL_IOMUXC_GPR_ADDR
,
295 snprintf(name
, NAME_SIZE
, "iomuxc%d", i
);
296 create_unimplemented_device(name
, FSL_IMX6UL_IOMUXCn_ADDR
[i
], 0x4000);
302 sysbus_realize(SYS_BUS_DEVICE(&s
->ccm
), &error_abort
);
303 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->ccm
), 0, FSL_IMX6UL_CCM_ADDR
);
308 sysbus_realize(SYS_BUS_DEVICE(&s
->src
), &error_abort
);
309 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->src
), 0, FSL_IMX6UL_SRC_ADDR
);
314 sysbus_realize(SYS_BUS_DEVICE(&s
->gpcv2
), &error_abort
);
315 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->gpcv2
), 0, FSL_IMX6UL_GPC_ADDR
);
317 /* Initialize all ECSPI */
318 for (i
= 0; i
< FSL_IMX6UL_NUM_ECSPIS
; i
++) {
319 static const hwaddr FSL_IMX6UL_SPIn_ADDR
[FSL_IMX6UL_NUM_ECSPIS
] = {
320 FSL_IMX6UL_ECSPI1_ADDR
,
321 FSL_IMX6UL_ECSPI2_ADDR
,
322 FSL_IMX6UL_ECSPI3_ADDR
,
323 FSL_IMX6UL_ECSPI4_ADDR
,
326 static const int FSL_IMX6UL_SPIn_IRQ
[FSL_IMX6UL_NUM_ECSPIS
] = {
327 FSL_IMX6UL_ECSPI1_IRQ
,
328 FSL_IMX6UL_ECSPI2_IRQ
,
329 FSL_IMX6UL_ECSPI3_IRQ
,
330 FSL_IMX6UL_ECSPI4_IRQ
,
333 /* Initialize the SPI */
334 sysbus_realize(SYS_BUS_DEVICE(&s
->spi
[i
]), &error_abort
);
336 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->spi
[i
]), 0,
337 FSL_IMX6UL_SPIn_ADDR
[i
]);
339 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->spi
[i
]), 0,
340 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
341 FSL_IMX6UL_SPIn_IRQ
[i
]));
347 for (i
= 0; i
< FSL_IMX6UL_NUM_I2CS
; i
++) {
348 static const hwaddr FSL_IMX6UL_I2Cn_ADDR
[FSL_IMX6UL_NUM_I2CS
] = {
349 FSL_IMX6UL_I2C1_ADDR
,
350 FSL_IMX6UL_I2C2_ADDR
,
351 FSL_IMX6UL_I2C3_ADDR
,
352 FSL_IMX6UL_I2C4_ADDR
,
355 static const int FSL_IMX6UL_I2Cn_IRQ
[FSL_IMX6UL_NUM_I2CS
] = {
362 sysbus_realize(SYS_BUS_DEVICE(&s
->i2c
[i
]), &error_abort
);
363 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->i2c
[i
]), 0, FSL_IMX6UL_I2Cn_ADDR
[i
]);
365 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->i2c
[i
]), 0,
366 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
367 FSL_IMX6UL_I2Cn_IRQ
[i
]));
373 for (i
= 0; i
< FSL_IMX6UL_NUM_UARTS
; i
++) {
374 static const hwaddr FSL_IMX6UL_UARTn_ADDR
[FSL_IMX6UL_NUM_UARTS
] = {
375 FSL_IMX6UL_UART1_ADDR
,
376 FSL_IMX6UL_UART2_ADDR
,
377 FSL_IMX6UL_UART3_ADDR
,
378 FSL_IMX6UL_UART4_ADDR
,
379 FSL_IMX6UL_UART5_ADDR
,
380 FSL_IMX6UL_UART6_ADDR
,
381 FSL_IMX6UL_UART7_ADDR
,
382 FSL_IMX6UL_UART8_ADDR
,
385 static const int FSL_IMX6UL_UARTn_IRQ
[FSL_IMX6UL_NUM_UARTS
] = {
386 FSL_IMX6UL_UART1_IRQ
,
387 FSL_IMX6UL_UART2_IRQ
,
388 FSL_IMX6UL_UART3_IRQ
,
389 FSL_IMX6UL_UART4_IRQ
,
390 FSL_IMX6UL_UART5_IRQ
,
391 FSL_IMX6UL_UART6_IRQ
,
392 FSL_IMX6UL_UART7_IRQ
,
393 FSL_IMX6UL_UART8_IRQ
,
396 qdev_prop_set_chr(DEVICE(&s
->uart
[i
]), "chardev", serial_hd(i
));
398 sysbus_realize(SYS_BUS_DEVICE(&s
->uart
[i
]), &error_abort
);
400 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->uart
[i
]), 0,
401 FSL_IMX6UL_UARTn_ADDR
[i
]);
403 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->uart
[i
]), 0,
404 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
405 FSL_IMX6UL_UARTn_IRQ
[i
]));
411 for (i
= 0; i
< FSL_IMX6UL_NUM_ETHS
; i
++) {
412 static const hwaddr FSL_IMX6UL_ENETn_ADDR
[FSL_IMX6UL_NUM_ETHS
] = {
413 FSL_IMX6UL_ENET1_ADDR
,
414 FSL_IMX6UL_ENET2_ADDR
,
417 static const int FSL_IMX6UL_ENETn_IRQ
[FSL_IMX6UL_NUM_ETHS
] = {
418 FSL_IMX6UL_ENET1_IRQ
,
419 FSL_IMX6UL_ENET2_IRQ
,
422 static const int FSL_IMX6UL_ENETn_TIMER_IRQ
[FSL_IMX6UL_NUM_ETHS
] = {
423 FSL_IMX6UL_ENET1_TIMER_IRQ
,
424 FSL_IMX6UL_ENET2_TIMER_IRQ
,
427 object_property_set_uint(OBJECT(&s
->eth
[i
]), "phy-num",
428 s
->phy_num
[i
], &error_abort
);
429 object_property_set_uint(OBJECT(&s
->eth
[i
]), "tx-ring-num",
430 FSL_IMX6UL_ETH_NUM_TX_RINGS
, &error_abort
);
431 qdev_set_nic_properties(DEVICE(&s
->eth
[i
]), &nd_table
[i
]);
432 sysbus_realize(SYS_BUS_DEVICE(&s
->eth
[i
]), &error_abort
);
434 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->eth
[i
]), 0,
435 FSL_IMX6UL_ENETn_ADDR
[i
]);
437 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->eth
[i
]), 0,
438 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
439 FSL_IMX6UL_ENETn_IRQ
[i
]));
441 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->eth
[i
]), 1,
442 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
443 FSL_IMX6UL_ENETn_TIMER_IRQ
[i
]));
447 for (i
= 0; i
< FSL_IMX6UL_NUM_USB_PHYS
; i
++) {
448 sysbus_realize(SYS_BUS_DEVICE(&s
->usbphy
[i
]), &error_abort
);
449 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->usbphy
[i
]), 0,
450 FSL_IMX6UL_USBPHY1_ADDR
+ i
* 0x1000);
453 for (i
= 0; i
< FSL_IMX6UL_NUM_USBS
; i
++) {
454 static const int FSL_IMX6UL_USBn_IRQ
[] = {
458 sysbus_realize(SYS_BUS_DEVICE(&s
->usb
[i
]), &error_abort
);
459 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->usb
[i
]), 0,
460 FSL_IMX6UL_USBO2_USB_ADDR
+ i
* 0x200);
461 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->usb
[i
]), 0,
462 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
463 FSL_IMX6UL_USBn_IRQ
[i
]));
469 for (i
= 0; i
< FSL_IMX6UL_NUM_USDHCS
; i
++) {
470 static const hwaddr FSL_IMX6UL_USDHCn_ADDR
[FSL_IMX6UL_NUM_USDHCS
] = {
471 FSL_IMX6UL_USDHC1_ADDR
,
472 FSL_IMX6UL_USDHC2_ADDR
,
475 static const int FSL_IMX6UL_USDHCn_IRQ
[FSL_IMX6UL_NUM_USDHCS
] = {
476 FSL_IMX6UL_USDHC1_IRQ
,
477 FSL_IMX6UL_USDHC2_IRQ
,
480 object_property_set_uint(OBJECT(&s
->usdhc
[i
]), "vendor",
481 SDHCI_VENDOR_IMX
, &error_abort
);
482 sysbus_realize(SYS_BUS_DEVICE(&s
->usdhc
[i
]), &error_abort
);
484 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->usdhc
[i
]), 0,
485 FSL_IMX6UL_USDHCn_ADDR
[i
]);
487 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->usdhc
[i
]), 0,
488 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
489 FSL_IMX6UL_USDHCn_IRQ
[i
]));
495 sysbus_realize(SYS_BUS_DEVICE(&s
->snvs
), &error_abort
);
496 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->snvs
), 0, FSL_IMX6UL_SNVS_HP_ADDR
);
501 for (i
= 0; i
< FSL_IMX6UL_NUM_WDTS
; i
++) {
502 static const hwaddr FSL_IMX6UL_WDOGn_ADDR
[FSL_IMX6UL_NUM_WDTS
] = {
503 FSL_IMX6UL_WDOG1_ADDR
,
504 FSL_IMX6UL_WDOG2_ADDR
,
505 FSL_IMX6UL_WDOG3_ADDR
,
507 static const int FSL_IMX6UL_WDOGn_IRQ
[FSL_IMX6UL_NUM_WDTS
] = {
508 FSL_IMX6UL_WDOG1_IRQ
,
509 FSL_IMX6UL_WDOG2_IRQ
,
510 FSL_IMX6UL_WDOG3_IRQ
,
513 object_property_set_bool(OBJECT(&s
->wdt
[i
]), "pretimeout-support",
515 sysbus_realize(SYS_BUS_DEVICE(&s
->wdt
[i
]), &error_abort
);
517 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->wdt
[i
]), 0,
518 FSL_IMX6UL_WDOGn_ADDR
[i
]);
519 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->wdt
[i
]), 0,
520 qdev_get_gpio_in(DEVICE(&s
->a7mpcore
),
521 FSL_IMX6UL_WDOGn_IRQ
[i
]));
527 sysbus_realize(SYS_BUS_DEVICE(&s
->gpr
), &error_abort
);
528 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->gpr
), 0, FSL_IMX6UL_IOMUXC_GPR_ADDR
);
533 create_unimplemented_device("sdma", FSL_IMX6UL_SDMA_ADDR
, 0x4000);
536 * SAI (Audio SSI (Synchronous Serial Interface))
538 create_unimplemented_device("sai1", FSL_IMX6UL_SAI1_ADDR
, 0x4000);
539 create_unimplemented_device("sai2", FSL_IMX6UL_SAI2_ADDR
, 0x4000);
540 create_unimplemented_device("sai3", FSL_IMX6UL_SAI3_ADDR
, 0x4000);
545 create_unimplemented_device("pwm1", FSL_IMX6UL_PWM1_ADDR
, 0x4000);
546 create_unimplemented_device("pwm2", FSL_IMX6UL_PWM2_ADDR
, 0x4000);
547 create_unimplemented_device("pwm3", FSL_IMX6UL_PWM3_ADDR
, 0x4000);
548 create_unimplemented_device("pwm4", FSL_IMX6UL_PWM4_ADDR
, 0x4000);
551 * Audio ASRC (asynchronous sample rate converter)
553 create_unimplemented_device("asrc", FSL_IMX6UL_ASRC_ADDR
, 0x4000);
558 create_unimplemented_device("can1", FSL_IMX6UL_CAN1_ADDR
, 0x4000);
559 create_unimplemented_device("can2", FSL_IMX6UL_CAN2_ADDR
, 0x4000);
564 create_unimplemented_device("aphb_dma", FSL_IMX6UL_APBH_DMA_ADDR
,
565 FSL_IMX6UL_APBH_DMA_SIZE
);
570 for (i
= 0; i
< FSL_IMX6UL_NUM_ADCS
; i
++) {
571 static const hwaddr FSL_IMX6UL_ADCn_ADDR
[FSL_IMX6UL_NUM_ADCS
] = {
572 FSL_IMX6UL_ADC1_ADDR
,
573 FSL_IMX6UL_ADC2_ADDR
,
576 snprintf(name
, NAME_SIZE
, "adc%d", i
);
577 create_unimplemented_device(name
, FSL_IMX6UL_ADCn_ADDR
[i
], 0x4000);
583 create_unimplemented_device("lcdif", FSL_IMX6UL_LCDIF_ADDR
, 0x4000);
588 memory_region_init_rom(&s
->rom
, OBJECT(dev
), "imx6ul.rom",
589 FSL_IMX6UL_ROM_SIZE
, &error_abort
);
590 memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_ROM_ADDR
,
596 memory_region_init_rom(&s
->caam
, OBJECT(dev
), "imx6ul.caam",
597 FSL_IMX6UL_CAAM_MEM_SIZE
, &error_abort
);
598 memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_CAAM_MEM_ADDR
,
604 memory_region_init_ram(&s
->ocram
, NULL
, "imx6ul.ocram",
605 FSL_IMX6UL_OCRAM_MEM_SIZE
,
607 memory_region_add_subregion(get_system_memory(), FSL_IMX6UL_OCRAM_MEM_ADDR
,
611 * internal OCRAM (128 KB) is aliased over 512 KB
613 memory_region_init_alias(&s
->ocram_alias
, OBJECT(dev
),
614 "imx6ul.ocram_alias", &s
->ocram
, 0,
615 FSL_IMX6UL_OCRAM_ALIAS_SIZE
);
616 memory_region_add_subregion(get_system_memory(),
617 FSL_IMX6UL_OCRAM_ALIAS_ADDR
, &s
->ocram_alias
);
620 static Property fsl_imx6ul_properties
[] = {
621 DEFINE_PROP_UINT32("fec1-phy-num", FslIMX6ULState
, phy_num
[0], 0),
622 DEFINE_PROP_UINT32("fec2-phy-num", FslIMX6ULState
, phy_num
[1], 1),
623 DEFINE_PROP_END_OF_LIST(),
626 static void fsl_imx6ul_class_init(ObjectClass
*oc
, void *data
)
628 DeviceClass
*dc
= DEVICE_CLASS(oc
);
630 device_class_set_props(dc
, fsl_imx6ul_properties
);
631 dc
->realize
= fsl_imx6ul_realize
;
632 dc
->desc
= "i.MX6UL SOC";
633 /* Reason: Uses serial_hds and nd_table in realize() directly */
634 dc
->user_creatable
= false;
637 static const TypeInfo fsl_imx6ul_type_info
= {
638 .name
= TYPE_FSL_IMX6UL
,
639 .parent
= TYPE_DEVICE
,
640 .instance_size
= sizeof(FslIMX6ULState
),
641 .instance_init
= fsl_imx6ul_init
,
642 .class_init
= fsl_imx6ul_class_init
,
645 static void fsl_imx6ul_register_types(void)
647 type_register_static(&fsl_imx6ul_type_info
);
649 type_init(fsl_imx6ul_register_types
)