2 * Xilinx ZynqMP ZCU102 board
4 * Copyright (C) 2015 Xilinx Inc
5 * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 #include "qemu/osdep.h"
19 #include "qapi/error.h"
21 #include "hw/arm/xlnx-zynqmp.h"
22 #include "hw/boards.h"
23 #include "qemu/error-report.h"
25 #include "sysemu/qtest.h"
26 #include "sysemu/device_tree.h"
28 typedef struct XlnxZCU102
{
29 MachineState parent_obj
;
36 struct arm_boot_info binfo
;
39 #define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
40 #define ZCU102_MACHINE(obj) \
41 OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE)
44 static bool zcu102_get_secure(Object
*obj
, Error
**errp
)
46 XlnxZCU102
*s
= ZCU102_MACHINE(obj
);
51 static void zcu102_set_secure(Object
*obj
, bool value
, Error
**errp
)
53 XlnxZCU102
*s
= ZCU102_MACHINE(obj
);
58 static bool zcu102_get_virt(Object
*obj
, Error
**errp
)
60 XlnxZCU102
*s
= ZCU102_MACHINE(obj
);
65 static void zcu102_set_virt(Object
*obj
, bool value
, Error
**errp
)
67 XlnxZCU102
*s
= ZCU102_MACHINE(obj
);
72 static void zcu102_modify_dtb(const struct arm_boot_info
*binfo
, void *fdt
)
74 XlnxZCU102
*s
= container_of(binfo
, XlnxZCU102
, binfo
);
81 /* If EL3 is enabled, we keep all firmware nodes active. */
83 node_path
= qemu_fdt_node_path(fdt
, NULL
, "xlnx,zynqmp-firmware",
86 for (i
= 0; node_path
&& node_path
[i
]; i
++) {
87 r
= qemu_fdt_getprop(fdt
, node_path
[i
], "method", &prop_len
, NULL
);
88 method_is_hvc
= r
&& !strcmp("hvc", r
);
90 /* Allow HVC based firmware if EL2 is enabled. */
91 if (method_is_hvc
&& s
->virt
) {
94 qemu_fdt_setprop_string(fdt
, node_path
[i
], "status", "disabled");
96 g_strfreev(node_path
);
100 static void xlnx_zcu102_init(MachineState
*machine
)
102 XlnxZCU102
*s
= ZCU102_MACHINE(machine
);
104 uint64_t ram_size
= machine
->ram_size
;
106 /* Create the memory region to pass to the SoC */
107 if (ram_size
> XLNX_ZYNQMP_MAX_RAM_SIZE
) {
108 error_report("ERROR: RAM size 0x%" PRIx64
" above max supported of "
110 XLNX_ZYNQMP_MAX_RAM_SIZE
);
114 if (ram_size
< 0x08000000) {
115 qemu_log("WARNING: RAM size 0x%" PRIx64
" is small for ZCU102",
119 object_initialize_child(OBJECT(machine
), "soc", &s
->soc
, sizeof(s
->soc
),
120 TYPE_XLNX_ZYNQMP
, &error_abort
, NULL
);
122 object_property_set_link(OBJECT(&s
->soc
), OBJECT(machine
->ram
),
123 "ddr-ram", &error_abort
);
124 object_property_set_bool(OBJECT(&s
->soc
), s
->secure
, "secure",
126 object_property_set_bool(OBJECT(&s
->soc
), s
->virt
, "virtualization",
129 object_property_set_bool(OBJECT(&s
->soc
), true, "realized", &error_fatal
);
131 /* Create and plug in the SD cards */
132 for (i
= 0; i
< XLNX_ZYNQMP_NUM_SDHCI
; i
++) {
134 DriveInfo
*di
= drive_get_next(IF_SD
);
135 BlockBackend
*blk
= di
? blk_by_legacy_dinfo(di
) : NULL
;
136 DeviceState
*carddev
;
139 bus_name
= g_strdup_printf("sd-bus%d", i
);
140 bus
= qdev_get_child_bus(DEVICE(&s
->soc
), bus_name
);
143 error_report("No SD bus found for SD card %d", i
);
146 carddev
= qdev_create(bus
, TYPE_SD_CARD
);
147 qdev_prop_set_drive(carddev
, "drive", blk
, &error_fatal
);
148 object_property_set_bool(OBJECT(carddev
), true, "realized",
152 for (i
= 0; i
< XLNX_ZYNQMP_NUM_SPIS
; i
++) {
154 DeviceState
*flash_dev
;
156 DriveInfo
*dinfo
= drive_get_next(IF_MTD
);
157 gchar
*bus_name
= g_strdup_printf("spi%d", i
);
159 spi_bus
= (SSIBus
*)qdev_get_child_bus(DEVICE(&s
->soc
), bus_name
);
162 flash_dev
= ssi_create_slave_no_init(spi_bus
, "sst25wf080");
164 qdev_prop_set_drive(flash_dev
, "drive", blk_by_legacy_dinfo(dinfo
),
167 qdev_init_nofail(flash_dev
);
169 cs_line
= qdev_get_gpio_in_named(flash_dev
, SSI_GPIO_CS
, 0);
171 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->soc
.spi
[i
]), 1, cs_line
);
174 for (i
= 0; i
< XLNX_ZYNQMP_NUM_QSPI_FLASH
; i
++) {
176 DeviceState
*flash_dev
;
178 DriveInfo
*dinfo
= drive_get_next(IF_MTD
);
179 int bus
= i
/ XLNX_ZYNQMP_NUM_QSPI_BUS_CS
;
180 gchar
*bus_name
= g_strdup_printf("qspi%d", bus
);
182 spi_bus
= (SSIBus
*)qdev_get_child_bus(DEVICE(&s
->soc
), bus_name
);
185 flash_dev
= ssi_create_slave_no_init(spi_bus
, "n25q512a11");
187 qdev_prop_set_drive(flash_dev
, "drive", blk_by_legacy_dinfo(dinfo
),
190 qdev_init_nofail(flash_dev
);
192 cs_line
= qdev_get_gpio_in_named(flash_dev
, SSI_GPIO_CS
, 0);
194 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->soc
.qspi
), i
+ 1, cs_line
);
197 /* TODO create and connect IDE devices for ide_drive_get() */
199 s
->binfo
.ram_size
= ram_size
;
200 s
->binfo
.loader_start
= 0;
201 s
->binfo
.modify_dtb
= zcu102_modify_dtb
;
202 arm_load_kernel(s
->soc
.boot_cpu_ptr
, machine
, &s
->binfo
);
205 static void xlnx_zcu102_machine_instance_init(Object
*obj
)
207 XlnxZCU102
*s
= ZCU102_MACHINE(obj
);
209 /* Default to secure mode being disabled */
211 object_property_add_bool(obj
, "secure", zcu102_get_secure
,
213 object_property_set_description(obj
, "secure",
214 "Set on/off to enable/disable the ARM "
215 "Security Extensions (TrustZone)");
217 /* Default to virt (EL2) being disabled */
219 object_property_add_bool(obj
, "virtualization", zcu102_get_virt
,
221 object_property_set_description(obj
, "virtualization",
222 "Set on/off to enable/disable emulating a "
223 "guest CPU which implements the ARM "
224 "Virtualization Extensions");
227 static void xlnx_zcu102_machine_class_init(ObjectClass
*oc
, void *data
)
229 MachineClass
*mc
= MACHINE_CLASS(oc
);
231 mc
->desc
= "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \
233 mc
->init
= xlnx_zcu102_init
;
234 mc
->block_default_type
= IF_IDE
;
235 mc
->units_per_default_bus
= 1;
236 mc
->ignore_memory_transaction_failures
= true;
237 mc
->max_cpus
= XLNX_ZYNQMP_NUM_APU_CPUS
+ XLNX_ZYNQMP_NUM_RPU_CPUS
;
238 mc
->default_cpus
= XLNX_ZYNQMP_NUM_APU_CPUS
;
239 mc
->default_ram_id
= "ddr-ram";
242 static const TypeInfo xlnx_zcu102_machine_init_typeinfo
= {
243 .name
= MACHINE_TYPE_NAME("xlnx-zcu102"),
244 .parent
= TYPE_MACHINE
,
245 .class_init
= xlnx_zcu102_machine_class_init
,
246 .instance_init
= xlnx_zcu102_machine_instance_init
,
247 .instance_size
= sizeof(XlnxZCU102
),
250 static void xlnx_zcu102_machine_init_register_types(void)
252 type_register_static(&xlnx_zcu102_machine_init_typeinfo
);
255 type_init(xlnx_zcu102_machine_init_register_types
)