nbd/server: Add FLAG_PAYLOAD support to CMD_BLOCK_STATUS
[qemu/ericb.git] / hw / ppc / spapr_rtas.c
blob7df21581c2182688689682c1e8b02e8dab51d231
1 /*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Hypercall based emulated RTAS
6 * Copyright (c) 2010-2011 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
28 #include "qemu/osdep.h"
29 #include "qemu/log.h"
30 #include "qemu/error-report.h"
31 #include "sysemu/sysemu.h"
32 #include "sysemu/device_tree.h"
33 #include "sysemu/cpus.h"
34 #include "sysemu/hw_accel.h"
35 #include "sysemu/runstate.h"
36 #include "sysemu/qtest.h"
37 #include "kvm_ppc.h"
39 #include "hw/ppc/spapr.h"
40 #include "hw/ppc/spapr_vio.h"
41 #include "hw/ppc/spapr_rtas.h"
42 #include "hw/ppc/spapr_cpu_core.h"
43 #include "hw/ppc/ppc.h"
45 #include <libfdt.h>
46 #include "hw/ppc/spapr_drc.h"
47 #include "qemu/cutils.h"
48 #include "trace.h"
49 #include "hw/ppc/fdt.h"
50 #include "target/ppc/mmu-hash64.h"
51 #include "target/ppc/mmu-book3s-v3.h"
52 #include "migration/blocker.h"
53 #include "helper_regs.h"
55 static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr,
56 uint32_t token, uint32_t nargs,
57 target_ulong args,
58 uint32_t nret, target_ulong rets)
60 uint8_t c = rtas_ld(args, 0);
61 SpaprVioDevice *sdev = vty_lookup(spapr, 0);
63 if (!sdev) {
64 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
65 } else {
66 vty_putchars(sdev, &c, sizeof(c));
67 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
71 static void rtas_power_off(PowerPCCPU *cpu, SpaprMachineState *spapr,
72 uint32_t token, uint32_t nargs, target_ulong args,
73 uint32_t nret, target_ulong rets)
75 if (nargs != 2 || nret != 1) {
76 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
77 return;
79 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
80 cpu_stop_current();
81 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
84 static void rtas_system_reboot(PowerPCCPU *cpu, SpaprMachineState *spapr,
85 uint32_t token, uint32_t nargs,
86 target_ulong args,
87 uint32_t nret, target_ulong rets)
89 if (nargs != 0 || nret != 1) {
90 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
91 return;
93 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
94 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
97 static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
98 SpaprMachineState *spapr,
99 uint32_t token, uint32_t nargs,
100 target_ulong args,
101 uint32_t nret, target_ulong rets)
103 target_ulong id;
104 PowerPCCPU *cpu;
106 if (nargs != 1 || nret != 2) {
107 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
108 return;
111 id = rtas_ld(args, 0);
112 cpu = spapr_find_cpu(id);
113 if (cpu != NULL) {
114 if (CPU(cpu)->halted) {
115 rtas_st(rets, 1, 0);
116 } else {
117 rtas_st(rets, 1, 2);
120 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
121 return;
124 /* Didn't find a matching cpu */
125 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
128 static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr,
129 uint32_t token, uint32_t nargs,
130 target_ulong args,
131 uint32_t nret, target_ulong rets)
133 target_ulong id, start, r3;
134 PowerPCCPU *newcpu;
135 CPUPPCState *env;
136 target_ulong lpcr;
137 target_ulong caller_lpcr;
139 if (nargs != 3 || nret != 1) {
140 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
141 return;
144 id = rtas_ld(args, 0);
145 start = rtas_ld(args, 1);
146 r3 = rtas_ld(args, 2);
148 newcpu = spapr_find_cpu(id);
149 if (!newcpu) {
150 /* Didn't find a matching cpu */
151 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
152 return;
155 env = &newcpu->env;
157 if (!CPU(newcpu)->halted) {
158 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
159 return;
162 cpu_synchronize_state(CPU(newcpu));
164 env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
165 hreg_compute_hflags(env);
167 caller_lpcr = callcpu->env.spr[SPR_LPCR];
168 lpcr = env->spr[SPR_LPCR];
170 /* Set ILE the same way */
171 lpcr = (lpcr & ~LPCR_ILE) | (caller_lpcr & LPCR_ILE);
173 /* Set AIL the same way */
174 lpcr = (lpcr & ~LPCR_AIL) | (caller_lpcr & LPCR_AIL);
176 if (env->mmu_model == POWERPC_MMU_3_00) {
178 * New cpus are expected to start in the same radix/hash mode
179 * as the existing CPUs
181 if (ppc64_v3_radix(callcpu)) {
182 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
183 } else {
184 lpcr &= ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR);
186 env->spr[SPR_PSSCR] &= ~PSSCR_EC;
188 ppc_store_lpcr(newcpu, lpcr);
191 * Set the timebase offset of the new CPU to that of the invoking
192 * CPU. This helps hotplugged CPU to have the correct timebase
193 * offset.
195 newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset;
197 spapr_cpu_set_entry_state(newcpu, start, 0, r3, 0);
199 qemu_cpu_kick(CPU(newcpu));
201 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
204 static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr,
205 uint32_t token, uint32_t nargs,
206 target_ulong args,
207 uint32_t nret, target_ulong rets)
209 CPUState *cs = CPU(cpu);
210 CPUPPCState *env = &cpu->env;
211 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
213 /* Disable Power-saving mode Exit Cause exceptions for the CPU.
214 * This could deliver an interrupt on a dying CPU and crash the
215 * guest.
216 * For the same reason, set PSSCR_EC.
218 env->spr[SPR_PSSCR] |= PSSCR_EC;
219 cs->halted = 1;
220 ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm);
221 kvmppc_set_reg_ppc_online(cpu, 0);
222 qemu_cpu_kick(cs);
225 static void rtas_ibm_suspend_me(PowerPCCPU *cpu, SpaprMachineState *spapr,
226 uint32_t token, uint32_t nargs,
227 target_ulong args,
228 uint32_t nret, target_ulong rets)
230 CPUState *cs;
232 if (nargs != 0 || nret != 1) {
233 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
234 return;
237 CPU_FOREACH(cs) {
238 PowerPCCPU *c = POWERPC_CPU(cs);
239 CPUPPCState *e = &c->env;
240 if (c == cpu) {
241 continue;
244 /* See h_join */
245 if (!cs->halted || (e->msr & (1ULL << MSR_EE))) {
246 rtas_st(rets, 0, H_MULTI_THREADS_ACTIVE);
247 return;
251 qemu_system_suspend_request();
252 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
255 static inline int sysparm_st(target_ulong addr, target_ulong len,
256 const void *val, uint16_t vallen)
258 hwaddr phys = ppc64_phys_to_real(addr);
260 if (len < 2) {
261 return RTAS_OUT_SYSPARM_PARAM_ERROR;
263 stw_be_phys(&address_space_memory, phys, vallen);
264 cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen));
265 return RTAS_OUT_SUCCESS;
268 static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
269 SpaprMachineState *spapr,
270 uint32_t token, uint32_t nargs,
271 target_ulong args,
272 uint32_t nret, target_ulong rets)
274 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
275 MachineState *ms = MACHINE(spapr);
276 target_ulong parameter = rtas_ld(args, 0);
277 target_ulong buffer = rtas_ld(args, 1);
278 target_ulong length = rtas_ld(args, 2);
279 target_ulong ret;
281 switch (parameter) {
282 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
283 g_autofree char *param_val = g_strdup_printf("MaxEntCap=%d,"
284 "DesMem=%" PRIu64 ","
285 "DesProcs=%d,"
286 "MaxPlatProcs=%d",
287 ms->smp.max_cpus,
288 ms->ram_size / MiB,
289 ms->smp.cpus,
290 ms->smp.max_cpus);
291 if (pcc->n_host_threads > 0) {
293 * Add HostThrs property. This property is not present in PAPR but
294 * is expected by some guests to communicate the number of physical
295 * host threads per core on the system so that they can scale
296 * information which varies based on the thread configuration.
298 g_autofree char *hostthr_val = g_strdup_printf(",HostThrs=%d",
299 pcc->n_host_threads);
300 char *old = param_val;
302 param_val = g_strconcat(param_val, hostthr_val, NULL);
303 g_free(old);
305 ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
306 break;
308 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: {
309 uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED;
311 ret = sysparm_st(buffer, length, &param_val, sizeof(param_val));
312 break;
314 case RTAS_SYSPARM_UUID:
315 ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid,
316 (qemu_uuid_set ? 16 : 0));
317 break;
318 default:
319 ret = RTAS_OUT_NOT_SUPPORTED;
322 rtas_st(rets, 0, ret);
325 static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu,
326 SpaprMachineState *spapr,
327 uint32_t token, uint32_t nargs,
328 target_ulong args,
329 uint32_t nret, target_ulong rets)
331 target_ulong parameter = rtas_ld(args, 0);
332 target_ulong ret = RTAS_OUT_NOT_SUPPORTED;
334 switch (parameter) {
335 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS:
336 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE:
337 case RTAS_SYSPARM_UUID:
338 ret = RTAS_OUT_NOT_AUTHORIZED;
339 break;
342 rtas_st(rets, 0, ret);
345 static void rtas_ibm_os_term(PowerPCCPU *cpu,
346 SpaprMachineState *spapr,
347 uint32_t token, uint32_t nargs,
348 target_ulong args,
349 uint32_t nret, target_ulong rets)
351 target_ulong msgaddr = rtas_ld(args, 0);
352 char msg[512];
354 cpu_physical_memory_read(msgaddr, msg, sizeof(msg) - 1);
355 msg[sizeof(msg) - 1] = 0;
357 error_report("OS terminated: %s", msg);
358 qemu_system_guest_panicked(NULL);
360 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
363 static void rtas_set_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
364 uint32_t token, uint32_t nargs,
365 target_ulong args, uint32_t nret,
366 target_ulong rets)
368 int32_t power_domain;
370 if (nargs != 2 || nret != 2) {
371 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
372 return;
375 /* we currently only use a single, "live insert" powerdomain for
376 * hotplugged/dlpar'd resources, so the power is always live/full (100)
378 power_domain = rtas_ld(args, 0);
379 if (power_domain != -1) {
380 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
381 return;
384 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
385 rtas_st(rets, 1, 100);
388 static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
389 uint32_t token, uint32_t nargs,
390 target_ulong args, uint32_t nret,
391 target_ulong rets)
393 int32_t power_domain;
395 if (nargs != 1 || nret != 2) {
396 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
397 return;
400 /* we currently only use a single, "live insert" powerdomain for
401 * hotplugged/dlpar'd resources, so the power is always live/full (100)
403 power_domain = rtas_ld(args, 0);
404 if (power_domain != -1) {
405 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
406 return;
409 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
410 rtas_st(rets, 1, 100);
413 static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
414 SpaprMachineState *spapr,
415 uint32_t token, uint32_t nargs,
416 target_ulong args,
417 uint32_t nret, target_ulong rets)
419 hwaddr rtas_addr;
420 target_ulong sreset_addr, mce_addr;
422 if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) {
423 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
424 return;
427 rtas_addr = spapr_get_rtas_addr();
428 if (!rtas_addr) {
429 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
430 return;
433 sreset_addr = rtas_ld(args, 0);
434 mce_addr = rtas_ld(args, 1);
436 /* PAPR requires these are in the first 32M of memory and within RMA */
437 if (sreset_addr >= 32 * MiB || sreset_addr >= spapr->rma_size ||
438 mce_addr >= 32 * MiB || mce_addr >= spapr->rma_size) {
439 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
440 return;
443 if (kvm_enabled()) {
444 if (kvmppc_set_fwnmi(cpu) < 0) {
445 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
446 return;
450 spapr->fwnmi_system_reset_addr = sreset_addr;
451 spapr->fwnmi_machine_check_addr = mce_addr;
453 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
456 static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
457 SpaprMachineState *spapr,
458 uint32_t token, uint32_t nargs,
459 target_ulong args,
460 uint32_t nret, target_ulong rets)
462 if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) {
463 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
464 return;
467 if (spapr->fwnmi_machine_check_addr == -1) {
468 qemu_log_mask(LOG_GUEST_ERROR,
469 "FWNMI: ibm,nmi-interlock RTAS called with FWNMI not registered.\n");
471 /* NMI register not called */
472 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
473 return;
476 if (spapr->fwnmi_machine_check_interlock != cpu->vcpu_id) {
478 * The vCPU that hit the NMI should invoke "ibm,nmi-interlock"
479 * This should be PARAM_ERROR, but Linux calls "ibm,nmi-interlock"
480 * for system reset interrupts, despite them not being interlocked.
481 * PowerVM silently ignores this and returns success here. Returning
482 * failure causes Linux to print the error "FWNMI: nmi-interlock
483 * failed: -3", although no other apparent ill effects, this is a
484 * regression for the user when enabling FWNMI. So for now, match
485 * PowerVM. When most Linux clients are fixed, this could be
486 * changed.
488 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
489 return;
493 * vCPU issuing "ibm,nmi-interlock" is done with NMI handling,
494 * hence unset fwnmi_machine_check_interlock.
496 spapr->fwnmi_machine_check_interlock = -1;
497 qemu_cond_signal(&spapr->fwnmi_machine_check_interlock_cond);
498 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
499 migrate_del_blocker(spapr->fwnmi_migration_blocker);
502 static struct rtas_call {
503 const char *name;
504 spapr_rtas_fn fn;
505 } rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE];
507 target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *spapr,
508 uint32_t token, uint32_t nargs, target_ulong args,
509 uint32_t nret, target_ulong rets)
511 if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) {
512 struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE);
514 if (call->fn) {
515 call->fn(cpu, spapr, token, nargs, args, nret, rets);
516 return H_SUCCESS;
520 /* HACK: Some Linux early debug code uses RTAS display-character,
521 * but assumes the token value is 0xa (which it is on some real
522 * machines) without looking it up in the device tree. This
523 * special case makes this work */
524 if (token == 0xa) {
525 rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets);
526 return H_SUCCESS;
529 hcall_dprintf("Unknown RTAS token 0x%x\n", token);
530 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
531 return H_PARAMETER;
534 uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args,
535 uint32_t nret, uint64_t rets)
537 int token;
539 for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) {
540 if (strcmp(cmd, rtas_table[token].name) == 0) {
541 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
542 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
544 rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE,
545 nargs, args, nret, rets);
546 return H_SUCCESS;
549 return H_PARAMETER;
552 static bool spapr_qtest_callback(CharBackend *chr, gchar **words)
554 if (strcmp(words[0], "rtas") == 0) {
555 uint64_t res, args, ret;
556 unsigned long nargs, nret;
557 int rc;
559 rc = qemu_strtoul(words[2], NULL, 0, &nargs);
560 g_assert(rc == 0);
561 rc = qemu_strtou64(words[3], NULL, 0, &args);
562 g_assert(rc == 0);
563 rc = qemu_strtoul(words[4], NULL, 0, &nret);
564 g_assert(rc == 0);
565 rc = qemu_strtou64(words[5], NULL, 0, &ret);
566 g_assert(rc == 0);
567 res = qtest_rtas_call(words[1], nargs, args, nret, ret);
569 qtest_send_prefix(chr);
570 qtest_sendf(chr, "OK %"PRIu64"\n", res);
572 return true;
575 return false;
578 void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn)
580 assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX));
582 token -= RTAS_TOKEN_BASE;
584 assert(!name || !rtas_table[token].name);
586 rtas_table[token].name = name;
587 rtas_table[token].fn = fn;
590 void spapr_dt_rtas_tokens(void *fdt, int rtas)
592 int i;
594 for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) {
595 struct rtas_call *call = &rtas_table[i];
597 if (!call->name) {
598 continue;
601 _FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE));
605 hwaddr spapr_get_rtas_addr(void)
607 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
608 int rtas_node;
609 const fdt32_t *rtas_data;
610 void *fdt = spapr->fdt_blob;
612 /* fetch rtas addr from fdt */
613 rtas_node = fdt_path_offset(fdt, "/rtas");
614 if (rtas_node < 0) {
615 return 0;
618 rtas_data = fdt_getprop(fdt, rtas_node, "linux,rtas-base", NULL);
619 if (!rtas_data) {
620 return 0;
624 * We assume that the OS called RTAS instantiate-rtas, but some other
625 * OS might call RTAS instantiate-rtas-64 instead. This fine as of now
626 * as SLOF only supports 32-bit variant.
628 return (hwaddr)fdt32_to_cpu(*rtas_data);
631 static void core_rtas_register_types(void)
633 spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
634 rtas_display_character);
635 spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off);
636 spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot",
637 rtas_system_reboot);
638 spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state",
639 rtas_query_cpu_stopped_state);
640 spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu);
641 spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self);
642 spapr_rtas_register(RTAS_IBM_SUSPEND_ME, "ibm,suspend-me",
643 rtas_ibm_suspend_me);
644 spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER,
645 "ibm,get-system-parameter",
646 rtas_ibm_get_system_parameter);
647 spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER,
648 "ibm,set-system-parameter",
649 rtas_ibm_set_system_parameter);
650 spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term",
651 rtas_ibm_os_term);
652 spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level",
653 rtas_set_power_level);
654 spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
655 rtas_get_power_level);
656 spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
657 rtas_ibm_nmi_register);
658 spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
659 rtas_ibm_nmi_interlock);
661 qtest_set_command_cb(spapr_qtest_callback);
664 type_init(core_rtas_register_types)