2 * QEMU USB EHCI Emulation
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2.1 of the License, or (at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU Lesser General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 #include "qemu/osdep.h"
19 #include "hw/usb/hcd-ehci.h"
20 #include "qemu/range.h"
22 typedef struct EHCIPCIInfo
{
30 static void usb_ehci_pci_realize(PCIDevice
*dev
, Error
**errp
)
32 EHCIPCIState
*i
= PCI_EHCI(dev
);
33 EHCIState
*s
= &i
->ehci
;
34 uint8_t *pci_conf
= dev
->config
;
36 pci_set_byte(&pci_conf
[PCI_CLASS_PROG
], 0x20);
38 /* capabilities pointer */
39 pci_set_byte(&pci_conf
[PCI_CAPABILITY_LIST
], 0x00);
40 /* pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x50); */
42 pci_set_byte(&pci_conf
[PCI_INTERRUPT_PIN
], 4); /* interrupt pin D */
43 pci_set_byte(&pci_conf
[PCI_MIN_GNT
], 0);
44 pci_set_byte(&pci_conf
[PCI_MAX_LAT
], 0);
46 /* pci_conf[0x50] = 0x01; *//* power management caps */
48 pci_set_byte(&pci_conf
[USB_SBRN
], USB_RELEASE_2
); /* release # (2.1.4) */
49 pci_set_byte(&pci_conf
[0x61], 0x20); /* frame length adjustment (2.1.5) */
50 pci_set_word(&pci_conf
[0x62], 0x00); /* port wake up capability (2.1.6) */
52 pci_conf
[0x64] = 0x00;
53 pci_conf
[0x65] = 0x00;
54 pci_conf
[0x66] = 0x00;
55 pci_conf
[0x67] = 0x00;
56 pci_conf
[0x68] = 0x01;
57 pci_conf
[0x69] = 0x00;
58 pci_conf
[0x6a] = 0x00;
59 pci_conf
[0x6b] = 0x00; /* USBLEGSUP */
60 pci_conf
[0x6c] = 0x00;
61 pci_conf
[0x6d] = 0x00;
62 pci_conf
[0x6e] = 0x00;
63 pci_conf
[0x6f] = 0xc0; /* USBLEFCTLSTS */
65 s
->irq
= pci_allocate_irq(dev
);
66 s
->as
= pci_get_address_space(dev
);
68 usb_ehci_realize(s
, DEVICE(dev
), NULL
);
69 pci_register_bar(dev
, 0, PCI_BASE_ADDRESS_SPACE_MEMORY
, &s
->mem
);
72 static void usb_ehci_pci_init(Object
*obj
)
74 DeviceClass
*dc
= OBJECT_GET_CLASS(DeviceClass
, obj
, TYPE_DEVICE
);
75 EHCIPCIState
*i
= PCI_EHCI(obj
);
76 EHCIState
*s
= &i
->ehci
;
78 s
->caps
[0x09] = 0x68; /* EECP */
85 if (!dc
->hotpluggable
) {
86 s
->companion_enable
= true;
89 usb_ehci_init(s
, DEVICE(obj
));
92 static void usb_ehci_pci_finalize(Object
*obj
)
94 EHCIPCIState
*i
= PCI_EHCI(obj
);
95 EHCIState
*s
= &i
->ehci
;
100 static void usb_ehci_pci_exit(PCIDevice
*dev
)
102 EHCIPCIState
*i
= PCI_EHCI(dev
);
103 EHCIState
*s
= &i
->ehci
;
105 usb_ehci_unrealize(s
, DEVICE(dev
), NULL
);
111 static void usb_ehci_pci_reset(DeviceState
*dev
)
113 PCIDevice
*pci_dev
= PCI_DEVICE(dev
);
114 EHCIPCIState
*i
= PCI_EHCI(pci_dev
);
115 EHCIState
*s
= &i
->ehci
;
120 static void usb_ehci_pci_write_config(PCIDevice
*dev
, uint32_t addr
,
123 EHCIPCIState
*i
= PCI_EHCI(dev
);
126 pci_default_write_config(dev
, addr
, val
, l
);
128 if (!range_covers_byte(addr
, l
, PCI_COMMAND
)) {
131 busmaster
= pci_get_word(dev
->config
+ PCI_COMMAND
) & PCI_COMMAND_MASTER
;
132 i
->ehci
.as
= busmaster
? pci_get_address_space(dev
) : &address_space_memory
;
135 static Property ehci_pci_properties
[] = {
136 DEFINE_PROP_UINT32("maxframes", EHCIPCIState
, ehci
.maxframes
, 128),
137 DEFINE_PROP_END_OF_LIST(),
140 static const VMStateDescription vmstate_ehci_pci
= {
143 .minimum_version_id
= 1,
144 .fields
= (VMStateField
[]) {
145 VMSTATE_PCI_DEVICE(pcidev
, EHCIPCIState
),
146 VMSTATE_STRUCT(ehci
, EHCIPCIState
, 2, vmstate_ehci
, EHCIState
),
147 VMSTATE_END_OF_LIST()
151 static void ehci_class_init(ObjectClass
*klass
, void *data
)
153 DeviceClass
*dc
= DEVICE_CLASS(klass
);
154 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
156 k
->realize
= usb_ehci_pci_realize
;
157 k
->exit
= usb_ehci_pci_exit
;
158 k
->class_id
= PCI_CLASS_SERIAL_USB
;
159 k
->config_write
= usb_ehci_pci_write_config
;
160 dc
->vmsd
= &vmstate_ehci_pci
;
161 dc
->props
= ehci_pci_properties
;
162 dc
->reset
= usb_ehci_pci_reset
;
165 static const TypeInfo ehci_pci_type_info
= {
166 .name
= TYPE_PCI_EHCI
,
167 .parent
= TYPE_PCI_DEVICE
,
168 .instance_size
= sizeof(EHCIPCIState
),
169 .instance_init
= usb_ehci_pci_init
,
170 .instance_finalize
= usb_ehci_pci_finalize
,
172 .class_init
= ehci_class_init
,
173 .interfaces
= (InterfaceInfo
[]) {
174 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
179 static void ehci_data_class_init(ObjectClass
*klass
, void *data
)
181 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
182 DeviceClass
*dc
= DEVICE_CLASS(klass
);
183 EHCIPCIInfo
*i
= data
;
185 k
->vendor_id
= i
->vendor_id
;
186 k
->device_id
= i
->device_id
;
187 k
->revision
= i
->revision
;
188 set_bit(DEVICE_CATEGORY_USB
, dc
->categories
);
190 dc
->hotpluggable
= false;
194 static struct EHCIPCIInfo ehci_pci_info
[] = {
197 .vendor_id
= PCI_VENDOR_ID_INTEL
,
198 .device_id
= PCI_DEVICE_ID_INTEL_82801D
, /* ich4 */
201 .name
= "ich9-usb-ehci1", /* 00:1d.7 */
202 .vendor_id
= PCI_VENDOR_ID_INTEL
,
203 .device_id
= PCI_DEVICE_ID_INTEL_82801I_EHCI1
,
207 .name
= "ich9-usb-ehci2", /* 00:1a.7 */
208 .vendor_id
= PCI_VENDOR_ID_INTEL
,
209 .device_id
= PCI_DEVICE_ID_INTEL_82801I_EHCI2
,
215 static void ehci_pci_register_types(void)
217 TypeInfo ehci_type_info
= {
218 .parent
= TYPE_PCI_EHCI
,
219 .class_init
= ehci_data_class_init
,
223 type_register_static(&ehci_pci_type_info
);
225 for (i
= 0; i
< ARRAY_SIZE(ehci_pci_info
); i
++) {
226 ehci_type_info
.name
= ehci_pci_info
[i
].name
;
227 ehci_type_info
.class_data
= ehci_pci_info
+ i
;
228 type_register(&ehci_type_info
);
232 type_init(ehci_pci_register_types
)