travis: define all the build matrix entries in one place
[qemu/ericb.git] / include / hw / boards.h
blob02f114085f4060e1ddea412cf3ccdacf695ad04a
1 /* Declarations for use by board files for creating devices. */
3 #ifndef HW_BOARDS_H
4 #define HW_BOARDS_H
6 #include "sysemu/blockdev.h"
7 #include "sysemu/accel.h"
8 #include "hw/qdev.h"
9 #include "qom/object.h"
10 #include "qom/cpu.h"
12 /**
13 * memory_region_allocate_system_memory - Allocate a board's main memory
14 * @mr: the #MemoryRegion to be initialized
15 * @owner: the object that tracks the region's reference count
16 * @name: name of the memory region
17 * @ram_size: size of the region in bytes
19 * This function allocates the main memory for a board model, and
20 * initializes @mr appropriately. It also arranges for the memory
21 * to be migrated (by calling vmstate_register_ram_global()).
23 * Memory allocated via this function will be backed with the memory
24 * backend the user provided using "-mem-path" or "-numa node,memdev=..."
25 * if appropriate; this is typically used to cause host huge pages to be
26 * used. This function should therefore be called by a board exactly once,
27 * for the primary or largest RAM area it implements.
29 * For boards where the major RAM is split into two parts in the memory
30 * map, you can deal with this by calling memory_region_allocate_system_memory()
31 * once to get a MemoryRegion with enough RAM for both parts, and then
32 * creating alias MemoryRegions via memory_region_init_alias() which
33 * alias into different parts of the RAM MemoryRegion and can be mapped
34 * into the memory map in the appropriate places.
36 * Smaller pieces of memory (display RAM, static RAMs, etc) don't need
37 * to be backed via the -mem-path memory backend and can simply
38 * be created via memory_region_init_ram().
40 void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
41 const char *name,
42 uint64_t ram_size);
44 #define TYPE_MACHINE_SUFFIX "-machine"
46 /* Machine class name that needs to be used for class-name-based machine
47 * type lookup to work.
49 #define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
51 #define TYPE_MACHINE "machine"
52 #undef MACHINE /* BSD defines it and QEMU does not use it */
53 #define MACHINE(obj) \
54 OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
55 #define MACHINE_GET_CLASS(obj) \
56 OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
57 #define MACHINE_CLASS(klass) \
58 OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
60 MachineClass *find_default_machine(void);
61 extern MachineState *current_machine;
63 void machine_run_board_init(MachineState *machine);
64 bool machine_usb(MachineState *machine);
65 bool machine_kernel_irqchip_allowed(MachineState *machine);
66 bool machine_kernel_irqchip_required(MachineState *machine);
67 bool machine_kernel_irqchip_split(MachineState *machine);
68 int machine_kvm_shadow_mem(MachineState *machine);
69 int machine_phandle_start(MachineState *machine);
70 bool machine_dump_guest_core(MachineState *machine);
71 bool machine_mem_merge(MachineState *machine);
72 HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
73 void machine_set_cpu_numa_node(MachineState *machine,
74 const CpuInstanceProperties *props,
75 Error **errp);
77 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
80 /**
81 * CPUArchId:
82 * @arch_id - architecture-dependent CPU ID of present or possible CPU
83 * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
84 * @type - QOM class name of possible @cpu object
85 * @props - CPU object properties, initialized by board
86 * #vcpus_count - number of threads provided by @cpu object
88 typedef struct {
89 uint64_t arch_id;
90 int64_t vcpus_count;
91 CpuInstanceProperties props;
92 Object *cpu;
93 const char *type;
94 } CPUArchId;
96 /**
97 * CPUArchIdList:
98 * @len - number of @CPUArchId items in @cpus array
99 * @cpus - array of present or possible CPUs for current machine configuration
101 typedef struct {
102 int len;
103 CPUArchId cpus[0];
104 } CPUArchIdList;
107 * MachineClass:
108 * @deprecation_reason: If set, the machine is marked as deprecated. The
109 * string should provide some clear information about what to use instead.
110 * @max_cpus: maximum number of CPUs supported. Default: 1
111 * @min_cpus: minimum number of CPUs supported. Default: 1
112 * @default_cpus: number of CPUs instantiated if none are specified. Default: 1
113 * @get_hotplug_handler: this function is called during bus-less
114 * device hotplug. If defined it returns pointer to an instance
115 * of HotplugHandler object, which handles hotplug operation
116 * for a given @dev. It may return NULL if @dev doesn't require
117 * any actions to be performed by hotplug handler.
118 * @cpu_index_to_instance_props:
119 * used to provide @cpu_index to socket/core/thread number mapping, allowing
120 * legacy code to perform maping from cpu_index to topology properties
121 * Returns: tuple of socket/core/thread ids given cpu_index belongs to.
122 * used to provide @cpu_index to socket number mapping, allowing
123 * a machine to group CPU threads belonging to the same socket/package
124 * Returns: socket number given cpu_index belongs to.
125 * @hw_version:
126 * Value of QEMU_VERSION when the machine was added to QEMU.
127 * Set only by old machines because they need to keep
128 * compatibility on code that exposed QEMU_VERSION to guests in
129 * the past (and now use qemu_hw_version()).
130 * @possible_cpu_arch_ids:
131 * Returns an array of @CPUArchId architecture-dependent CPU IDs
132 * which includes CPU IDs for present and possible to hotplug CPUs.
133 * Caller is responsible for freeing returned list.
134 * @get_default_cpu_node_id:
135 * returns default board specific node_id value for CPU slot specified by
136 * index @idx in @ms->possible_cpus[]
137 * @has_hotpluggable_cpus:
138 * If true, board supports CPUs creation with -device/device_add.
139 * @default_cpu_type:
140 * specifies default CPU_TYPE, which will be used for parsing target
141 * specific features and for creating CPUs if CPU name wasn't provided
142 * explicitly at CLI
143 * @minimum_page_bits:
144 * If non-zero, the board promises never to create a CPU with a page size
145 * smaller than this, so QEMU can use a more efficient larger page
146 * size than the target architecture's minimum. (Attempting to create
147 * such a CPU will fail.) Note that changing this is a migration
148 * compatibility break for the machine.
149 * @ignore_memory_transaction_failures:
150 * If this is flag is true then the CPU will ignore memory transaction
151 * failures which should cause the CPU to take an exception due to an
152 * access to an unassigned physical address; the transaction will instead
153 * return zero (for a read) or be ignored (for a write). This should be
154 * set only by legacy board models which rely on the old RAZ/WI behaviour
155 * for handling devices that QEMU does not yet model. New board models
156 * should instead use "unimplemented-device" for all memory ranges where
157 * the guest will attempt to probe for a device that QEMU doesn't
158 * implement and a stub device is required.
160 struct MachineClass {
161 /*< private >*/
162 ObjectClass parent_class;
163 /*< public >*/
165 const char *family; /* NULL iff @name identifies a standalone machtype */
166 char *name;
167 const char *alias;
168 const char *desc;
169 const char *deprecation_reason;
171 void (*init)(MachineState *state);
172 void (*reset)(void);
173 void (*hot_add_cpu)(const int64_t id, Error **errp);
174 int (*kvm_type)(const char *arg);
176 BlockInterfaceType block_default_type;
177 int units_per_default_bus;
178 int max_cpus;
179 int min_cpus;
180 int default_cpus;
181 unsigned int no_serial:1,
182 no_parallel:1,
183 use_virtcon:1,
184 no_floppy:1,
185 no_cdrom:1,
186 no_sdcard:1,
187 pci_allow_0_address:1,
188 legacy_fw_cfg_order:1;
189 int is_default;
190 const char *default_machine_opts;
191 const char *default_boot_order;
192 const char *default_display;
193 GPtrArray *compat_props;
194 const char *hw_version;
195 ram_addr_t default_ram_size;
196 const char *default_cpu_type;
197 bool default_kernel_irqchip_split;
198 bool option_rom_has_mr;
199 bool rom_file_has_mr;
200 int minimum_page_bits;
201 bool has_hotpluggable_cpus;
202 bool ignore_memory_transaction_failures;
203 int numa_mem_align_shift;
204 const char **valid_cpu_types;
205 strList *allowed_dynamic_sysbus_devices;
206 bool auto_enable_numa_with_memhp;
207 void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
208 int nb_nodes, ram_addr_t size);
209 bool ignore_boot_device_suffixes;
211 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
212 DeviceState *dev);
213 CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
214 unsigned cpu_index);
215 const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
216 int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
220 * DeviceMemoryState:
221 * @base: address in guest physical address space where the memory
222 * address space for memory devices starts
223 * @mr: address space container for memory devices
225 typedef struct DeviceMemoryState {
226 hwaddr base;
227 MemoryRegion mr;
228 } DeviceMemoryState;
231 * MachineState:
233 struct MachineState {
234 /*< private >*/
235 Object parent_obj;
236 Notifier sysbus_notifier;
238 /*< public >*/
240 char *accel;
241 bool kernel_irqchip_allowed;
242 bool kernel_irqchip_required;
243 bool kernel_irqchip_split;
244 int kvm_shadow_mem;
245 char *dtb;
246 char *dumpdtb;
247 int phandle_start;
248 char *dt_compatible;
249 bool dump_guest_core;
250 bool mem_merge;
251 bool usb;
252 bool usb_disabled;
253 bool igd_gfx_passthru;
254 char *firmware;
255 bool iommu;
256 bool suppress_vmdesc;
257 bool enforce_config_section;
258 bool enable_graphics;
259 char *memory_encryption;
260 DeviceMemoryState *device_memory;
262 ram_addr_t ram_size;
263 ram_addr_t maxram_size;
264 uint64_t ram_slots;
265 const char *boot_order;
266 char *kernel_filename;
267 char *kernel_cmdline;
268 char *initrd_filename;
269 const char *cpu_type;
270 AccelState *accelerator;
271 CPUArchIdList *possible_cpus;
274 #define DEFINE_MACHINE(namestr, machine_initfn) \
275 static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
277 MachineClass *mc = MACHINE_CLASS(oc); \
278 machine_initfn(mc); \
280 static const TypeInfo machine_initfn##_typeinfo = { \
281 .name = MACHINE_TYPE_NAME(namestr), \
282 .parent = TYPE_MACHINE, \
283 .class_init = machine_initfn##_class_init, \
284 }; \
285 static void machine_initfn##_register_types(void) \
287 type_register_static(&machine_initfn##_typeinfo); \
289 type_init(machine_initfn##_register_types)
291 extern GlobalProperty hw_compat_3_1[];
292 extern const size_t hw_compat_3_1_len;
294 extern GlobalProperty hw_compat_3_0[];
295 extern const size_t hw_compat_3_0_len;
297 extern GlobalProperty hw_compat_2_12[];
298 extern const size_t hw_compat_2_12_len;
300 extern GlobalProperty hw_compat_2_11[];
301 extern const size_t hw_compat_2_11_len;
303 extern GlobalProperty hw_compat_2_10[];
304 extern const size_t hw_compat_2_10_len;
306 extern GlobalProperty hw_compat_2_9[];
307 extern const size_t hw_compat_2_9_len;
309 extern GlobalProperty hw_compat_2_8[];
310 extern const size_t hw_compat_2_8_len;
312 extern GlobalProperty hw_compat_2_7[];
313 extern const size_t hw_compat_2_7_len;
315 extern GlobalProperty hw_compat_2_6[];
316 extern const size_t hw_compat_2_6_len;
318 extern GlobalProperty hw_compat_2_5[];
319 extern const size_t hw_compat_2_5_len;
321 extern GlobalProperty hw_compat_2_4[];
322 extern const size_t hw_compat_2_4_len;
324 extern GlobalProperty hw_compat_2_3[];
325 extern const size_t hw_compat_2_3_len;
327 extern GlobalProperty hw_compat_2_2[];
328 extern const size_t hw_compat_2_2_len;
330 extern GlobalProperty hw_compat_2_1[];
331 extern const size_t hw_compat_2_1_len;
333 #endif