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ui/cocoa: Add console items to the View menu
2015-05-12
Fabian Aggeler
hw/arm/vexpress
.
c: W
i
re FIQ between CPU <> GIC
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
F
a
bian Aggeler
hw/intc/arm
_
gic: Change behavi
o
r of IAR
w
rites
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
Fabian Aggeler
h
w
/intc/arm_gic: Change behavior of EOIR w
r
ites
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
Fabian Aggeler
hw/i
n
t
c
/a
r
m_gic: Handle grou
p
ing f
o
r GICC_HPPIR
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
Fabian Aggeler
hw/intc
/
arm_gi
c
: Re
s
tri
c
t prio
r
ity view
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
Fabian Aggeler
hw/int
c
/
a
r
m
_gic:
I
mplement Non
-
secure view of RPR
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
Fabian
A
g
geler
h
w
/intc/arm_gi
c
: Make ICCICR/GICC_CTLR banked
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
Fabian
Aggeler
hw/intc/a
r
m_gi
c
: Make ICCBPR/GICC_BPR banked
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
F
a
b
i
an Aggeler
hw/intc
/
arm_gic: Ma
k
e IC
D
DCR/GIC
D
_CTLR ba
n
k
ed
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
Fa
b
ian Aggeler
hw/i
n
tc/arm_gic: Add In
t
errupt Group Registe
r
s
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
Fabian Ag
g
e
ler
hw/intc/arm_gi
c
:
A
dd Security Extensions property
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2015-05-12
Fab
i
an Aggeler
h
w/intc/arm_gic:
Create outbound
FIQ lines
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-22
F
a
bian A
g
geler
t
arget
-
arm: add cpu fe
a
tur
e
EL3
t
o CPUs with Security
.
.
.
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fa
b
i
a
n Aggeler
targ
e
t-arm: mak
e
c1
3
cp regs bank
e
d (FCSEIDR,
.
.
.
)
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
F
a
bian Aggeler
target-arm: make PA
R
ba
n
ked
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabian
A
ggeler
t
a
rget-arm: ma
k
e IFAR/DFAR banked
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
F
a
b
i
an
A
ggeler
target-
a
rm: make DFSR
banke
d
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabian
A
ggeler
target-arm: make IFSR banked
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabian
A
ggel
e
r
t
a
r
get-arm: make DACR banked
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
F
ab
i
an Aggeler
tar
g
et
-
arm: make TTBCR
b
anked
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabian A
g
geler
targ
e
t
-
a
r
m
:
make TTBR0/1 banke
d
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabian Agge
l
er
target-a
r
m: mak
e
C
SSELR
b
anked
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabian Aggeler
ta
r
ge
t
-arm: respect SCR
.
FW, SCR
.
A
W
a
nd SCTLR
.
NMFI
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
F
abian
A
ggeler
target-arm:
a
d
d
S
C
TLR_EL3 and make
SCTLR banke
d
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
F
a
b
i
an A
g
ge
l
er
target-arm:
ad
d
MVBAR support
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabi
a
n Aggeler
ta
r
get-arm: add
NSACR
r
egister
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabian
A
ggeler
targ
e
t-arm: implement I
R
Q
/
F
IQ routing to Monitor mode
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabian
Aggeler
target-arm: move AArch3
2
SCR
i
nto
s
ecurit
y
reglist
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabian Agg
e
ler
t
a
r
get-a
r
m: insert AAr
c
h32 c
p
re
g
s twic
e
into hashtable
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabian Aggeler
targ
e
t-
a
rm
:
a
d
d CPREG secure state supp
o
rt
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-12-11
Fabi
a
n Aggeler
targ
e
t-arm: add banke
d
register accesso
r
s
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-10-24
F
abian Aggeler
target-ar
m
:
A
32: Emu
l
a
te the SMC instructio
n
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-10-24
Fabi
a
n
A
g
geler
t
arget-arm: m
a
k
e
a
r
m_
c
u
rrent_el(
)
return EL
3
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-10-24
F
abian Aggele
r
target-arm:
a
d
d arm_is_secur
e
(
)
function
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-10-24
Fabian Aggele
r
ta
r
get-arm: inc
r
ease arrays of registers R
1
3 & R14
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-06-19
F
a
bian Aggeler
tar
g
et-arm: implement PD0/PD
1
bits for TTBCR
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-06-09
Fa
b
ian
A
ggele
r
target-a
r
m
: Prepare cp
r
eg writefns/readfns for EL3
.
.
.
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree
2014-05-27
Fa
b
ian Aggeler
t
arge
t
-a
r
m: impleme
n
t CPACR register logic for ARMv7
Signed-off-by:
Fabian Aggeler
<aggelerf@ethz.ch>
commit
|
commitdiff
|
tree