target-arm: make TTBR0/1 banked
commit7dd8c9af0d9d18fb3e54a4843b3bb1398bd330bc
authorFabian Aggeler <aggelerf@ethz.ch>
Thu, 11 Dec 2014 12:07:51 +0000 (11 12:07 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 11 Dec 2014 12:07:51 +0000 (11 12:07 +0000)
tree318c5e217510ab0c8a198c9fc3335024a3f6ca00
parentb85a1fd61c4d72c7928cd9b70f9f59fb2895936d
target-arm: make TTBR0/1 banked

Adds secure and non-secure bank register suport for TTBR0 and TTBR1.
Changes include adding secure and non-secure instances of ttbr0 and ttbr1 as
well as a CP register definition for TTBR0_EL3.  Added a union containing
both EL based array fields and secure and non-secure fields mapped to them.
Updated accesses to use A32_BANKED_CURRENT_REG_GET macro.

Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1416242878-876-17-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/pxa2xx.c
target-arm/cpu.h
target-arm/helper.c