| commit | dbe9d1636787dd226d3f9a61c07fbc27e0db5bbf | |
| author | Fabian Aggeler <aggelerf@ethz.ch> | |
| Fri, 24 Oct 2014 11:19:15 +0000 (24 12:19 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 24 Oct 2014 11:19:15 +0000 (24 12:19 +0100) | ||
| tree | b6b5a36edb72357b0df274483371a824bc7df3a8 | treesnapshot (tar.gz zip) |
| parent | 592125f83a8034deaa26f840cde5909f26429c4a | commitdiff |
target-arm: A32: Emulate the SMC instruction
Implements SMC instruction in AArch32 using the A32 syndrome. When executing
SMC instruction from monitor CPU mode SCR.NS bit is reset.
Signed-off-by: Sergey Fedorov <s.fedorov@samsung.com>
Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Message-id: 1413910544-20150-7-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Implements SMC instruction in AArch32 using the A32 syndrome. When executing
SMC instruction from monitor CPU mode SCR.NS bit is reset.
Signed-off-by: Sergey Fedorov <s.fedorov@samsung.com>
Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Message-id: 1413910544-20150-7-git-send-email-greg.bellows@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target-arm/helper.c | diffblobblamehistory | |
| target-arm/op_helper.c | diffblobblamehistory |