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target/riscv: Remove unnecessary riscv_*_names[] declaration
2021-03-10
Xuzhou Cheng
h
w
/
ssi:
xilinx
_
spips: Remove DMA r
e
lated dea
d
codes
.
.
.
Signed-off-by:
Xuzhou Cheng
<xuzhou.cheng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-10
Xuz
h
ou C
h
eng
hw/ssi: xilinx_
s
pips: C
l
e
an up codi
n
g convention issues
Signed-off-by:
Xuzhou Cheng
<xuzhou.cheng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-10
Xuzhou Cheng
hw/arm: xlnx-zynqmp: Con
n
e
c
t a Xilinx CS
U
DMA mo
d
ule
.
.
.
Signed-off-by:
Xuzhou Cheng
<xuzhou.cheng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-10
Xuzhou Cheng
hw/a
r
m:
xlnx-zynqmp: Clean up codin
g
convention issues
Signed-off-by:
Xuzhou Cheng
<xuzhou.cheng@windriver.com>
commit
|
commitdiff
|
tree
2021-03-08
Xuzhou
C
heng
h
w/dma: Implement a Xilinx
C
S
U
DMA m
o
de
l
Signed-off-by:
Xuzhou Cheng
<xuzhou.cheng@windriver.com>
commit
|
commitdiff
|
tree
2021-02-02
Xuzh
o
u Cheng
hw/ssi: imx_s
p
i: Disable chip selects when control
l
er
.
.
.
Signed-off-by:
Xuzhou Cheng
<xuzhou.cheng@windriver.com>
commit
|
commitdiff
|
tree
2021-01-16
Xuzhou Cheng
hw/block: m25p8
0
: I
m
ple
m
en
t
A
A
I-WP comm
a
nd
sup
p
o
rt
.
.
.
Signed-off-by:
Xuzhou Cheng
<xuzhou.cheng@windriver.com>
commit
|
commitdiff
|
tree