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target/arm/arch_dump: Add SVE notes
2019-12-20 Andrew Jefferyast2600: Configure CNTFRQ at 1125MHz
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-12-20 Andrew Jefferytarget/arm: Prepare generic timer for per-platform...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-12-20 Andrew Jefferytarget/arm: Abstract the generic timer frequency
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-12-20 Andrew Jefferytarget/arm: Remove redundant scaling of nexttick
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-09-03 Andrew Jefferyaspeed/timer: Provide back-pressure information for...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-07-01 Andrew Jefferyaspeed: vic: Add support for legacy register interface
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-07-01 Andrew Jefferyaspeed/timer: Fix match calculations
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2019-07-01 Andrew Jefferyaspeed/timer: Status register contains reload for stopped...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2018-07-16 Andrew Jefferyaspeed: Implement write-1-{set, clear} for AST2500...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2017-09-04 Andrew Jefferyaspeed_soc: Propagate silicon-rev to watchdog
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2017-09-04 Andrew Jefferywatchdog: wdt_aspeed: Add support for the reset width...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2016-06-27 Andrew Jefferypalmetto-bmc: Configure the SCU's hardware strapping...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2016-06-27 Andrew Jefferyast2400: Integrate the SCU model and set silicon revision
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2016-06-27 Andrew Jefferyhw/misc: Add a model for the ASPEED System Control...
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2016-06-17 Andrew Jefferyhw/timer: Add value matching support to aspeed_timer
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2016-03-16 Andrew Jefferyhw/arm: Add palmetto-bmc machine
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2016-03-16 Andrew Jefferyhw/arm: Add ASPEED AST2400 SoC model
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2016-03-16 Andrew Jefferyhw/intc: Add (new) ASPEED VIC device model
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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2016-03-16 Andrew Jefferyhw/timer: Add ASPEED timer device model
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
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AR7 emulation for QEMU