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target/avr: Register AVR support with the rest of QEMU
2020-07-11 Michael Rolniktarget/avr: Register AVR support with the rest of QEMU
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-11 Michael Rolniktarget/avr: Add support for disassembling via option...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-11 Michael Rolniktarget/avr: Initialize TCG register variables
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-11 Michael Rolniktarget/avr: Add instruction translation - CPU main...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-11 Michael Rolniktarget/avr: Add instruction translation - MCU Control...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-11 Michael Rolniktarget/avr: Add instruction translation - Bit and Bit...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-11 Michael Rolniktarget/avr: Add instruction translation - Data Transfer...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-11 Michael Rolniktarget/avr: Add instruction translation - Branch Instructions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-11 Michael Rolniktarget/avr: Add instruction translation - Arithmetic...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-11 Michael Rolniktarget/avr: Add instruction translation - Register...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-11 Michael Rolniktarget/avr: Add instruction helpers
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-10 Michael Rolniktarget/avr: Add definitions of AVR core types
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-10 Michael Rolniktarget/avr: Introduce enumeration AVRFeature
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-10 Michael Rolniktarget/avr: CPU class: Add GDB support
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-10 Michael Rolniktarget/avr: CPU class: Add migration support
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-10 Michael Rolniktarget/avr: CPU class: Add memory management support
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-10 Michael Rolniktarget/avr: CPU class: Add interrupt handling support
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-10 Michael Rolniktarget/avr: Introduce basic CPU class object
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-07-10 Michael Rolniktarget/avr: Add basic parameters of the new platform
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Yoshinori Satodocs: Document the RX target
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Philippe Mathieu... BootLinuxConsoleTest: Test the RX GDB simulator
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Yoshinori Satohw/rx: Add RX GDB simulator
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Philippe Mathieu... hw/rx: Register R5F562N7 and R5F562N8 MCUs
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Richard Hendersonhw/rx: Honor -accel qtest
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Yoshinori Satohw/rx: RX62N microcontroller (MCU)
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Yoshinori Satohw/char: RX62N serial communication interface (SCI)
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Yoshinori Satohw/timer: RX62N compare match timer (CMT)
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Yoshinori Satohw/timer: RX62N 8-Bit timer (TMR)
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Yoshinori Satohw/intc: RX62N interrupt controller (ICUa)
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Philippe Mathieu... hw/timer/sh_timer: Remove unused 'qemu/timer.h' include
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Philippe Mathieu... hw/sh4: Extract timer definitions to 'hw/timer/tmu012.h'
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Philippe Mathieu... hw/sh4: Use MemoryRegion typedef
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Philippe Mathieu... MAINTAINERS: Add an entry for common Renesas peripherals
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-22 Philippe Mathieu... MAINTAINERS: Cover sh_intc files in the R2D/Shix machine...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... target/sparc/int32_helper: Extract and use excp_name_str()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200331105048.27989-8-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... target/sparc/int32_helper: Remove DEBUG_PCALL definition
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200331105048.27989-7-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/timer/grlib_gptimer: Display frequency in decimal
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200331105048.27989-6-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/misc/grlib_ahb_apb_pnp: Add trace events on read...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200331105048.27989-5-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/misc/grlib_ahb_apb_pnp: Fix AHB PnP 8-bit accesses
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200331105048.27989-4-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200331105048.27989-3-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/sparc64/niagara: Remove duplicated NIAGARA_UART_BASE...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200608172144.20461-3-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/sparc64/niagara: Map the UART device unconditionally
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200608172144.20461-4-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/sparc/leon3: Map the UART device unconditionally
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200608172144.20461-2-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/misc/empty_slot: Name the slots when created
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200510152840.13558-8-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/misc/empty_slot: Move the 'hw/misc' and cover in...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200510152840.13558-7-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/misc/empty_slot: Convert debug printf() to trace...
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200510152840.13558-6-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/misc/empty_slot: Add a 'name' qdev property
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200510152840.13558-5-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/misc/empty_slot: Convert 'size' field as qdev property
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200510152840.13558-4-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/misc/empty_slot: Lower address space priority
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200510152840.13558-3-f4bug@amsat.org>
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2020-06-09 Philippe Mathieu... hw/sparc/sun4m: Use UnimplementedDevice for I/O devices
Message-Id: <20200510152840.13558-2-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Aleksandar MarkovicMAINTAINERS: Change Aleksandar Rikalo's email address
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Philippe Mathieu... hw/mips/mips_int: De-duplicate KVM interrupt delivery
Message-Id: <20200429082916.10669-2-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Aleksandar Markovichw/mips/malta: Add some logging for bad register offset...
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Aleksandar Markovichw/mips: Rename malta/mipssim/r4k/jazz files
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Philippe Mathieu... hw/mips/fuloong2e: Fix typo in Fuloong machine name
Message-id: <20200526104726.11273-11-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Philippe Mathieu... hw/mips/fuloong2e: Move code and update a comment
Message-id: <20200510210128.18343-4-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Philippe Mathieu... hw/pci-host/bonito: Set the Config register reset value...
Message-id: <20200510210128.18343-12-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Philippe Mathieu... hw/pci-host/bonito: Better describe the I/O CS regions
Message-id: <20200510210128.18343-11-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Philippe Mathieu... hw/pci-host/bonito: Map the different PCI ranges more...
Message-id: <20200526104726.11273-7-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Philippe Mathieu... hw/pci-host/bonito: Map all the Bonito64 I/O range
Message-id: <20200510210128.18343-9-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Philippe Mathieu... hw/pci-host/bonito: Map peripheral using physical address
Message-id: <20200510210128.18343-8-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Philippe Mathieu... hw/pci-host/bonito: Fix DPRINTF() format strings
Message-id: <20200510210128.18343-7-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Philippe Mathieu... hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito...
Message-id: <20200510210128.18343-6-f4bug@amsat.org>
...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-05-26 Huacai ChenMAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20200510210128.18343-2-f4bug@amsat.org>
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2020-03-19 Yoshinori SatoAdd rx-softmmu
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Richard Hendersontarget/rx: Dump bytes for each insn during disassembly
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Richard Hendersontarget/rx: Collect all bytes during disassembly
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Richard Hendersontarget/rx: Emit all disassembly in one prt()
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Richard Hendersontarget/rx: Use prt_ldmi for XCHG_mr disassembly
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Richard Hendersontarget/rx: Replace operand with prt_ldmi in disassembler
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Richard Hendersontarget/rx: Disassemble rx_index_addr into a string
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Yoshinori Satotarget/rx: RX disassembler
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Yoshinori Satotarget/rx: CPU definitions
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Yoshinori Satotarget/rx: TCG helpers
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Yoshinori Satotarget/rx: TCG translation
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Yoshinori SatoMAINTAINERS: Add entry for the Renesas RX architecture
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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2020-03-19 Yoshinori Satohw/registerfields.h: Add 8bit and 16bit register macros
 ...off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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AR7 emulation for QEMU