target/avr: Add instruction translation - Arithmetic and Logic Instructions
commit865f3bb9e16365a27efaf3e5b4787fd402764484
authorMichael Rolnik <mrolnik@gmail.com>
Fri, 24 Jan 2020 00:51:10 +0000 (24 01:51 +0100)
committerPhilippe Mathieu-Daudé <f4bug@amsat.org>
Sat, 11 Jul 2020 09:02:05 +0000 (11 11:02 +0200)
tree43fdc62a79113694185817afa7f616d65b322fd4
parente03feba0079472da577cd940adb43041a40ea337
target/avr: Add instruction translation - Arithmetic and Logic Instructions

This includes:
- ADD, ADC, ADIW
- SBIW, SUB, SUBI, SBC, SBCI
- AND, ANDI
- OR, ORI, EOR
- COM, NEG
- INC, DEC
- MUL, MULS, MULSU
- FMUL, FMULS, FMULSU
- DES

Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
Message-Id: <20200705140315.260514-12-huth@tuxfamily.org>
[PMD: Added qemu_log_mask(LOG_UNIMP) in trans_DES()]
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
target/avr/insn.decode [new file with mode: 0644]
target/avr/translate.c