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Merge remote-tracking branch 'remotes/philmd-gitlab/tags/edk2-next-20200121' into...
2020-01-17
Alist
a
ir Franc
i
s
hw/arm: Add the Netdui
n
o Plu
s
2
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2020-01-17
Alistai
r
Francis
hw/arm:
Add the STM32F4x
x
SoC
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2020-01-17
Alistai
r
Fra
n
cis
hw/misc: Add the STM32F4xx EXTI device
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2020-01-17
Alistair Francis
h
w
/misc: A
d
d
the STM32F
4
xx Sysconf
i
g d
e
vice
Signed-off-by:
Alistair Francis
<alistair@alistair23.me>
commit
|
commitdiff
|
tree
2019-11-14
A
l
is
t
air F
r
ancis
ris
c
v/virt
:
Increase flash size
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-11-14
Alistai
r
F
rancis
opensb
i
: Upgrade f
r
om
v
0
.
4 to v0
.
5
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-11-14
Alistair Francis
tar
g
et/riscv: Remove atomic acces
s
es to M
I
P CSR
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alistair Francis
riscv/
b
oot: Fix possible memory leak
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Al
i
sta
i
r
F
rancis
ri
s
cv/vir
t
: Jump t
o
pflas
h
if
spe
c
ified
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alista
i
r
Fr
a
n
cis
ris
c
v
/virt:
A
dd
t
he PFlas
h
CFI0
1
device
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Ali
s
tair
Francis
ris
c
v/virt
:
Manu
a
lly
define t
h
e machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
A
l
istair
F
rancis
riscv/s
i
five_
u
:
A
dd
t
h
e start-i
n
-flash property
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alistair Francis
riscv/si
f
ive
_
u: Manual
l
y define
t
he machine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Alist
a
ir
F
ranc
i
s
ris
c
v
/s
i
fiv
e
_u
:
Add QSPI memory region
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-10-28
Ali
s
tair
Franci
s
riscv/
s
i
f
ive_u:
A
d
d L2-LIM cache memor
y
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-09-17
Al
i
stair
F
r
ancis
target
/
riscv: Use TB_FLAGS_MSTATUS_FS
for flo
a
ting
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-09-17
Al
i
st
a
i
r Fr
a
n
cis
target/riscv: F
i
x m
s
tatu
s
d
irty
m
ask
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-09-17
Ali
s
tair
Francis
target/riscv:
Update the Hypervi
s
o
r
C
SRs to v0
.
4
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-09-17
A
l
istair Fr
a
ncis
t
a
rget/ris
c
v: Cre
a
te function t
o
te
s
t if FP
is enabled
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-09-17
Alist
a
ir
Francis
riscv
:
p
l
i
c: Rem
o
ve
unused in
t
errupt
f
unction
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-07-26
Alistair Francis
ri
s
cv/
b
o
o
t: F
i
xup the RISC-V f
i
rm
w
are warning
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-07-18
Alistair Franci
s
hw/ri
s
cv:
L
oad OpenSBI a
s
t
he d
e
fault firmware
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-07-18
A
l
i
s
tair Franc
i
s
ro
m
s: Add Ope
n
SBI version 0
.
4
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-07-09
A
listair
F
rancis
tcg/riscv
:
Fix RIS
C
-
VH host build failure
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-27
Alistair Francis
hw/
r
iscv: Exte
n
d the kernel loadin
g
support
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-27
Al
i
stair Fr
a
n
c
is
h
w/riscv: Add support f
o
r loa
d
ing a firmware
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-27
Alistair F
r
ancis
h
w
/ri
s
c
v
: Split ou
t
the
boot function
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-25
Alistair Fran
c
is
targe
t
/
r
iscv: Add support for disabling/enabling
C
o
u
nters
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-25
Alis
t
a
i
r Fra
n
c
is
ta
r
g
e
t/r
i
scv: Remove user version informa
t
ion
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-25
A
listair Fra
n
cis
tar
g
et/ri
s
cv: Req
u
ire ei
t
her I or E base extension
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-25
Alistair
Francis
qe
m
u-de
p
recated
.
texi
:
D
e
precate the RISC-V privledge
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-25
Alista
i
r Francis
target/ri
s
cv: Set privl
e
dge spec 1
.
11
.
0
as d
e
fault
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-25
Al
i
sta
i
r Fr
a
ncis
ta
r
g
et/riscv:
A
dd the
m
coun
t
inhibi
t
CSR
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-24
A
li
s
t
a
i
r Fran
c
is
t
arget/riscv: Add the privledge spec version 1
.
11
.
0
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-24
Alistair Francis
targ
e
t/riscv: Rest
r
ucture depr
e
cat
d
CP
U
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-06-24
Alistair Francis
target/riscv: Allo
w
settin
g
ISA extensions v
i
a CPU
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
Al
i
stair Fr
a
n
cis
target/risc
v
: Add the HGATP register masks
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
A
listair Francis
t
arge
t
/r
i
s
cv:
Add the HSTATUS
r
egister mask
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
Al
i
s
tair Francis
ta
r
g
e
t
/riscv:
Add
Hypervis
o
r CSR
ma
c
r
o
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
A
lista
i
r
F
ran
c
is
targe
t
/riscv: Allow se
t
ting mstatus virt
u
lisatio
n
bits
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
Alista
i
r Francis
target/ris
c
v: Add the MPV
a
nd
M
T
L ms
t
atus bits
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
A
l
istair F
r
anc
i
s
targe
t
/riscv: Imp
r
o
ve the s
c
ause logic
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
Alistair Francis
target/riscv: Trigger
i
nt
e
rrupt o
n
MIP
u
pdat
e
asynch
r
o
n
ous
l
y
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
Alistair Francis
target/riscv: Ma
r
k privi
l
e
g
e
le
v
el 2 as reserved
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
Alistai
r
Francis
riscv: spike: Add a generic s
p
ike mac
h
ine
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
Alis
t
air Francis
t
arget/riscv: Deprecate the
g
e
ne
r
ic
n
o MMU CPUs
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
Alistair Franci
s
t
a
rget/
r
iscv: Add a ba
s
e 3
2
an
d
64 bit CPU
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
A
listai
r
Fran
c
is
tar
g
et/riscv: Create settable CPU pro
p
erti
e
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
Alistair
F
rancis
riscv: virt: Allo
w
sp
e
c
i
fying a CPU v
i
a commandline
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-24
Alistair
F
r
anc
i
s
linux-user
/
riscv: A
d
d t
h
e CPU type as a comment
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-23
A
lis
t
air Fr
a
ncis
targe
t
/arm: Fix ve
c
tor operation segfault
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-05-09
Alistair Francis
l
i
nux-user/e
l
fl
o
ad: Fix GCC 9 build warnings
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-04-04
A
list
a
ir Fran
c
is
riscv:
plic:
L
og g
u
est errors
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-04-04
Alistair Francis
ris
c
v
:
plic: Fix incorrect irq
calcula
t
ion
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-03-27
Alistair Fran
c
is
MAI
N
TAINERS: Up
d
ate the device tree ma
i
ntain
e
r
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-03-19
A
li
s
t
air Franci
s
t
a
r
g
e
t
/ri
s
cv: Remove unused
s
t
r
uct
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-03-19
Alis
t
ai
r
F
ranc
i
s
riscv: sifive
_
u
: Allow
u
p to 4 CPUs to be creat
e
d
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-03-19
Alistair Francis
riscv:
p
mp:
L
og pmp access
e
rrors as guest errors
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-03-18
Alistair Francis
r
iscv
:
plic: Set msi_nonb
r
oke
n
as t
r
ue
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-02-11
Alista
i
r Fran
c
is
r
iscv: Ensure the k
e
r
n
el
s
tar
t
address
i
s correctl
y
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-02-11
Al
i
stair F
r
anc
i
s
R
ISC-V
:
Add p
r
iv_ver
t
o
Disa
s
C
o
ntext
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2019-01-10
A
listair
Francis
de
f
ault-co
n
f
i
gs: Enable USB supp
o
rt for RISC-V machines
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Alistair Francis
configure: Add support
for buildi
n
g RI
S
C-V host
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Alistair
Francis
di
s
as: Add RISC-V support
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Alistair Francis
tcg: Add RISC-V cpu
s
ignal handler
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Alistair Fran
c
is
tcg
/
ri
s
c
v
: Add t
h
e targe
t
init co
d
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Alistai
r
Francis
t
cg/riscv: Add the prologue gene
r
a
t
ion
a
nd
r
e
gister
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Alistair Francis
tcg/riscv
:
Add the ou
t
o
p
decod
e
r
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Alist
a
ir Francis
t
cg/riscv:
Add
direct l
o
ad and store instructions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Alistair Francis
tc
g
/riscv: Add sl
o
wpath load a
n
d
store instruc
t
i
ons
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
A
lis
t
air Francis
tcg/ri
s
cv: Add branch and jump instruct
i
on
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
A
li
s
t
a
ir Franci
s
tcg/riscv
:
Add the add2 and
s
ub
2
in
s
tructions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Alistair Fr
a
ncis
tcg/ris
c
v: Add the o
u
t lo
a
d
a
n
d store
instruc
t
io
n
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Alistair Francis
tcg/riscv: Add
the extra
c
t instructions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Ali
s
tair Francis
tcg/ri
s
c
v
: A
d
d th
e
m
o
v and movi
i
nstruction
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
Ali
s
tair Francis
t
c
g
/riscv: Add t
h
e re
l
oca
t
ion functions
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
|
commitdiff
|
tree
2018-12-25
A
listai
r
Francis
tc
g
/riscv
:
Add t
h
e in
s
t
ruction emitters
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2018-12-25
Alistair Francis
tcg/riscv:
Ad
d
t
h
e
imm
e
diate
e
nc
o
ders
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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commitdiff
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tree
2018-12-25
Alistair
Francis
tcg/riscv: Add supp
o
rt for the con
s
traints
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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commitdiff
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tree
2018-12-25
Ali
s
tair
Francis
t
c
g/r
i
s
c
v
:
Add the tcg target
r
egis
t
e
r
s
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2018-12-25
A
l
ist
a
i
r
Fran
c
is
tcg/riscv: A
d
d
the tcg
-
target
.
h
file
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-12-25
Alistair Francis
exec: Add RIS
C
-V GCC pois
o
n macro
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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tree
2018-12-25
A
listair Francis
linux-user: Add host de
p
en
d
ency f
o
r RISC-V 64-bit
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-12-25
Alistair Fra
n
cis
lin
u
x-user
:
Add
host
dependency
f
or RISC-V 32-b
i
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-12-25
Alistair F
r
ancis
elf
.
h
:
Add the RISCV ELF
mag
i
c
numbers
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-12-20
Alistair Francis
riscv: En
a
bl
e
VGA and PCIE_VG
A
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-12-20
Alistair Francis
hw/riscv/virt:
C
onn
e
ct the gpex PCI
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-12-20
Alistair Francis
hw/riscv/v
i
r
t
: Adju
s
t mem
o
ry layout
s
p
acing
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-12-20
Alis
t
air Fra
n
cis
hw/riscv/virt: Inc
r
ease the
n
umber of in
t
errupts
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-12-17
Alistair Francis
tcg/mips: Improve the
a
dd2/sub2
com
m
and to use TCG_TARGET_RE
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-11-13
A
l
i
stair Francis
hw
/
riscv/virt: Fr
e
e the
t
est device tree
node name
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2018-11-08
Alist
a
ir F
r
ancis
riscv: sp
i
ke: Fix memor
y
leak in the board ini
t
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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2018-09-05
A
listair Francis
hw/riscv/spike:
Set t
h
e s
o
c device tree node as
a
s
imple-bus
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-09-05
Alist
a
i
r
Franc
i
s
hw/riscv/virtio: Set the soc devic
e
tr
e
e
node
a
s a
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-07-19
Alistair
Francis
spike: Fi
x
cras
h
whe
n
introsp
e
cting the dev
i
ce
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-07-19
Al
i
stair Francis
riscv_hart:
F
ix crash w
h
e
n
introsp
e
cting the
dev
i
c
e
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-07-19
Alist
a
ir Fr
a
ncis
v
irt: Fix cra
s
h wh
e
n int
r
os
p
ecti
n
g the
d
evice
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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tree
2018-07-19
Alista
i
r Franci
s
sifive_u: Fix cr
a
sh when introspecting
the de
v
ice
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-07-19
Alistair Francis
sifive_e: Fix crash when
introsp
e
cting the device
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
commit
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2018-07-05
Alistair F
r
a
n
c
i
s
hw/riscv/sif
i
ve_u: Connect the Ca
d
ence GEM
Ethernet
.
.
.
Signed-off-by:
Alistair Francis
<alistair.francis@wdc.com>
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