target/riscv: Add the HSTATUS register masks
commitd28b15a4d3b1e000ec7bf9090fe870cbc5f1eb2c
authorAlistair Francis <Alistair.Francis@wdc.com>
Sat, 20 Apr 2019 02:27:35 +0000 (20 02:27 +0000)
committerPalmer Dabbelt <palmer@sifive.com>
Fri, 24 May 2019 19:09:24 +0000 (24 12:09 -0700)
tree9158fedfd12c960e914eded9b45d3bc5e2e02d0c
parent71f09a5bb48d0c51b87e70158407ec2db4a9c6e2
target/riscv: Add the HSTATUS register masks

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviwed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
target/riscv/cpu_bits.h