2 * ASPEED GPIO Controller
4 * Copyright (C) 2017-2018 IBM Corp.
6 * This code is licensed under the GPL version 2 or later. See
7 * the COPYING file in the top-level directory.
13 #include "hw/sysbus.h"
14 #include "qom/object.h"
16 #define TYPE_ASPEED_GPIO "aspeed.gpio"
17 OBJECT_DECLARE_TYPE(AspeedGPIOState
, AspeedGPIOClass
, ASPEED_GPIO
)
19 #define ASPEED_GPIO_MAX_NR_SETS 8
20 #define ASPEED_REGS_PER_BANK 14
21 #define ASPEED_GPIO_MAX_NR_REGS (ASPEED_REGS_PER_BANK * ASPEED_GPIO_MAX_NR_SETS)
22 #define ASPEED_GPIO_NR_PINS 228
23 #define ASPEED_GROUPS_PER_SET 4
24 #define ASPEED_GPIO_NR_DEBOUNCE_REGS 3
25 #define ASPEED_CHARS_PER_GROUP_LABEL 4
27 typedef struct GPIOSets GPIOSets
;
29 typedef struct GPIOSetProperties
{
32 char group_label
[ASPEED_GROUPS_PER_SET
][ASPEED_CHARS_PER_GROUP_LABEL
];
44 gpio_reg_reset_tolerant
,
47 gpio_reg_cmd_source_0
,
48 gpio_reg_cmd_source_1
,
53 typedef struct AspeedGPIOReg
{
55 enum GPIORegType type
;
58 struct AspeedGPIOClass
{
59 SysBusDevice parent_obj
;
60 const GPIOSetProperties
*props
;
61 uint32_t nr_gpio_pins
;
62 uint32_t nr_gpio_sets
;
64 const AspeedGPIOReg
*reg_table
;
67 struct AspeedGPIOState
{
75 qemu_irq gpios
[ASPEED_GPIO_NR_PINS
];
77 /* Parallel GPIO Registers */
78 uint32_t debounce_regs
[ASPEED_GPIO_NR_DEBOUNCE_REGS
];
80 uint32_t data_value
; /* Reflects pin values */
81 uint32_t data_read
; /* Contains last value written to data value */
89 uint32_t cmd_source_0
;
90 uint32_t cmd_source_1
;
94 } sets
[ASPEED_GPIO_MAX_NR_SETS
];
97 #endif /* _ASPEED_GPIO_H_ */