Use DEFINE_MACHINE() to register all machines
[qemu/ar7.git] / hw / xtensa / xtfpga.c
blobd6ddfa1bba3c0995e96585b98d315d80372e2d88
1 /*
2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
3 * All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #include "sysemu/sysemu.h"
29 #include "hw/boards.h"
30 #include "hw/loader.h"
31 #include "elf.h"
32 #include "exec/memory.h"
33 #include "exec/address-spaces.h"
34 #include "hw/char/serial.h"
35 #include "net/net.h"
36 #include "hw/sysbus.h"
37 #include "hw/block/flash.h"
38 #include "sysemu/block-backend.h"
39 #include "sysemu/char.h"
40 #include "sysemu/device_tree.h"
41 #include "qemu/error-report.h"
42 #include "bootparam.h"
44 typedef struct LxBoardDesc {
45 hwaddr flash_base;
46 size_t flash_size;
47 size_t flash_boot_base;
48 size_t flash_sector_size;
49 size_t sram_size;
50 } LxBoardDesc;
52 typedef struct Lx60FpgaState {
53 MemoryRegion iomem;
54 uint32_t leds;
55 uint32_t switches;
56 } Lx60FpgaState;
58 static void lx60_fpga_reset(void *opaque)
60 Lx60FpgaState *s = opaque;
62 s->leds = 0;
63 s->switches = 0;
66 static uint64_t lx60_fpga_read(void *opaque, hwaddr addr,
67 unsigned size)
69 Lx60FpgaState *s = opaque;
71 switch (addr) {
72 case 0x0: /*build date code*/
73 return 0x09272011;
75 case 0x4: /*processor clock frequency, Hz*/
76 return 10000000;
78 case 0x8: /*LEDs (off = 0, on = 1)*/
79 return s->leds;
81 case 0xc: /*DIP switches (off = 0, on = 1)*/
82 return s->switches;
84 return 0;
87 static void lx60_fpga_write(void *opaque, hwaddr addr,
88 uint64_t val, unsigned size)
90 Lx60FpgaState *s = opaque;
92 switch (addr) {
93 case 0x8: /*LEDs (off = 0, on = 1)*/
94 s->leds = val;
95 break;
97 case 0x10: /*board reset*/
98 if (val == 0xdead) {
99 qemu_system_reset_request();
101 break;
105 static const MemoryRegionOps lx60_fpga_ops = {
106 .read = lx60_fpga_read,
107 .write = lx60_fpga_write,
108 .endianness = DEVICE_NATIVE_ENDIAN,
111 static Lx60FpgaState *lx60_fpga_init(MemoryRegion *address_space,
112 hwaddr base)
114 Lx60FpgaState *s = g_malloc(sizeof(Lx60FpgaState));
116 memory_region_init_io(&s->iomem, NULL, &lx60_fpga_ops, s,
117 "lx60.fpga", 0x10000);
118 memory_region_add_subregion(address_space, base, &s->iomem);
119 lx60_fpga_reset(s);
120 qemu_register_reset(lx60_fpga_reset, s);
121 return s;
124 static void lx60_net_init(MemoryRegion *address_space,
125 hwaddr base,
126 hwaddr descriptors,
127 hwaddr buffers,
128 qemu_irq irq, NICInfo *nd)
130 DeviceState *dev;
131 SysBusDevice *s;
132 MemoryRegion *ram;
134 dev = qdev_create(NULL, "open_eth");
135 qdev_set_nic_properties(dev, nd);
136 qdev_init_nofail(dev);
138 s = SYS_BUS_DEVICE(dev);
139 sysbus_connect_irq(s, 0, irq);
140 memory_region_add_subregion(address_space, base,
141 sysbus_mmio_get_region(s, 0));
142 memory_region_add_subregion(address_space, descriptors,
143 sysbus_mmio_get_region(s, 1));
145 ram = g_malloc(sizeof(*ram));
146 memory_region_init_ram(ram, OBJECT(s), "open_eth.ram", 16384,
147 &error_fatal);
148 vmstate_register_ram_global(ram);
149 memory_region_add_subregion(address_space, buffers, ram);
152 static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
154 XtensaCPU *cpu = opaque;
156 return cpu_get_phys_page_debug(CPU(cpu), addr);
159 static void lx60_reset(void *opaque)
161 XtensaCPU *cpu = opaque;
163 cpu_reset(CPU(cpu));
166 static uint64_t lx60_io_read(void *opaque, hwaddr addr,
167 unsigned size)
169 return 0;
172 static void lx60_io_write(void *opaque, hwaddr addr,
173 uint64_t val, unsigned size)
177 static const MemoryRegionOps lx60_io_ops = {
178 .read = lx60_io_read,
179 .write = lx60_io_write,
180 .endianness = DEVICE_NATIVE_ENDIAN,
183 static void lx_init(const LxBoardDesc *board, MachineState *machine)
185 #ifdef TARGET_WORDS_BIGENDIAN
186 int be = 1;
187 #else
188 int be = 0;
189 #endif
190 MemoryRegion *system_memory = get_system_memory();
191 XtensaCPU *cpu = NULL;
192 CPUXtensaState *env = NULL;
193 MemoryRegion *ram, *rom, *system_io;
194 DriveInfo *dinfo;
195 pflash_t *flash = NULL;
196 QemuOpts *machine_opts = qemu_get_machine_opts();
197 const char *cpu_model = machine->cpu_model;
198 const char *kernel_filename = qemu_opt_get(machine_opts, "kernel");
199 const char *kernel_cmdline = qemu_opt_get(machine_opts, "append");
200 const char *dtb_filename = qemu_opt_get(machine_opts, "dtb");
201 const char *initrd_filename = qemu_opt_get(machine_opts, "initrd");
202 int n;
204 if (!cpu_model) {
205 cpu_model = XTENSA_DEFAULT_CPU_MODEL;
208 for (n = 0; n < smp_cpus; n++) {
209 cpu = cpu_xtensa_init(cpu_model);
210 if (cpu == NULL) {
211 error_report("unable to find CPU definition '%s'",
212 cpu_model);
213 exit(EXIT_FAILURE);
215 env = &cpu->env;
217 env->sregs[PRID] = n;
218 qemu_register_reset(lx60_reset, cpu);
219 /* Need MMU initialized prior to ELF loading,
220 * so that ELF gets loaded into virtual addresses
222 cpu_reset(CPU(cpu));
225 ram = g_malloc(sizeof(*ram));
226 memory_region_init_ram(ram, NULL, "lx60.dram", machine->ram_size,
227 &error_fatal);
228 vmstate_register_ram_global(ram);
229 memory_region_add_subregion(system_memory, 0, ram);
231 system_io = g_malloc(sizeof(*system_io));
232 memory_region_init_io(system_io, NULL, &lx60_io_ops, NULL, "lx60.io",
233 224 * 1024 * 1024);
234 memory_region_add_subregion(system_memory, 0xf0000000, system_io);
235 lx60_fpga_init(system_io, 0x0d020000);
236 if (nd_table[0].used) {
237 lx60_net_init(system_io, 0x0d030000, 0x0d030400, 0x0d800000,
238 xtensa_get_extint(env, 1), nd_table);
241 if (!serial_hds[0]) {
242 serial_hds[0] = qemu_chr_new("serial0", "null", NULL);
245 serial_mm_init(system_io, 0x0d050020, 2, xtensa_get_extint(env, 0),
246 115200, serial_hds[0], DEVICE_NATIVE_ENDIAN);
248 dinfo = drive_get(IF_PFLASH, 0, 0);
249 if (dinfo) {
250 flash = pflash_cfi01_register(board->flash_base,
251 NULL, "lx60.io.flash", board->flash_size,
252 blk_by_legacy_dinfo(dinfo),
253 board->flash_sector_size,
254 board->flash_size / board->flash_sector_size,
255 4, 0x0000, 0x0000, 0x0000, 0x0000, be);
256 if (flash == NULL) {
257 error_report("unable to mount pflash");
258 exit(EXIT_FAILURE);
262 /* Use presence of kernel file name as 'boot from SRAM' switch. */
263 if (kernel_filename) {
264 uint32_t entry_point = env->pc;
265 size_t bp_size = 3 * get_tag_size(0); /* first/last and memory tags */
266 uint32_t tagptr = 0xfe000000 + board->sram_size;
267 uint32_t cur_tagptr;
268 BpMemInfo memory_location = {
269 .type = tswap32(MEMORY_TYPE_CONVENTIONAL),
270 .start = tswap32(0),
271 .end = tswap32(machine->ram_size),
273 uint32_t lowmem_end = machine->ram_size < 0x08000000 ?
274 machine->ram_size : 0x08000000;
275 uint32_t cur_lowmem = QEMU_ALIGN_UP(lowmem_end / 2, 4096);
277 rom = g_malloc(sizeof(*rom));
278 memory_region_init_ram(rom, NULL, "lx60.sram", board->sram_size,
279 &error_fatal);
280 vmstate_register_ram_global(rom);
281 memory_region_add_subregion(system_memory, 0xfe000000, rom);
283 if (kernel_cmdline) {
284 bp_size += get_tag_size(strlen(kernel_cmdline) + 1);
286 if (dtb_filename) {
287 bp_size += get_tag_size(sizeof(uint32_t));
289 if (initrd_filename) {
290 bp_size += get_tag_size(sizeof(BpMemInfo));
293 /* Put kernel bootparameters to the end of that SRAM */
294 tagptr = (tagptr - bp_size) & ~0xff;
295 cur_tagptr = put_tag(tagptr, BP_TAG_FIRST, 0, NULL);
296 cur_tagptr = put_tag(cur_tagptr, BP_TAG_MEMORY,
297 sizeof(memory_location), &memory_location);
299 if (kernel_cmdline) {
300 cur_tagptr = put_tag(cur_tagptr, BP_TAG_COMMAND_LINE,
301 strlen(kernel_cmdline) + 1, kernel_cmdline);
303 if (dtb_filename) {
304 int fdt_size;
305 void *fdt = load_device_tree(dtb_filename, &fdt_size);
306 uint32_t dtb_addr = tswap32(cur_lowmem);
308 if (!fdt) {
309 error_report("could not load DTB '%s'", dtb_filename);
310 exit(EXIT_FAILURE);
313 cpu_physical_memory_write(cur_lowmem, fdt, fdt_size);
314 cur_tagptr = put_tag(cur_tagptr, BP_TAG_FDT,
315 sizeof(dtb_addr), &dtb_addr);
316 cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + fdt_size, 4096);
318 if (initrd_filename) {
319 BpMemInfo initrd_location = { 0 };
320 int initrd_size = load_ramdisk(initrd_filename, cur_lowmem,
321 lowmem_end - cur_lowmem);
323 if (initrd_size < 0) {
324 initrd_size = load_image_targphys(initrd_filename,
325 cur_lowmem,
326 lowmem_end - cur_lowmem);
328 if (initrd_size < 0) {
329 error_report("could not load initrd '%s'", initrd_filename);
330 exit(EXIT_FAILURE);
332 initrd_location.start = tswap32(cur_lowmem);
333 initrd_location.end = tswap32(cur_lowmem + initrd_size);
334 cur_tagptr = put_tag(cur_tagptr, BP_TAG_INITRD,
335 sizeof(initrd_location), &initrd_location);
336 cur_lowmem = QEMU_ALIGN_UP(cur_lowmem + initrd_size, 4096);
338 cur_tagptr = put_tag(cur_tagptr, BP_TAG_LAST, 0, NULL);
339 env->regs[2] = tagptr;
341 uint64_t elf_entry;
342 uint64_t elf_lowaddr;
343 int success = load_elf(kernel_filename, translate_phys_addr, cpu,
344 &elf_entry, &elf_lowaddr, NULL, be, ELF_MACHINE, 0);
345 if (success > 0) {
346 entry_point = elf_entry;
347 } else {
348 hwaddr ep;
349 int is_linux;
350 success = load_uimage(kernel_filename, &ep, NULL, &is_linux,
351 translate_phys_addr, cpu);
352 if (success > 0 && is_linux) {
353 entry_point = ep;
354 } else {
355 error_report("could not load kernel '%s'",
356 kernel_filename);
357 exit(EXIT_FAILURE);
360 if (entry_point != env->pc) {
361 static const uint8_t jx_a0[] = {
362 #ifdef TARGET_WORDS_BIGENDIAN
363 0x0a, 0, 0,
364 #else
365 0xa0, 0, 0,
366 #endif
368 env->regs[0] = entry_point;
369 cpu_physical_memory_write(env->pc, jx_a0, sizeof(jx_a0));
371 } else {
372 if (flash) {
373 MemoryRegion *flash_mr = pflash_cfi01_get_memory(flash);
374 MemoryRegion *flash_io = g_malloc(sizeof(*flash_io));
376 memory_region_init_alias(flash_io, NULL, "lx60.flash",
377 flash_mr, board->flash_boot_base,
378 board->flash_size - board->flash_boot_base < 0x02000000 ?
379 board->flash_size - board->flash_boot_base : 0x02000000);
380 memory_region_add_subregion(system_memory, 0xfe000000,
381 flash_io);
386 static void xtensa_lx60_init(MachineState *machine)
388 static const LxBoardDesc lx60_board = {
389 .flash_base = 0xf8000000,
390 .flash_size = 0x00400000,
391 .flash_sector_size = 0x10000,
392 .sram_size = 0x20000,
394 lx_init(&lx60_board, machine);
397 static void xtensa_lx200_init(MachineState *machine)
399 static const LxBoardDesc lx200_board = {
400 .flash_base = 0xf8000000,
401 .flash_size = 0x01000000,
402 .flash_sector_size = 0x20000,
403 .sram_size = 0x2000000,
405 lx_init(&lx200_board, machine);
408 static void xtensa_ml605_init(MachineState *machine)
410 static const LxBoardDesc ml605_board = {
411 .flash_base = 0xf8000000,
412 .flash_size = 0x01000000,
413 .flash_sector_size = 0x20000,
414 .sram_size = 0x2000000,
416 lx_init(&ml605_board, machine);
419 static void xtensa_kc705_init(MachineState *machine)
421 static const LxBoardDesc kc705_board = {
422 .flash_base = 0xf0000000,
423 .flash_size = 0x08000000,
424 .flash_boot_base = 0x06000000,
425 .flash_sector_size = 0x20000,
426 .sram_size = 0x2000000,
428 lx_init(&kc705_board, machine);
431 static void xtensa_lx60_machine_init(MachineClass *mc)
433 mc->desc = "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
434 mc->init = xtensa_lx60_init;
435 mc->max_cpus = 4;
438 DEFINE_MACHINE("lx60", xtensa_lx60_machine_init)
440 static void xtensa_lx200_machine_init(MachineClass *mc)
442 mc->desc = "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
443 mc->init = xtensa_lx200_init;
444 mc->max_cpus = 4;
447 DEFINE_MACHINE("lx200", xtensa_lx200_machine_init)
449 static void xtensa_ml605_machine_init(MachineClass *mc)
451 mc->desc = "ml605 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
452 mc->init = xtensa_ml605_init;
453 mc->max_cpus = 4;
456 DEFINE_MACHINE("ml605", xtensa_ml605_machine_init)
458 static void xtensa_kc705_machine_init(MachineClass *mc)
460 mc->desc = "kc705 EVB (" XTENSA_DEFAULT_CPU_MODEL ")";
461 mc->init = xtensa_kc705_init;
462 mc->max_cpus = 4;
465 DEFINE_MACHINE("kc705", xtensa_kc705_machine_init)