hw/arm/bcm2836.c

   1 /*
   2  * Raspberry Pi emulation (c) 2012 Gregory Estrade
   3  * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
   4  *
   5  * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
   6  * Written by Andrew Baumann
   7  *
   8  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   9  * See the COPYING file in the top-level directory.
  10  */
  11
  12 #include "qemu/osdep.h"
  13 #include "qapi/error.h"
  14 #include "qemu/module.h"
  15 #include "cpu.h"
  16 #include "hw/arm/bcm2836.h"
  17 #include "hw/arm/raspi_platform.h"
  18 #include "hw/sysbus.h"
  19
  20 struct BCM283XInfo {
  21     const char *name;
  22     const char *cpu_type;
  23     hwaddr peri_base; /* Peripheral base address seen by the CPU */
  24     hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
  25     int clusterid;
  26 };
  27
  28 static const BCM283XInfo bcm283x_socs[] = {
  29     {
  30         .name = TYPE_BCM2836,
  31         .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
  32         .peri_base = 0x3f000000,
  33         .ctrl_base = 0x40000000,
  34         .clusterid = 0xf,
  35     },
  36 #ifdef TARGET_AARCH64
  37     {
  38         .name = TYPE_BCM2837,
  39         .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
  40         .peri_base = 0x3f000000,
  41         .ctrl_base = 0x40000000,
  42         .clusterid = 0x0,
  43     },
  44 #endif
  45 };
  46
  47 static void bcm2836_init(Object *obj)
  48 {
  49     BCM283XState *s = BCM283X(obj);
  50     BCM283XClass *bc = BCM283X_GET_CLASS(obj);
  51     const BCM283XInfo *info = bc->info;
  52     int n;
  53
  54     for (n = 0; n < BCM283X_NCPUS; n++) {
  55         object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
  56                                 info->cpu_type);
  57     }
  58
  59     object_initialize_child(obj, "control", &s->control, TYPE_BCM2836_CONTROL);
  60
  61     object_initialize_child(obj, "peripherals", &s->peripherals,
  62                             TYPE_BCM2835_PERIPHERALS);
  63     object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),
  64                               "board-rev");
  65     object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals),
  66                               "vcram-size");
  67 }
  68
  69 static void bcm2836_realize(DeviceState *dev, Error **errp)
  70 {
  71     BCM283XState *s = BCM283X(dev);
  72     BCM283XClass *bc = BCM283X_GET_CLASS(dev);
  73     const BCM283XInfo *info = bc->info;
  74     Object *obj;
  75     Error *err = NULL;
  76     int n;
  77
  78     /* common peripherals from bcm2835 */
  79
  80     obj = object_property_get_link(OBJECT(dev), "ram", &err);
  81     if (obj == NULL) {
  82         error_setg(errp, "%s: required ram link not found: %s",
  83                    __func__, error_get_pretty(err));
  84         return;
  85     }
  86
  87     object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj);
  88
  89     sysbus_realize(SYS_BUS_DEVICE(&s->peripherals), &err);
  90     if (err) {
  91         error_propagate(errp, err);
  92         return;
  93     }
  94
  95     object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->peripherals),
  96                               "sd-bus");
  97
  98     sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
  99                             info->peri_base, 1);
 100
 101     /* bcm2836 interrupt controller (and mailboxes, etc.) */
 102     sysbus_realize(SYS_BUS_DEVICE(&s->control), &err);
 103     if (err) {
 104         error_propagate(errp, err);
 105         return;
 106     }
 107
 108     sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
 109
 110     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
 111         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
 112     sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
 113         qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
 114
 115     for (n = 0; n < BCM283X_NCPUS; n++) {
 116         /* TODO: this should be converted to a property of ARM_CPU */
 117         s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
 118
 119         /* set periphbase/CBAR value for CPU-local registers */
 120         object_property_set_int(OBJECT(&s->cpu[n].core),
 121                                 info->peri_base,
 122                                 "reset-cbar", &err);
 123         if (err) {
 124             error_propagate(errp, err);
 125             return;
 126         }
 127
 128         /* start powered off if not enabled */
 129         object_property_set_bool(OBJECT(&s->cpu[n].core), n >= s->enabled_cpus,
 130                                  "start-powered-off", &err);
 131         if (err) {
 132             error_propagate(errp, err);
 133             return;
 134         }
 135
 136         qdev_realize(DEVICE(&s->cpu[n].core), NULL, &err);
 137         if (err) {
 138             error_propagate(errp, err);
 139             return;
 140         }
 141
 142         /* Connect irq/fiq outputs from the interrupt controller. */
 143         qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
 144                 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ));
 145         qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
 146                 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ));
 147
 148         /* Connect timers from the CPU to the interrupt controller */
 149         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS,
 150                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
 151         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT,
 152                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
 153         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP,
 154                 qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
 155         qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC,
 156                 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
 157     }
 158 }
 159
 160 static Property bcm2836_props[] = {
 161     DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
 162                        BCM283X_NCPUS),
 163     DEFINE_PROP_END_OF_LIST()
 164 };
 165
 166 static void bcm283x_class_init(ObjectClass *oc, void *data)
 167 {
 168     DeviceClass *dc = DEVICE_CLASS(oc);
 169     BCM283XClass *bc = BCM283X_CLASS(oc);
 170
 171     bc->info = data;
 172     dc->realize = bcm2836_realize;
 173     device_class_set_props(dc, bcm2836_props);
 174     /* Reason: Must be wired up in code (see raspi_init() function) */
 175     dc->user_creatable = false;
 176 }
 177
 178 static const TypeInfo bcm283x_type_info = {
 179     .name = TYPE_BCM283X,
 180     .parent = TYPE_DEVICE,
 181     .instance_size = sizeof(BCM283XState),
 182     .instance_init = bcm2836_init,
 183     .class_size = sizeof(BCM283XClass),
 184     .abstract = true,
 185 };
 186
 187 static void bcm2836_register_types(void)
 188 {
 189     int i;
 190
 191     type_register_static(&bcm283x_type_info);
 192     for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
 193         TypeInfo ti = {
 194             .name = bcm283x_socs[i].name,
 195             .parent = TYPE_BCM283X,
 196             .class_init = bcm283x_class_init,
 197             .class_data = (void *) &bcm283x_socs[i],
 198         };
 199         type_register(&ti);
 200     }
 201 }
 202
 203 type_init(bcm2836_register_types)