2 * SmartFusion2 SoC emulation.
4 * Copyright (c) 2017-2020 Subbaraya Sundeep <sundeep.lkml@gmail.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu/units.h"
27 #include "qapi/error.h"
28 #include "exec/address-spaces.h"
29 #include "hw/char/serial.h"
31 #include "hw/arm/msf2-soc.h"
32 #include "hw/misc/unimp.h"
33 #include "sysemu/runstate.h"
34 #include "sysemu/sysemu.h"
36 #define MSF2_TIMER_BASE 0x40004000
37 #define MSF2_SYSREG_BASE 0x40038000
38 #define MSF2_EMAC_BASE 0x40041000
40 #define ENVM_BASE_ADDRESS 0x60000000
42 #define SRAM_BASE_ADDRESS 0x20000000
44 #define MSF2_EMAC_IRQ 12
46 #define MSF2_ENVM_MAX_SIZE (512 * KiB)
49 * eSRAM max size is 80k without SECDED(Single error correction and
50 * dual error detection) feature and 64k with SECDED.
51 * We do not support SECDED now.
53 #define MSF2_ESRAM_MAX_SIZE (80 * KiB)
55 static const uint32_t spi_addr
[MSF2_NUM_SPIS
] = { 0x40001000 , 0x40011000 };
56 static const uint32_t uart_addr
[MSF2_NUM_UARTS
] = { 0x40000000 , 0x40010000 };
58 static const int spi_irq
[MSF2_NUM_SPIS
] = { 2, 3 };
59 static const int uart_irq
[MSF2_NUM_UARTS
] = { 10, 11 };
60 static const int timer_irq
[MSF2_NUM_TIMERS
] = { 14, 15 };
62 static void do_sys_reset(void *opaque
, int n
, int level
)
65 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET
);
69 static void m2sxxx_soc_initfn(Object
*obj
)
71 MSF2State
*s
= MSF2_SOC(obj
);
74 object_initialize_child(obj
, "armv7m", &s
->armv7m
, TYPE_ARMV7M
);
76 object_initialize_child(obj
, "sysreg", &s
->sysreg
, TYPE_MSF2_SYSREG
);
78 object_initialize_child(obj
, "timer", &s
->timer
, TYPE_MSS_TIMER
);
80 for (i
= 0; i
< MSF2_NUM_SPIS
; i
++) {
81 object_initialize_child(obj
, "spi[*]", &s
->spi
[i
], TYPE_MSS_SPI
);
84 object_initialize_child(obj
, "emac", &s
->emac
, TYPE_MSS_EMAC
);
85 if (nd_table
[0].used
) {
86 qemu_check_nic_model(&nd_table
[0], TYPE_MSS_EMAC
);
87 qdev_set_nic_properties(DEVICE(&s
->emac
), &nd_table
[0]);
91 static void m2sxxx_soc_realize(DeviceState
*dev_soc
, Error
**errp
)
93 MSF2State
*s
= MSF2_SOC(dev_soc
);
94 DeviceState
*dev
, *armv7m
;
99 MemoryRegion
*system_memory
= get_system_memory();
100 MemoryRegion
*nvm
= g_new(MemoryRegion
, 1);
101 MemoryRegion
*nvm_alias
= g_new(MemoryRegion
, 1);
102 MemoryRegion
*sram
= g_new(MemoryRegion
, 1);
104 memory_region_init_rom(nvm
, OBJECT(dev_soc
), "MSF2.eNVM", s
->envm_size
,
107 * On power-on, the eNVM region 0x60000000 is automatically
108 * remapped to the Cortex-M3 processor executable region
109 * start address (0x0). We do not support remapping other eNVM,
110 * eSRAM and DDR regions by guest(via Sysreg) currently.
112 memory_region_init_alias(nvm_alias
, OBJECT(dev_soc
), "MSF2.eNVM", nvm
, 0,
115 memory_region_add_subregion(system_memory
, ENVM_BASE_ADDRESS
, nvm
);
116 memory_region_add_subregion(system_memory
, 0, nvm_alias
);
118 memory_region_init_ram(sram
, NULL
, "MSF2.eSRAM", s
->esram_size
,
120 memory_region_add_subregion(system_memory
, SRAM_BASE_ADDRESS
, sram
);
122 armv7m
= DEVICE(&s
->armv7m
);
123 qdev_prop_set_uint32(armv7m
, "num-irq", 81);
124 qdev_prop_set_string(armv7m
, "cpu-type", s
->cpu_type
);
125 qdev_prop_set_bit(armv7m
, "enable-bitband", true);
126 object_property_set_link(OBJECT(&s
->armv7m
), OBJECT(get_system_memory()),
127 "memory", &error_abort
);
128 sysbus_realize(SYS_BUS_DEVICE(&s
->armv7m
), &err
);
130 error_propagate(errp
, err
);
135 error_setg(errp
, "Invalid m3clk value");
136 error_append_hint(errp
, "m3clk can not be zero\n");
140 qdev_connect_gpio_out_named(DEVICE(&s
->armv7m
.nvic
), "SYSRESETREQ", 0,
141 qemu_allocate_irq(&do_sys_reset
, NULL
, 0));
143 system_clock_scale
= NANOSECONDS_PER_SECOND
/ s
->m3clk
;
145 for (i
= 0; i
< MSF2_NUM_UARTS
; i
++) {
147 serial_mm_init(get_system_memory(), uart_addr
[i
], 2,
148 qdev_get_gpio_in(armv7m
, uart_irq
[i
]),
149 115200, serial_hd(i
), DEVICE_NATIVE_ENDIAN
);
153 dev
= DEVICE(&s
->timer
);
154 /* APB0 clock is the timer input clock */
155 qdev_prop_set_uint32(dev
, "clock-frequency", s
->m3clk
/ s
->apb0div
);
156 sysbus_realize(SYS_BUS_DEVICE(&s
->timer
), &err
);
158 error_propagate(errp
, err
);
161 busdev
= SYS_BUS_DEVICE(dev
);
162 sysbus_mmio_map(busdev
, 0, MSF2_TIMER_BASE
);
163 sysbus_connect_irq(busdev
, 0,
164 qdev_get_gpio_in(armv7m
, timer_irq
[0]));
165 sysbus_connect_irq(busdev
, 1,
166 qdev_get_gpio_in(armv7m
, timer_irq
[1]));
168 dev
= DEVICE(&s
->sysreg
);
169 qdev_prop_set_uint32(dev
, "apb0divisor", s
->apb0div
);
170 qdev_prop_set_uint32(dev
, "apb1divisor", s
->apb1div
);
171 sysbus_realize(SYS_BUS_DEVICE(&s
->sysreg
), &err
);
173 error_propagate(errp
, err
);
176 busdev
= SYS_BUS_DEVICE(dev
);
177 sysbus_mmio_map(busdev
, 0, MSF2_SYSREG_BASE
);
179 for (i
= 0; i
< MSF2_NUM_SPIS
; i
++) {
182 sysbus_realize(SYS_BUS_DEVICE(&s
->spi
[i
]), &err
);
184 error_propagate(errp
, err
);
188 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->spi
[i
]), 0, spi_addr
[i
]);
189 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->spi
[i
]), 0,
190 qdev_get_gpio_in(armv7m
, spi_irq
[i
]));
192 /* Alias controller SPI bus to the SoC itself */
193 bus_name
= g_strdup_printf("spi%d", i
);
194 object_property_add_alias(OBJECT(s
), bus_name
,
195 OBJECT(&s
->spi
[i
]), "spi");
199 dev
= DEVICE(&s
->emac
);
200 object_property_set_link(OBJECT(&s
->emac
), OBJECT(get_system_memory()),
201 "ahb-bus", &error_abort
);
202 sysbus_realize(SYS_BUS_DEVICE(&s
->emac
), &err
);
204 error_propagate(errp
, err
);
207 busdev
= SYS_BUS_DEVICE(dev
);
208 sysbus_mmio_map(busdev
, 0, MSF2_EMAC_BASE
);
209 sysbus_connect_irq(busdev
, 0,
210 qdev_get_gpio_in(armv7m
, MSF2_EMAC_IRQ
));
212 /* Below devices are not modelled yet. */
213 create_unimplemented_device("i2c_0", 0x40002000, 0x1000);
214 create_unimplemented_device("dma", 0x40003000, 0x1000);
215 create_unimplemented_device("watchdog", 0x40005000, 0x1000);
216 create_unimplemented_device("i2c_1", 0x40012000, 0x1000);
217 create_unimplemented_device("gpio", 0x40013000, 0x1000);
218 create_unimplemented_device("hs-dma", 0x40014000, 0x1000);
219 create_unimplemented_device("can", 0x40015000, 0x1000);
220 create_unimplemented_device("rtc", 0x40017000, 0x1000);
221 create_unimplemented_device("apb_config", 0x40020000, 0x10000);
222 create_unimplemented_device("usb", 0x40043000, 0x1000);
225 static Property m2sxxx_soc_properties
[] = {
227 * part name specifies the type of SmartFusion2 device variant(this
228 * property is for information purpose only.
230 DEFINE_PROP_STRING("cpu-type", MSF2State
, cpu_type
),
231 DEFINE_PROP_STRING("part-name", MSF2State
, part_name
),
232 DEFINE_PROP_UINT64("eNVM-size", MSF2State
, envm_size
, MSF2_ENVM_MAX_SIZE
),
233 DEFINE_PROP_UINT64("eSRAM-size", MSF2State
, esram_size
,
234 MSF2_ESRAM_MAX_SIZE
),
235 /* Libero GUI shows 100Mhz as default for clocks */
236 DEFINE_PROP_UINT32("m3clk", MSF2State
, m3clk
, 100 * 1000000),
237 /* default divisors in Libero GUI */
238 DEFINE_PROP_UINT8("apb0div", MSF2State
, apb0div
, 2),
239 DEFINE_PROP_UINT8("apb1div", MSF2State
, apb1div
, 2),
240 DEFINE_PROP_END_OF_LIST(),
243 static void m2sxxx_soc_class_init(ObjectClass
*klass
, void *data
)
245 DeviceClass
*dc
= DEVICE_CLASS(klass
);
247 dc
->realize
= m2sxxx_soc_realize
;
248 device_class_set_props(dc
, m2sxxx_soc_properties
);
251 static const TypeInfo m2sxxx_soc_info
= {
252 .name
= TYPE_MSF2_SOC
,
253 .parent
= TYPE_SYS_BUS_DEVICE
,
254 .instance_size
= sizeof(MSF2State
),
255 .instance_init
= m2sxxx_soc_initfn
,
256 .class_init
= m2sxxx_soc_class_init
,
259 static void m2sxxx_soc_types(void)
261 type_register_static(&m2sxxx_soc_info
);
264 type_init(m2sxxx_soc_types
)