vfio/pci: Split quirks to a separate file
[qemu/ar7.git] / hw / vfio / pci.h
blobff94929b45a44a81947b526b634b08f15dc4dd9d
1 /*
2 * vfio based device assignment support - PCI devices
4 * Copyright Red Hat, Inc. 2012-2015
6 * Authors:
7 * Alex Williamson <alex.williamson@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
12 #ifndef HW_VFIO_VFIO_PCI_H
13 #define HW_VFIO_VFIO_PCI_H
15 #include "qemu-common.h"
16 #include "exec/memory.h"
17 #include "hw/pci/pci.h"
18 #include "hw/vfio/vfio-common.h"
19 #include "qemu/event_notifier.h"
20 #include "qemu/queue.h"
21 #include "qemu/timer.h"
23 struct VFIOPCIDevice;
25 typedef struct VFIOQuirk {
26 MemoryRegion mem;
27 struct VFIOPCIDevice *vdev;
28 QLIST_ENTRY(VFIOQuirk) next;
29 struct {
30 uint32_t base_offset:TARGET_PAGE_BITS;
31 uint32_t address_offset:TARGET_PAGE_BITS;
32 uint32_t address_size:3;
33 uint32_t bar:3;
35 uint32_t address_match;
36 uint32_t address_mask;
38 uint32_t address_val:TARGET_PAGE_BITS;
39 uint32_t data_offset:TARGET_PAGE_BITS;
40 uint32_t data_size:3;
42 uint8_t flags;
43 uint8_t read_flags;
44 uint8_t write_flags;
45 } data;
46 } VFIOQuirk;
48 typedef struct VFIOBAR {
49 VFIORegion region;
50 bool ioport;
51 bool mem64;
52 QLIST_HEAD(, VFIOQuirk) quirks;
53 } VFIOBAR;
55 typedef struct VFIOVGARegion {
56 MemoryRegion mem;
57 off_t offset;
58 int nr;
59 QLIST_HEAD(, VFIOQuirk) quirks;
60 } VFIOVGARegion;
62 typedef struct VFIOVGA {
63 off_t fd_offset;
64 int fd;
65 VFIOVGARegion region[QEMU_PCI_VGA_NUM_REGIONS];
66 } VFIOVGA;
68 typedef struct VFIOINTx {
69 bool pending; /* interrupt pending */
70 bool kvm_accel; /* set when QEMU bypass through KVM enabled */
71 uint8_t pin; /* which pin to pull for qemu_set_irq */
72 EventNotifier interrupt; /* eventfd triggered on interrupt */
73 EventNotifier unmask; /* eventfd for unmask on QEMU bypass */
74 PCIINTxRoute route; /* routing info for QEMU bypass */
75 uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */
76 QEMUTimer *mmap_timer; /* enable mmaps after periods w/o interrupts */
77 } VFIOINTx;
79 typedef struct VFIOMSIVector {
81 * Two interrupt paths are configured per vector. The first, is only used
82 * for interrupts injected via QEMU. This is typically the non-accel path,
83 * but may also be used when we want QEMU to handle masking and pending
84 * bits. The KVM path bypasses QEMU and is therefore higher performance,
85 * but requires masking at the device. virq is used to track the MSI route
86 * through KVM, thus kvm_interrupt is only available when virq is set to a
87 * valid (>= 0) value.
89 EventNotifier interrupt;
90 EventNotifier kvm_interrupt;
91 struct VFIOPCIDevice *vdev; /* back pointer to device */
92 int virq;
93 bool use;
94 } VFIOMSIVector;
96 enum {
97 VFIO_INT_NONE = 0,
98 VFIO_INT_INTx = 1,
99 VFIO_INT_MSI = 2,
100 VFIO_INT_MSIX = 3,
103 /* Cache of MSI-X setup plus extra mmap and memory region for split BAR map */
104 typedef struct VFIOMSIXInfo {
105 uint8_t table_bar;
106 uint8_t pba_bar;
107 uint16_t entries;
108 uint32_t table_offset;
109 uint32_t pba_offset;
110 MemoryRegion mmap_mem;
111 void *mmap;
112 } VFIOMSIXInfo;
114 typedef struct VFIOPCIDevice {
115 PCIDevice pdev;
116 VFIODevice vbasedev;
117 VFIOINTx intx;
118 unsigned int config_size;
119 uint8_t *emulated_config_bits; /* QEMU emulated bits, little-endian */
120 off_t config_offset; /* Offset of config space region within device fd */
121 unsigned int rom_size;
122 off_t rom_offset; /* Offset of ROM region within device fd */
123 void *rom;
124 int msi_cap_size;
125 VFIOMSIVector *msi_vectors;
126 VFIOMSIXInfo *msix;
127 int nr_vectors; /* Number of MSI/MSIX vectors currently in use */
128 int interrupt; /* Current interrupt type */
129 VFIOBAR bars[PCI_NUM_REGIONS - 1]; /* No ROM */
130 VFIOVGA vga; /* 0xa0000, 0x3b0, 0x3c0 */
131 PCIHostDeviceAddress host;
132 EventNotifier err_notifier;
133 EventNotifier req_notifier;
134 int (*resetfn)(struct VFIOPCIDevice *);
135 uint32_t features;
136 #define VFIO_FEATURE_ENABLE_VGA_BIT 0
137 #define VFIO_FEATURE_ENABLE_VGA (1 << VFIO_FEATURE_ENABLE_VGA_BIT)
138 #define VFIO_FEATURE_ENABLE_REQ_BIT 1
139 #define VFIO_FEATURE_ENABLE_REQ (1 << VFIO_FEATURE_ENABLE_REQ_BIT)
140 int32_t bootindex;
141 uint8_t pm_cap;
142 bool has_vga;
143 bool pci_aer;
144 bool req_enabled;
145 bool has_flr;
146 bool has_pm_reset;
147 bool rom_read_failed;
148 bool no_kvm_intx;
149 bool no_kvm_msi;
150 bool no_kvm_msix;
151 } VFIOPCIDevice;
153 typedef struct VFIORomBlacklistEntry {
154 uint16_t vendor_id;
155 uint16_t device_id;
156 } VFIORomBlacklistEntry;
158 uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);
159 void vfio_pci_write_config(PCIDevice *pdev,
160 uint32_t addr, uint32_t val, int len);
162 uint64_t vfio_vga_read(void *opaque, hwaddr addr, unsigned size);
163 void vfio_vga_write(void *opaque, hwaddr addr, uint64_t data, unsigned size);
165 bool vfio_blacklist_opt_rom(VFIOPCIDevice *vdev);
166 void vfio_vga_quirk_setup(VFIOPCIDevice *vdev);
167 void vfio_vga_quirk_teardown(VFIOPCIDevice *vdev);
168 void vfio_vga_quirk_free(VFIOPCIDevice *vdev);
169 void vfio_bar_quirk_setup(VFIOPCIDevice *vdev, int nr);
170 void vfio_bar_quirk_teardown(VFIOPCIDevice *vdev, int nr);
171 void vfio_bar_quirk_free(VFIOPCIDevice *vdev, int nr);
173 #endif /* HW_VFIO_VFIO_PCI_H */