hw/vfio/pci.h

   1 /*
   2  * vfio based device assignment support - PCI devices
   3  *
   4  * Copyright Red Hat, Inc. 2012-2015
   5  *
   6  * Authors:
   7  *  Alex Williamson <alex.williamson@redhat.com>
   8  *
   9  * This work is licensed under the terms of the GNU GPL, version 2.  See
  10  * the COPYING file in the top-level directory.
  11  */
  12 #ifndef HW_VFIO_VFIO_PCI_H
  13 #define HW_VFIO_VFIO_PCI_H
  14
  15 #include "exec/memory.h"
  16 #include "hw/pci/pci_device.h"
  17 #include "hw/vfio/vfio-common.h"
  18 #include "qemu/event_notifier.h"
  19 #include "qemu/queue.h"
  20 #include "qemu/timer.h"
  21 #include "qom/object.h"
  22 #include "sysemu/kvm.h"
  23
  24 #define PCI_ANY_ID (~0)
  25
  26 struct VFIOPCIDevice;
  27
  28 typedef struct VFIOIOEventFD {
  29     QLIST_ENTRY(VFIOIOEventFD) next;
  30     MemoryRegion *mr;
  31     hwaddr addr;
  32     unsigned size;
  33     uint64_t data;
  34     EventNotifier e;
  35     VFIORegion *region;
  36     hwaddr region_addr;
  37     bool dynamic; /* Added runtime, removed on device reset */
  38     bool vfio;
  39 } VFIOIOEventFD;
  40
  41 typedef struct VFIOQuirk {
  42     QLIST_ENTRY(VFIOQuirk) next;
  43     void *data;
  44     QLIST_HEAD(, VFIOIOEventFD) ioeventfds;
  45     int nr_mem;
  46     MemoryRegion *mem;
  47     void (*reset)(struct VFIOPCIDevice *vdev, struct VFIOQuirk *quirk);
  48 } VFIOQuirk;
  49
  50 typedef struct VFIOBAR {
  51     VFIORegion region;
  52     MemoryRegion *mr;
  53     size_t size;
  54     uint8_t type;
  55     bool ioport;
  56     bool mem64;
  57     QLIST_HEAD(, VFIOQuirk) quirks;
  58 } VFIOBAR;
  59
  60 typedef struct VFIOVGARegion {
  61     MemoryRegion mem;
  62     off_t offset;
  63     int nr;
  64     QLIST_HEAD(, VFIOQuirk) quirks;
  65 } VFIOVGARegion;
  66
  67 typedef struct VFIOVGA {
  68     off_t fd_offset;
  69     int fd;
  70     VFIOVGARegion region[QEMU_PCI_VGA_NUM_REGIONS];
  71 } VFIOVGA;
  72
  73 typedef struct VFIOINTx {
  74     bool pending; /* interrupt pending */
  75     bool kvm_accel; /* set when QEMU bypass through KVM enabled */
  76     uint8_t pin; /* which pin to pull for qemu_set_irq */
  77     EventNotifier interrupt; /* eventfd triggered on interrupt */
  78     EventNotifier unmask; /* eventfd for unmask on QEMU bypass */
  79     PCIINTxRoute route; /* routing info for QEMU bypass */
  80     uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */
  81     QEMUTimer *mmap_timer; /* enable mmaps after periods w/o interrupts */
  82 } VFIOINTx;
  83
  84 typedef struct VFIOMSIVector {
  85     /*
  86      * Two interrupt paths are configured per vector.  The first, is only used
  87      * for interrupts injected via QEMU.  This is typically the non-accel path,
  88      * but may also be used when we want QEMU to handle masking and pending
  89      * bits.  The KVM path bypasses QEMU and is therefore higher performance,
  90      * but requires masking at the device.  virq is used to track the MSI route
  91      * through KVM, thus kvm_interrupt is only available when virq is set to a
  92      * valid (>= 0) value.
  93      */
  94     EventNotifier interrupt;
  95     EventNotifier kvm_interrupt;
  96     struct VFIOPCIDevice *vdev; /* back pointer to device */
  97     int virq;
  98     bool use;
  99 } VFIOMSIVector;
 100
 101 enum {
 102     VFIO_INT_NONE = 0,
 103     VFIO_INT_INTx = 1,
 104     VFIO_INT_MSI  = 2,
 105     VFIO_INT_MSIX = 3,
 106 };
 107
 108 /* Cache of MSI-X setup */
 109 typedef struct VFIOMSIXInfo {
 110     uint8_t table_bar;
 111     uint8_t pba_bar;
 112     uint16_t entries;
 113     uint32_t table_offset;
 114     uint32_t pba_offset;
 115     unsigned long *pending;
 116     bool noresize;
 117 } VFIOMSIXInfo;
 118
 119 #define TYPE_VFIO_PCI "vfio-pci"
 120 OBJECT_DECLARE_SIMPLE_TYPE(VFIOPCIDevice, VFIO_PCI)
 121
 122 struct VFIOPCIDevice {
 123     PCIDevice pdev;
 124     VFIODevice vbasedev;
 125     VFIOINTx intx;
 126     unsigned int config_size;
 127     uint8_t *emulated_config_bits; /* QEMU emulated bits, little-endian */
 128     off_t config_offset; /* Offset of config space region within device fd */
 129     unsigned int rom_size;
 130     off_t rom_offset; /* Offset of ROM region within device fd */
 131     void *rom;
 132     int msi_cap_size;
 133     VFIOMSIVector *msi_vectors;
 134     VFIOMSIXInfo *msix;
 135     int nr_vectors; /* Number of MSI/MSIX vectors currently in use */
 136     int interrupt; /* Current interrupt type */
 137     VFIOBAR bars[PCI_NUM_REGIONS - 1]; /* No ROM */
 138     VFIOVGA *vga; /* 0xa0000, 0x3b0, 0x3c0 */
 139     void *igd_opregion;
 140     PCIHostDeviceAddress host;
 141     QemuUUID vf_token;
 142     EventNotifier err_notifier;
 143     EventNotifier req_notifier;
 144     int (*resetfn)(struct VFIOPCIDevice *);
 145     uint32_t vendor_id;
 146     uint32_t device_id;
 147     uint32_t sub_vendor_id;
 148     uint32_t sub_device_id;
 149     uint32_t features;
 150 #define VFIO_FEATURE_ENABLE_VGA_BIT 0
 151 #define VFIO_FEATURE_ENABLE_VGA (1 << VFIO_FEATURE_ENABLE_VGA_BIT)
 152 #define VFIO_FEATURE_ENABLE_REQ_BIT 1
 153 #define VFIO_FEATURE_ENABLE_REQ (1 << VFIO_FEATURE_ENABLE_REQ_BIT)
 154 #define VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT 2
 155 #define VFIO_FEATURE_ENABLE_IGD_OPREGION \
 156                                 (1 << VFIO_FEATURE_ENABLE_IGD_OPREGION_BIT)
 157     OnOffAuto display;
 158     uint32_t display_xres;
 159     uint32_t display_yres;
 160     int32_t bootindex;
 161     uint32_t igd_gms;
 162     OffAutoPCIBAR msix_relo;
 163     uint8_t pm_cap;
 164     uint8_t nv_gpudirect_clique;
 165     bool pci_aer;
 166     bool req_enabled;
 167     bool has_flr;
 168     bool has_pm_reset;
 169     bool rom_read_failed;
 170     bool no_kvm_intx;
 171     bool no_kvm_msi;
 172     bool no_kvm_msix;
 173     bool no_geforce_quirks;
 174     bool no_kvm_ioeventfd;
 175     bool no_vfio_ioeventfd;
 176     bool enable_ramfb;
 177     OnOffAuto ramfb_migrate;
 178     bool defer_kvm_irq_routing;
 179     bool clear_parent_atomics_on_exit;
 180     VFIODisplay *dpy;
 181     Notifier irqchip_change_notifier;
 182 };
 183
 184 /* Use uin32_t for vendor & device so PCI_ANY_ID expands and cannot match hw */
 185 static inline bool vfio_pci_is(VFIOPCIDevice *vdev, uint32_t vendor, uint32_t device)
 186 {
 187     return (vendor == PCI_ANY_ID || vendor == vdev->vendor_id) &&
 188            (device == PCI_ANY_ID || device == vdev->device_id);
 189 }
 190
 191 static inline bool vfio_is_vga(VFIOPCIDevice *vdev)
 192 {
 193     PCIDevice *pdev = &vdev->pdev;
 194     uint16_t class = pci_get_word(pdev->config + PCI_CLASS_DEVICE);
 195
 196     return class == PCI_CLASS_DISPLAY_VGA;
 197 }
 198
 199 uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);
 200 void vfio_pci_write_config(PCIDevice *pdev,
 201                            uint32_t addr, uint32_t val, int len);
 202
 203 uint64_t vfio_vga_read(void *opaque, hwaddr addr, unsigned size);
 204 void vfio_vga_write(void *opaque, hwaddr addr, uint64_t data, unsigned size);
 205
 206 bool vfio_opt_rom_in_denylist(VFIOPCIDevice *vdev);
 207 void vfio_vga_quirk_setup(VFIOPCIDevice *vdev);
 208 void vfio_vga_quirk_exit(VFIOPCIDevice *vdev);
 209 void vfio_vga_quirk_finalize(VFIOPCIDevice *vdev);
 210 void vfio_bar_quirk_setup(VFIOPCIDevice *vdev, int nr);
 211 void vfio_bar_quirk_exit(VFIOPCIDevice *vdev, int nr);
 212 void vfio_bar_quirk_finalize(VFIOPCIDevice *vdev, int nr);
 213 void vfio_setup_resetfn_quirk(VFIOPCIDevice *vdev);
 214 int vfio_add_virt_caps(VFIOPCIDevice *vdev, Error **errp);
 215 void vfio_quirk_reset(VFIOPCIDevice *vdev);
 216 VFIOQuirk *vfio_quirk_alloc(int nr_mem);
 217 void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr);
 218
 219 extern const PropertyInfo qdev_prop_nv_gpudirect_clique;
 220
 221 void vfio_pci_pre_reset(VFIOPCIDevice *vdev);
 222 void vfio_pci_post_reset(VFIOPCIDevice *vdev);
 223 bool vfio_pci_host_match(PCIHostDeviceAddress *addr, const char *name);
 224 int vfio_pci_get_pci_hot_reset_info(VFIOPCIDevice *vdev,
 225                                     struct vfio_pci_hot_reset_info **info_p);
 226
 227 int vfio_populate_vga(VFIOPCIDevice *vdev, Error **errp);
 228
 229 int vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev,
 230                                struct vfio_region_info *info,
 231                                Error **errp);
 232
 233 void vfio_display_reset(VFIOPCIDevice *vdev);
 234 int vfio_display_probe(VFIOPCIDevice *vdev, Error **errp);
 235 void vfio_display_finalize(VFIOPCIDevice *vdev);
 236
 237 extern const VMStateDescription vfio_display_vmstate;
 238
 239 #endif /* HW_VFIO_VFIO_PCI_H */