arm/stm32f205 arm/stm32f405: Fix realize error API violation
[qemu/ar7.git] / hw / ppc / spapr_caps.c
blob0c2bc8e06e440d08a0bd8cc15736cc00ca3d9e1c
1 /*
2 * QEMU PowerPC pSeries Logical Partition capabilities handling
4 * Copyright (c) 2017 David Gibson, Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include "qemu/osdep.h"
26 #include "qemu/error-report.h"
27 #include "qapi/error.h"
28 #include "qapi/visitor.h"
29 #include "sysemu/hw_accel.h"
30 #include "exec/ram_addr.h"
31 #include "target/ppc/cpu.h"
32 #include "target/ppc/mmu-hash64.h"
33 #include "cpu-models.h"
34 #include "kvm_ppc.h"
35 #include "migration/vmstate.h"
36 #include "sysemu/qtest.h"
37 #include "sysemu/tcg.h"
39 #include "hw/ppc/spapr.h"
41 typedef struct SpaprCapPossible {
42 int num; /* size of vals array below */
43 const char *help; /* help text for vals */
45 * Note:
46 * - because of the way compatibility is determined vals MUST be ordered
47 * such that later options are a superset of all preceding options.
48 * - the order of vals must be preserved, that is their index is important,
49 * however vals may be added to the end of the list so long as the above
50 * point is observed
52 const char *vals[];
53 } SpaprCapPossible;
55 typedef struct SpaprCapabilityInfo {
56 const char *name;
57 const char *description;
58 int index;
60 /* Getter and Setter Function Pointers */
61 ObjectPropertyAccessor *get;
62 ObjectPropertyAccessor *set;
63 const char *type;
64 /* Possible values if this is a custom string type */
65 SpaprCapPossible *possible;
66 /* Make sure the virtual hardware can support this capability */
67 void (*apply)(SpaprMachineState *spapr, uint8_t val, Error **errp);
68 void (*cpu_apply)(SpaprMachineState *spapr, PowerPCCPU *cpu,
69 uint8_t val, Error **errp);
70 bool (*migrate_needed)(void *opaque);
71 } SpaprCapabilityInfo;
73 static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name,
74 void *opaque, Error **errp)
76 SpaprCapabilityInfo *cap = opaque;
77 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
78 bool value = spapr_get_cap(spapr, cap->index) == SPAPR_CAP_ON;
80 visit_type_bool(v, name, &value, errp);
83 static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name,
84 void *opaque, Error **errp)
86 SpaprCapabilityInfo *cap = opaque;
87 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
88 bool value;
89 Error *local_err = NULL;
91 visit_type_bool(v, name, &value, &local_err);
92 if (local_err) {
93 error_propagate(errp, local_err);
94 return;
97 spapr->cmd_line_caps[cap->index] = true;
98 spapr->eff.caps[cap->index] = value ? SPAPR_CAP_ON : SPAPR_CAP_OFF;
102 static void spapr_cap_get_string(Object *obj, Visitor *v, const char *name,
103 void *opaque, Error **errp)
105 SpaprCapabilityInfo *cap = opaque;
106 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
107 char *val = NULL;
108 uint8_t value = spapr_get_cap(spapr, cap->index);
110 if (value >= cap->possible->num) {
111 error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name);
112 return;
115 val = g_strdup(cap->possible->vals[value]);
117 visit_type_str(v, name, &val, errp);
118 g_free(val);
121 static void spapr_cap_set_string(Object *obj, Visitor *v, const char *name,
122 void *opaque, Error **errp)
124 SpaprCapabilityInfo *cap = opaque;
125 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
126 Error *local_err = NULL;
127 uint8_t i;
128 char *val;
130 visit_type_str(v, name, &val, &local_err);
131 if (local_err) {
132 error_propagate(errp, local_err);
133 return;
136 if (!strcmp(val, "?")) {
137 error_setg(errp, "%s", cap->possible->help);
138 goto out;
140 for (i = 0; i < cap->possible->num; i++) {
141 if (!strcasecmp(val, cap->possible->vals[i])) {
142 spapr->cmd_line_caps[cap->index] = true;
143 spapr->eff.caps[cap->index] = i;
144 goto out;
148 error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val,
149 cap->name);
150 out:
151 g_free(val);
154 static void spapr_cap_get_pagesize(Object *obj, Visitor *v, const char *name,
155 void *opaque, Error **errp)
157 SpaprCapabilityInfo *cap = opaque;
158 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
159 uint8_t val = spapr_get_cap(spapr, cap->index);
160 uint64_t pagesize = (1ULL << val);
162 visit_type_size(v, name, &pagesize, errp);
165 static void spapr_cap_set_pagesize(Object *obj, Visitor *v, const char *name,
166 void *opaque, Error **errp)
168 SpaprCapabilityInfo *cap = opaque;
169 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
170 uint64_t pagesize;
171 uint8_t val;
172 Error *local_err = NULL;
174 visit_type_size(v, name, &pagesize, &local_err);
175 if (local_err) {
176 error_propagate(errp, local_err);
177 return;
180 if (!is_power_of_2(pagesize)) {
181 error_setg(errp, "cap-%s must be a power of 2", cap->name);
182 return;
185 val = ctz64(pagesize);
186 spapr->cmd_line_caps[cap->index] = true;
187 spapr->eff.caps[cap->index] = val;
190 static void cap_htm_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
192 if (!val) {
193 /* TODO: We don't support disabling htm yet */
194 return;
196 if (tcg_enabled()) {
197 error_setg(errp,
198 "No Transactional Memory support in TCG,"
199 " try appending -machine cap-htm=off");
200 } else if (kvm_enabled() && !kvmppc_has_cap_htm()) {
201 error_setg(errp,
202 "KVM implementation does not support Transactional Memory,"
203 " try appending -machine cap-htm=off"
208 static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
210 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
211 CPUPPCState *env = &cpu->env;
213 if (!val) {
214 /* TODO: We don't support disabling vsx yet */
215 return;
217 /* Allowable CPUs in spapr_cpu_core.c should already have gotten
218 * rid of anything that doesn't do VMX */
219 g_assert(env->insns_flags & PPC_ALTIVEC);
220 if (!(env->insns_flags2 & PPC2_VSX)) {
221 error_setg(errp, "VSX support not available,"
222 " try appending -machine cap-vsx=off");
226 static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
228 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
229 CPUPPCState *env = &cpu->env;
231 if (!val) {
232 /* TODO: We don't support disabling dfp yet */
233 return;
235 if (!(env->insns_flags2 & PPC2_DFP)) {
236 error_setg(errp, "DFP support not available,"
237 " try appending -machine cap-dfp=off");
241 SpaprCapPossible cap_cfpc_possible = {
242 .num = 3,
243 .vals = {"broken", "workaround", "fixed"},
244 .help = "broken - no protection, workaround - workaround available,"
245 " fixed - fixed in hardware",
248 static void cap_safe_cache_apply(SpaprMachineState *spapr, uint8_t val,
249 Error **errp)
251 uint8_t kvm_val = kvmppc_get_cap_safe_cache();
253 if (tcg_enabled() && val) {
254 /* TCG only supports broken, allow other values and print a warning */
255 warn_report("TCG doesn't support requested feature, cap-cfpc=%s",
256 cap_cfpc_possible.vals[val]);
257 } else if (kvm_enabled() && (val > kvm_val)) {
258 error_setg(errp,
259 "Requested safe cache capability level not supported by kvm,"
260 " try appending -machine cap-cfpc=%s",
261 cap_cfpc_possible.vals[kvm_val]);
265 SpaprCapPossible cap_sbbc_possible = {
266 .num = 3,
267 .vals = {"broken", "workaround", "fixed"},
268 .help = "broken - no protection, workaround - workaround available,"
269 " fixed - fixed in hardware",
272 static void cap_safe_bounds_check_apply(SpaprMachineState *spapr, uint8_t val,
273 Error **errp)
275 uint8_t kvm_val = kvmppc_get_cap_safe_bounds_check();
277 if (tcg_enabled() && val) {
278 /* TCG only supports broken, allow other values and print a warning */
279 warn_report("TCG doesn't support requested feature, cap-sbbc=%s",
280 cap_sbbc_possible.vals[val]);
281 } else if (kvm_enabled() && (val > kvm_val)) {
282 error_setg(errp,
283 "Requested safe bounds check capability level not supported by kvm,"
284 " try appending -machine cap-sbbc=%s",
285 cap_sbbc_possible.vals[kvm_val]);
289 SpaprCapPossible cap_ibs_possible = {
290 .num = 5,
291 /* Note workaround only maintained for compatibility */
292 .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"},
293 .help = "broken - no protection, workaround - count cache flush"
294 ", fixed-ibs - indirect branch serialisation,"
295 " fixed-ccd - cache count disabled,"
296 " fixed-na - fixed in hardware (no longer applicable)",
299 static void cap_safe_indirect_branch_apply(SpaprMachineState *spapr,
300 uint8_t val, Error **errp)
302 uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch();
304 if (tcg_enabled() && val) {
305 /* TCG only supports broken, allow other values and print a warning */
306 warn_report("TCG doesn't support requested feature, cap-ibs=%s",
307 cap_ibs_possible.vals[val]);
308 } else if (kvm_enabled() && (val > kvm_val)) {
309 error_setg(errp,
310 "Requested safe indirect branch capability level not supported by kvm,"
311 " try appending -machine cap-ibs=%s",
312 cap_ibs_possible.vals[kvm_val]);
316 #define VALUE_DESC_TRISTATE " (broken, workaround, fixed)"
318 void spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize,
319 Error **errp)
321 hwaddr maxpagesize = (1ULL << spapr->eff.caps[SPAPR_CAP_HPT_MAXPAGESIZE]);
323 if (!kvmppc_hpt_needs_host_contiguous_pages()) {
324 return;
327 if (maxpagesize > pagesize) {
328 error_setg(errp,
329 "Can't support %"HWADDR_PRIu" kiB guest pages with %"
330 HWADDR_PRIu" kiB host pages with this KVM implementation",
331 maxpagesize >> 10, pagesize >> 10);
335 static void cap_hpt_maxpagesize_apply(SpaprMachineState *spapr,
336 uint8_t val, Error **errp)
338 if (val < 12) {
339 error_setg(errp, "Require at least 4kiB hpt-max-page-size");
340 return;
341 } else if (val < 16) {
342 warn_report("Many guests require at least 64kiB hpt-max-page-size");
345 spapr_check_pagesize(spapr, qemu_minrampagesize(), errp);
348 static bool cap_hpt_maxpagesize_migrate_needed(void *opaque)
350 return !SPAPR_MACHINE_GET_CLASS(opaque)->pre_4_1_migration;
353 static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift,
354 uint32_t pshift)
356 unsigned maxshift = *((unsigned *)opaque);
358 assert(pshift >= seg_pshift);
360 /* Don't allow the guest to use pages bigger than the configured
361 * maximum size */
362 if (pshift > maxshift) {
363 return false;
366 /* For whatever reason, KVM doesn't allow multiple pagesizes
367 * within a segment, *except* for the case of 16M pages in a 4k or
368 * 64k segment. Always exclude other cases, so that TCG and KVM
369 * guests see a consistent environment */
370 if ((pshift != seg_pshift) && (pshift != 24)) {
371 return false;
374 return true;
377 static void cap_hpt_maxpagesize_cpu_apply(SpaprMachineState *spapr,
378 PowerPCCPU *cpu,
379 uint8_t val, Error **errp)
381 unsigned maxshift = val;
383 ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift);
386 static void cap_nested_kvm_hv_apply(SpaprMachineState *spapr,
387 uint8_t val, Error **errp)
389 if (!val) {
390 /* capability disabled by default */
391 return;
394 if (tcg_enabled()) {
395 error_setg(errp,
396 "No Nested KVM-HV support in tcg,"
397 " try appending -machine cap-nested-hv=off");
398 } else if (kvm_enabled()) {
399 if (!kvmppc_has_cap_nested_kvm_hv()) {
400 error_setg(errp,
401 "KVM implementation does not support Nested KVM-HV,"
402 " try appending -machine cap-nested-hv=off");
403 } else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) {
404 error_setg(errp,
405 "Error enabling cap-nested-hv with KVM, try cap-nested-hv=off");
410 static void cap_large_decr_apply(SpaprMachineState *spapr,
411 uint8_t val, Error **errp)
413 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
414 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
416 if (!val) {
417 return; /* Disabled by default */
420 if (tcg_enabled()) {
421 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0,
422 spapr->max_compat_pvr)) {
423 error_setg(errp,
424 "Large decrementer only supported on POWER9, try -cpu POWER9");
425 return;
427 } else if (kvm_enabled()) {
428 int kvm_nr_bits = kvmppc_get_cap_large_decr();
430 if (!kvm_nr_bits) {
431 error_setg(errp,
432 "No large decrementer support,"
433 " try appending -machine cap-large-decr=off");
434 } else if (pcc->lrg_decr_bits != kvm_nr_bits) {
435 error_setg(errp,
436 "KVM large decrementer size (%d) differs to model (%d),"
437 " try appending -machine cap-large-decr=off",
438 kvm_nr_bits, pcc->lrg_decr_bits);
443 static void cap_large_decr_cpu_apply(SpaprMachineState *spapr,
444 PowerPCCPU *cpu,
445 uint8_t val, Error **errp)
447 CPUPPCState *env = &cpu->env;
448 target_ulong lpcr = env->spr[SPR_LPCR];
450 if (kvm_enabled()) {
451 if (kvmppc_enable_cap_large_decr(cpu, val)) {
452 error_setg(errp,
453 "No large decrementer support,"
454 " try appending -machine cap-large-decr=off");
458 if (val) {
459 lpcr |= LPCR_LD;
460 } else {
461 lpcr &= ~LPCR_LD;
463 ppc_store_lpcr(cpu, lpcr);
466 static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val,
467 Error **errp)
469 uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist();
471 if (tcg_enabled() && val) {
472 /* TCG doesn't implement anything here, but allow with a warning */
473 warn_report("TCG doesn't support requested feature, cap-ccf-assist=on");
474 } else if (kvm_enabled() && (val > kvm_val)) {
475 uint8_t kvm_ibs = kvmppc_get_cap_safe_indirect_branch();
477 if (kvm_ibs == SPAPR_CAP_FIXED_CCD) {
479 * If we don't have CCF assist on the host, the assist
480 * instruction is a harmless no-op. It won't correctly
481 * implement the cache count flush *but* if we have
482 * count-cache-disabled in the host, that flush is
483 * unnnecessary. So, specifically allow this case. This
484 * allows us to have better performance on POWER9 DD2.3,
485 * while still working on POWER9 DD2.2 and POWER8 host
486 * cpus.
488 return;
490 error_setg(errp,
491 "Requested count cache flush assist capability level not supported by kvm,"
492 " try appending -machine cap-ccf-assist=off");
496 static void cap_fwnmi_apply(SpaprMachineState *spapr, uint8_t val,
497 Error **errp)
499 if (!val) {
500 return; /* Disabled by default */
503 if (kvm_enabled()) {
504 if (!kvmppc_get_fwnmi()) {
505 error_setg(errp,
506 "Firmware Assisted Non-Maskable Interrupts(FWNMI) not supported by KVM.");
507 error_append_hint(errp, "Try appending -machine cap-fwnmi=off\n");
512 SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
513 [SPAPR_CAP_HTM] = {
514 .name = "htm",
515 .description = "Allow Hardware Transactional Memory (HTM)",
516 .index = SPAPR_CAP_HTM,
517 .get = spapr_cap_get_bool,
518 .set = spapr_cap_set_bool,
519 .type = "bool",
520 .apply = cap_htm_apply,
522 [SPAPR_CAP_VSX] = {
523 .name = "vsx",
524 .description = "Allow Vector Scalar Extensions (VSX)",
525 .index = SPAPR_CAP_VSX,
526 .get = spapr_cap_get_bool,
527 .set = spapr_cap_set_bool,
528 .type = "bool",
529 .apply = cap_vsx_apply,
531 [SPAPR_CAP_DFP] = {
532 .name = "dfp",
533 .description = "Allow Decimal Floating Point (DFP)",
534 .index = SPAPR_CAP_DFP,
535 .get = spapr_cap_get_bool,
536 .set = spapr_cap_set_bool,
537 .type = "bool",
538 .apply = cap_dfp_apply,
540 [SPAPR_CAP_CFPC] = {
541 .name = "cfpc",
542 .description = "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE,
543 .index = SPAPR_CAP_CFPC,
544 .get = spapr_cap_get_string,
545 .set = spapr_cap_set_string,
546 .type = "string",
547 .possible = &cap_cfpc_possible,
548 .apply = cap_safe_cache_apply,
550 [SPAPR_CAP_SBBC] = {
551 .name = "sbbc",
552 .description = "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE,
553 .index = SPAPR_CAP_SBBC,
554 .get = spapr_cap_get_string,
555 .set = spapr_cap_set_string,
556 .type = "string",
557 .possible = &cap_sbbc_possible,
558 .apply = cap_safe_bounds_check_apply,
560 [SPAPR_CAP_IBS] = {
561 .name = "ibs",
562 .description =
563 "Indirect Branch Speculation (broken, workaround, fixed-ibs,"
564 "fixed-ccd, fixed-na)",
565 .index = SPAPR_CAP_IBS,
566 .get = spapr_cap_get_string,
567 .set = spapr_cap_set_string,
568 .type = "string",
569 .possible = &cap_ibs_possible,
570 .apply = cap_safe_indirect_branch_apply,
572 [SPAPR_CAP_HPT_MAXPAGESIZE] = {
573 .name = "hpt-max-page-size",
574 .description = "Maximum page size for Hash Page Table guests",
575 .index = SPAPR_CAP_HPT_MAXPAGESIZE,
576 .get = spapr_cap_get_pagesize,
577 .set = spapr_cap_set_pagesize,
578 .type = "int",
579 .apply = cap_hpt_maxpagesize_apply,
580 .cpu_apply = cap_hpt_maxpagesize_cpu_apply,
581 .migrate_needed = cap_hpt_maxpagesize_migrate_needed,
583 [SPAPR_CAP_NESTED_KVM_HV] = {
584 .name = "nested-hv",
585 .description = "Allow Nested KVM-HV",
586 .index = SPAPR_CAP_NESTED_KVM_HV,
587 .get = spapr_cap_get_bool,
588 .set = spapr_cap_set_bool,
589 .type = "bool",
590 .apply = cap_nested_kvm_hv_apply,
592 [SPAPR_CAP_LARGE_DECREMENTER] = {
593 .name = "large-decr",
594 .description = "Allow Large Decrementer",
595 .index = SPAPR_CAP_LARGE_DECREMENTER,
596 .get = spapr_cap_get_bool,
597 .set = spapr_cap_set_bool,
598 .type = "bool",
599 .apply = cap_large_decr_apply,
600 .cpu_apply = cap_large_decr_cpu_apply,
602 [SPAPR_CAP_CCF_ASSIST] = {
603 .name = "ccf-assist",
604 .description = "Count Cache Flush Assist via HW Instruction",
605 .index = SPAPR_CAP_CCF_ASSIST,
606 .get = spapr_cap_get_bool,
607 .set = spapr_cap_set_bool,
608 .type = "bool",
609 .apply = cap_ccf_assist_apply,
611 [SPAPR_CAP_FWNMI] = {
612 .name = "fwnmi",
613 .description = "Implements PAPR FWNMI option",
614 .index = SPAPR_CAP_FWNMI,
615 .get = spapr_cap_get_bool,
616 .set = spapr_cap_set_bool,
617 .type = "bool",
618 .apply = cap_fwnmi_apply,
622 static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr,
623 const char *cputype)
625 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
626 SpaprCapabilities caps;
628 caps = smc->default_caps;
630 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_3_00,
631 0, spapr->max_compat_pvr)) {
632 caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF;
635 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07,
636 0, spapr->max_compat_pvr)) {
637 caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
638 caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN;
641 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS,
642 0, spapr->max_compat_pvr)) {
643 caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN;
646 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06,
647 0, spapr->max_compat_pvr)) {
648 caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF;
649 caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF;
650 caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
653 /* This is for pseries-2.12 and older */
654 if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) {
655 uint8_t mps;
657 if (kvmppc_hpt_needs_host_contiguous_pages()) {
658 mps = ctz64(qemu_minrampagesize());
659 } else {
660 mps = 34; /* allow everything up to 16GiB, i.e. everything */
663 caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = mps;
666 return caps;
669 int spapr_caps_pre_load(void *opaque)
671 SpaprMachineState *spapr = opaque;
673 /* Set to default so we can tell if this came in with the migration */
674 spapr->mig = spapr->def;
675 return 0;
678 int spapr_caps_pre_save(void *opaque)
680 SpaprMachineState *spapr = opaque;
682 spapr->mig = spapr->eff;
683 return 0;
686 /* This has to be called from the top-level spapr post_load, not the
687 * caps specific one. Otherwise it wouldn't be called when the source
688 * caps are all defaults, which could still conflict with overridden
689 * caps on the destination */
690 int spapr_caps_post_migration(SpaprMachineState *spapr)
692 int i;
693 bool ok = true;
694 SpaprCapabilities dstcaps = spapr->eff;
695 SpaprCapabilities srccaps;
697 srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
698 for (i = 0; i < SPAPR_CAP_NUM; i++) {
699 /* If not default value then assume came in with the migration */
700 if (spapr->mig.caps[i] != spapr->def.caps[i]) {
701 srccaps.caps[i] = spapr->mig.caps[i];
705 for (i = 0; i < SPAPR_CAP_NUM; i++) {
706 SpaprCapabilityInfo *info = &capability_table[i];
708 if (srccaps.caps[i] > dstcaps.caps[i]) {
709 error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)",
710 info->name, srccaps.caps[i], dstcaps.caps[i]);
711 ok = false;
714 if (srccaps.caps[i] < dstcaps.caps[i]) {
715 warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)",
716 info->name, srccaps.caps[i], dstcaps.caps[i]);
720 return ok ? 0 : -EINVAL;
723 /* Used to generate the migration field and needed function for a spapr cap */
724 #define SPAPR_CAP_MIG_STATE(sname, cap) \
725 static bool spapr_cap_##sname##_needed(void *opaque) \
727 SpaprMachineState *spapr = opaque; \
728 bool (*needed)(void *opaque) = \
729 capability_table[cap].migrate_needed; \
731 return needed ? needed(opaque) : true && \
732 spapr->cmd_line_caps[cap] && \
733 (spapr->eff.caps[cap] != \
734 spapr->def.caps[cap]); \
737 const VMStateDescription vmstate_spapr_cap_##sname = { \
738 .name = "spapr/cap/" #sname, \
739 .version_id = 1, \
740 .minimum_version_id = 1, \
741 .needed = spapr_cap_##sname##_needed, \
742 .fields = (VMStateField[]) { \
743 VMSTATE_UINT8(mig.caps[cap], \
744 SpaprMachineState), \
745 VMSTATE_END_OF_LIST() \
746 }, \
749 SPAPR_CAP_MIG_STATE(htm, SPAPR_CAP_HTM);
750 SPAPR_CAP_MIG_STATE(vsx, SPAPR_CAP_VSX);
751 SPAPR_CAP_MIG_STATE(dfp, SPAPR_CAP_DFP);
752 SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC);
753 SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC);
754 SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS);
755 SPAPR_CAP_MIG_STATE(hpt_maxpagesize, SPAPR_CAP_HPT_MAXPAGESIZE);
756 SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV);
757 SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER);
758 SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST);
759 SPAPR_CAP_MIG_STATE(fwnmi, SPAPR_CAP_FWNMI);
761 void spapr_caps_init(SpaprMachineState *spapr)
763 SpaprCapabilities default_caps;
764 int i;
766 /* Compute the actual set of caps we should run with */
767 default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
769 for (i = 0; i < SPAPR_CAP_NUM; i++) {
770 /* Store the defaults */
771 spapr->def.caps[i] = default_caps.caps[i];
772 /* If not set on the command line then apply the default value */
773 if (!spapr->cmd_line_caps[i]) {
774 spapr->eff.caps[i] = default_caps.caps[i];
779 void spapr_caps_apply(SpaprMachineState *spapr)
781 int i;
783 for (i = 0; i < SPAPR_CAP_NUM; i++) {
784 SpaprCapabilityInfo *info = &capability_table[i];
787 * If the apply function can't set the desired level and thinks it's
788 * fatal, it should cause that.
790 info->apply(spapr, spapr->eff.caps[i], &error_fatal);
794 void spapr_caps_cpu_apply(SpaprMachineState *spapr, PowerPCCPU *cpu)
796 int i;
798 for (i = 0; i < SPAPR_CAP_NUM; i++) {
799 SpaprCapabilityInfo *info = &capability_table[i];
802 * If the apply function can't set the desired level and thinks it's
803 * fatal, it should cause that.
805 if (info->cpu_apply) {
806 info->cpu_apply(spapr, cpu, spapr->eff.caps[i], &error_fatal);
811 void spapr_caps_add_properties(SpaprMachineClass *smc)
813 ObjectClass *klass = OBJECT_CLASS(smc);
814 int i;
816 for (i = 0; i < ARRAY_SIZE(capability_table); i++) {
817 SpaprCapabilityInfo *cap = &capability_table[i];
818 char *name = g_strdup_printf("cap-%s", cap->name);
819 char *desc;
821 object_class_property_add(klass, name, cap->type,
822 cap->get, cap->set,
823 NULL, cap);
825 desc = g_strdup_printf("%s", cap->description);
826 object_class_property_set_description(klass, name, desc);
827 g_free(name);
828 g_free(desc);