2 * QEMU PowerPC pSeries Logical Partition capabilities handling
4 * Copyright (c) 2017 David Gibson, Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
26 #include "qemu/error-report.h"
27 #include "qapi/error.h"
28 #include "qapi/visitor.h"
29 #include "sysemu/hw_accel.h"
30 #include "exec/ram_addr.h"
31 #include "target/ppc/cpu.h"
32 #include "target/ppc/mmu-hash64.h"
33 #include "cpu-models.h"
35 #include "migration/vmstate.h"
36 #include "sysemu/tcg.h"
38 #include "hw/ppc/spapr.h"
40 typedef struct SpaprCapPossible
{
41 int num
; /* size of vals array below */
42 const char *help
; /* help text for vals */
45 * - because of the way compatibility is determined vals MUST be ordered
46 * such that later options are a superset of all preceding options.
47 * - the order of vals must be preserved, that is their index is important,
48 * however vals may be added to the end of the list so long as the above
54 typedef struct SpaprCapabilityInfo
{
56 const char *description
;
59 /* Getter and Setter Function Pointers */
60 ObjectPropertyAccessor
*get
;
61 ObjectPropertyAccessor
*set
;
63 /* Possible values if this is a custom string type */
64 SpaprCapPossible
*possible
;
65 /* Make sure the virtual hardware can support this capability */
66 void (*apply
)(SpaprMachineState
*spapr
, uint8_t val
, Error
**errp
);
67 void (*cpu_apply
)(SpaprMachineState
*spapr
, PowerPCCPU
*cpu
,
68 uint8_t val
, Error
**errp
);
69 bool (*migrate_needed
)(void *opaque
);
70 } SpaprCapabilityInfo
;
72 static void spapr_cap_get_bool(Object
*obj
, Visitor
*v
, const char *name
,
73 void *opaque
, Error
**errp
)
75 SpaprCapabilityInfo
*cap
= opaque
;
76 SpaprMachineState
*spapr
= SPAPR_MACHINE(obj
);
77 bool value
= spapr_get_cap(spapr
, cap
->index
) == SPAPR_CAP_ON
;
79 visit_type_bool(v
, name
, &value
, errp
);
82 static void spapr_cap_set_bool(Object
*obj
, Visitor
*v
, const char *name
,
83 void *opaque
, Error
**errp
)
85 SpaprCapabilityInfo
*cap
= opaque
;
86 SpaprMachineState
*spapr
= SPAPR_MACHINE(obj
);
89 if (!visit_type_bool(v
, name
, &value
, errp
)) {
93 spapr
->cmd_line_caps
[cap
->index
] = true;
94 spapr
->eff
.caps
[cap
->index
] = value
? SPAPR_CAP_ON
: SPAPR_CAP_OFF
;
98 static void spapr_cap_get_string(Object
*obj
, Visitor
*v
, const char *name
,
99 void *opaque
, Error
**errp
)
101 SpaprCapabilityInfo
*cap
= opaque
;
102 SpaprMachineState
*spapr
= SPAPR_MACHINE(obj
);
103 g_autofree
char *val
= NULL
;
104 uint8_t value
= spapr_get_cap(spapr
, cap
->index
);
106 if (value
>= cap
->possible
->num
) {
107 error_setg(errp
, "Invalid value (%d) for cap-%s", value
, cap
->name
);
111 val
= g_strdup(cap
->possible
->vals
[value
]);
113 visit_type_str(v
, name
, &val
, errp
);
116 static void spapr_cap_set_string(Object
*obj
, Visitor
*v
, const char *name
,
117 void *opaque
, Error
**errp
)
119 SpaprCapabilityInfo
*cap
= opaque
;
120 SpaprMachineState
*spapr
= SPAPR_MACHINE(obj
);
122 g_autofree
char *val
= NULL
;
124 if (!visit_type_str(v
, name
, &val
, errp
)) {
128 if (!strcmp(val
, "?")) {
129 error_setg(errp
, "%s", cap
->possible
->help
);
132 for (i
= 0; i
< cap
->possible
->num
; i
++) {
133 if (!strcasecmp(val
, cap
->possible
->vals
[i
])) {
134 spapr
->cmd_line_caps
[cap
->index
] = true;
135 spapr
->eff
.caps
[cap
->index
] = i
;
140 error_setg(errp
, "Invalid capability mode \"%s\" for cap-%s", val
,
144 static void spapr_cap_get_pagesize(Object
*obj
, Visitor
*v
, const char *name
,
145 void *opaque
, Error
**errp
)
147 SpaprCapabilityInfo
*cap
= opaque
;
148 SpaprMachineState
*spapr
= SPAPR_MACHINE(obj
);
149 uint8_t val
= spapr_get_cap(spapr
, cap
->index
);
150 uint64_t pagesize
= (1ULL << val
);
152 visit_type_size(v
, name
, &pagesize
, errp
);
155 static void spapr_cap_set_pagesize(Object
*obj
, Visitor
*v
, const char *name
,
156 void *opaque
, Error
**errp
)
158 SpaprCapabilityInfo
*cap
= opaque
;
159 SpaprMachineState
*spapr
= SPAPR_MACHINE(obj
);
163 if (!visit_type_size(v
, name
, &pagesize
, errp
)) {
167 if (!is_power_of_2(pagesize
)) {
168 error_setg(errp
, "cap-%s must be a power of 2", cap
->name
);
172 val
= ctz64(pagesize
);
173 spapr
->cmd_line_caps
[cap
->index
] = true;
174 spapr
->eff
.caps
[cap
->index
] = val
;
177 static void cap_htm_apply(SpaprMachineState
*spapr
, uint8_t val
, Error
**errp
)
181 /* TODO: We don't support disabling htm yet */
185 error_setg(errp
, "No Transactional Memory support in TCG");
186 error_append_hint(errp
, "Try appending -machine cap-htm=off\n");
187 } else if (kvm_enabled() && !kvmppc_has_cap_htm()) {
189 "KVM implementation does not support Transactional Memory");
190 error_append_hint(errp
, "Try appending -machine cap-htm=off\n");
194 static void cap_vsx_apply(SpaprMachineState
*spapr
, uint8_t val
, Error
**errp
)
197 CPUPPCState
*env
= cpu_env(first_cpu
);
200 /* TODO: We don't support disabling vsx yet */
203 /* Allowable CPUs in spapr_cpu_core.c should already have gotten
204 * rid of anything that doesn't do VMX */
205 g_assert(env
->insns_flags
& PPC_ALTIVEC
);
206 if (!(env
->insns_flags2
& PPC2_VSX
)) {
207 error_setg(errp
, "VSX support not available");
208 error_append_hint(errp
, "Try appending -machine cap-vsx=off\n");
212 static void cap_dfp_apply(SpaprMachineState
*spapr
, uint8_t val
, Error
**errp
)
217 /* TODO: We don't support disabling dfp yet */
220 if (!(cpu_env(first_cpu
)->insns_flags2
& PPC2_DFP
)) {
221 error_setg(errp
, "DFP support not available");
222 error_append_hint(errp
, "Try appending -machine cap-dfp=off\n");
226 SpaprCapPossible cap_cfpc_possible
= {
228 .vals
= {"broken", "workaround", "fixed"},
229 .help
= "broken - no protection, workaround - workaround available,"
230 " fixed - fixed in hardware",
233 static void cap_safe_cache_apply(SpaprMachineState
*spapr
, uint8_t val
,
237 uint8_t kvm_val
= kvmppc_get_cap_safe_cache();
239 if (tcg_enabled() && val
) {
240 /* TCG only supports broken, allow other values and print a warning */
241 warn_report("TCG doesn't support requested feature, cap-cfpc=%s",
242 cap_cfpc_possible
.vals
[val
]);
243 } else if (kvm_enabled() && (val
> kvm_val
)) {
245 "Requested safe cache capability level not supported by KVM");
246 error_append_hint(errp
, "Try appending -machine cap-cfpc=%s\n",
247 cap_cfpc_possible
.vals
[kvm_val
]);
251 SpaprCapPossible cap_sbbc_possible
= {
253 .vals
= {"broken", "workaround", "fixed"},
254 .help
= "broken - no protection, workaround - workaround available,"
255 " fixed - fixed in hardware",
258 static void cap_safe_bounds_check_apply(SpaprMachineState
*spapr
, uint8_t val
,
262 uint8_t kvm_val
= kvmppc_get_cap_safe_bounds_check();
264 if (tcg_enabled() && val
) {
265 /* TCG only supports broken, allow other values and print a warning */
266 warn_report("TCG doesn't support requested feature, cap-sbbc=%s",
267 cap_sbbc_possible
.vals
[val
]);
268 } else if (kvm_enabled() && (val
> kvm_val
)) {
270 "Requested safe bounds check capability level not supported by KVM");
271 error_append_hint(errp
, "Try appending -machine cap-sbbc=%s\n",
272 cap_sbbc_possible
.vals
[kvm_val
]);
276 SpaprCapPossible cap_ibs_possible
= {
278 /* Note workaround only maintained for compatibility */
279 .vals
= {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"},
280 .help
= "broken - no protection, workaround - count cache flush"
281 ", fixed-ibs - indirect branch serialisation,"
282 " fixed-ccd - cache count disabled,"
283 " fixed-na - fixed in hardware (no longer applicable)",
286 static void cap_safe_indirect_branch_apply(SpaprMachineState
*spapr
,
287 uint8_t val
, Error
**errp
)
290 uint8_t kvm_val
= kvmppc_get_cap_safe_indirect_branch();
292 if (tcg_enabled() && val
) {
293 /* TCG only supports broken, allow other values and print a warning */
294 warn_report("TCG doesn't support requested feature, cap-ibs=%s",
295 cap_ibs_possible
.vals
[val
]);
296 } else if (kvm_enabled() && (val
> kvm_val
)) {
298 "Requested safe indirect branch capability level not supported by KVM");
299 error_append_hint(errp
, "Try appending -machine cap-ibs=%s\n",
300 cap_ibs_possible
.vals
[kvm_val
]);
304 #define VALUE_DESC_TRISTATE " (broken, workaround, fixed)"
306 bool spapr_check_pagesize(SpaprMachineState
*spapr
, hwaddr pagesize
,
309 hwaddr maxpagesize
= (1ULL << spapr
->eff
.caps
[SPAPR_CAP_HPT_MAXPAGESIZE
]);
311 if (!kvmppc_hpt_needs_host_contiguous_pages()) {
315 if (maxpagesize
> pagesize
) {
317 "Can't support %"HWADDR_PRIu
" kiB guest pages with %"
318 HWADDR_PRIu
" kiB host pages with this KVM implementation",
319 maxpagesize
>> 10, pagesize
>> 10);
326 static void cap_hpt_maxpagesize_apply(SpaprMachineState
*spapr
,
327 uint8_t val
, Error
**errp
)
330 error_setg(errp
, "Require at least 4kiB hpt-max-page-size");
332 } else if (val
< 16) {
333 warn_report("Many guests require at least 64kiB hpt-max-page-size");
336 spapr_check_pagesize(spapr
, qemu_minrampagesize(), errp
);
339 static bool cap_hpt_maxpagesize_migrate_needed(void *opaque
)
341 return !SPAPR_MACHINE_GET_CLASS(opaque
)->pre_4_1_migration
;
344 static bool spapr_pagesize_cb(void *opaque
, uint32_t seg_pshift
,
347 unsigned maxshift
= *((unsigned *)opaque
);
349 assert(pshift
>= seg_pshift
);
351 /* Don't allow the guest to use pages bigger than the configured
353 if (pshift
> maxshift
) {
357 /* For whatever reason, KVM doesn't allow multiple pagesizes
358 * within a segment, *except* for the case of 16M pages in a 4k or
359 * 64k segment. Always exclude other cases, so that TCG and KVM
360 * guests see a consistent environment */
361 if ((pshift
!= seg_pshift
) && (pshift
!= 24)) {
368 static void ppc_hash64_filter_pagesizes(PowerPCCPU
*cpu
,
369 bool (*cb
)(void *, uint32_t, uint32_t),
372 PPCHash64Options
*opts
= cpu
->hash64_opts
;
375 bool ci_largepage
= false;
380 for (i
= 0; i
< ARRAY_SIZE(opts
->sps
); i
++) {
381 PPCHash64SegmentPageSizes
*sps
= &opts
->sps
[i
];
387 if (!sps
->page_shift
) {
391 for (j
= 0; j
< ARRAY_SIZE(sps
->enc
); j
++) {
392 PPCHash64PageSize
*ps
= &sps
->enc
[j
];
395 if (!ps
->page_shift
) {
399 if (cb(opaque
, sps
->page_shift
, ps
->page_shift
)) {
400 if (ps
->page_shift
>= 16) {
407 /* Clear rest of the row */
408 for (j
= m
; j
< ARRAY_SIZE(sps
->enc
); j
++) {
409 memset(&sps
->enc
[j
], 0, sizeof(sps
->enc
[j
]));
417 /* Clear the rest of the table */
418 for (i
= n
; i
< ARRAY_SIZE(opts
->sps
); i
++) {
419 memset(&opts
->sps
[i
], 0, sizeof(opts
->sps
[i
]));
423 opts
->flags
&= ~PPC_HASH64_CI_LARGEPAGE
;
427 static void cap_hpt_maxpagesize_cpu_apply(SpaprMachineState
*spapr
,
429 uint8_t val
, Error
**errp
)
431 unsigned maxshift
= val
;
433 ppc_hash64_filter_pagesizes(cpu
, spapr_pagesize_cb
, &maxshift
);
436 static void cap_nested_kvm_hv_apply(SpaprMachineState
*spapr
,
437 uint8_t val
, Error
**errp
)
440 PowerPCCPU
*cpu
= POWERPC_CPU(first_cpu
);
441 CPUPPCState
*env
= &cpu
->env
;
444 /* capability disabled by default */
448 if (!(env
->insns_flags2
& PPC2_ISA300
)) {
449 error_setg(errp
, "Nested-HV only supported on POWER9 and later");
450 error_append_hint(errp
, "Try appending -machine cap-nested-hv=off\n");
455 if (!ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_3_00
, 0,
456 spapr
->max_compat_pvr
)) {
457 error_setg(errp
, "Nested-HV only supported on POWER9 and later");
458 error_append_hint(errp
,
459 "Try appending -machine max-cpu-compat=power9\n");
463 if (!kvmppc_has_cap_nested_kvm_hv()) {
465 "KVM implementation does not support Nested-HV");
466 error_append_hint(errp
,
467 "Try appending -machine cap-nested-hv=off\n");
468 } else if (kvmppc_set_cap_nested_kvm_hv(val
) < 0) {
469 error_setg(errp
, "Error enabling cap-nested-hv with KVM");
470 error_append_hint(errp
,
471 "Try appending -machine cap-nested-hv=off\n");
473 } else if (tcg_enabled()) {
474 MachineState
*ms
= MACHINE(spapr
);
475 unsigned int smp_threads
= ms
->smp
.threads
;
478 * Nested-HV vCPU env state to L2, so SMT-shared SPR updates, for
479 * example, do not necessarily update the correct SPR value on sibling
480 * threads that are in a different guest/host context.
482 if (smp_threads
> 1) {
483 error_setg(errp
, "TCG does not support nested-HV with SMT");
484 error_append_hint(errp
, "Try appending -machine cap-nested-hv=off "
485 "or use threads=1 with -smp\n");
487 if (spapr_nested_api(spapr
) &&
488 spapr_nested_api(spapr
) != NESTED_API_KVM_HV
) {
489 error_setg(errp
, "Nested-HV APIs are mutually exclusive");
490 error_append_hint(errp
, "Please use either cap-nested-hv or "
491 "cap-nested-papr to proceed.\n");
494 spapr
->nested
.api
= NESTED_API_KVM_HV
;
499 static void cap_nested_papr_apply(SpaprMachineState
*spapr
,
500 uint8_t val
, Error
**errp
)
503 PowerPCCPU
*cpu
= POWERPC_CPU(first_cpu
);
504 CPUPPCState
*env
= &cpu
->env
;
507 /* capability disabled by default */
512 if (!(env
->insns_flags2
& PPC2_ISA300
)) {
513 error_setg(errp
, "Nested-PAPR only supported on POWER9 and later");
514 error_append_hint(errp
,
515 "Try appending -machine cap-nested-papr=off\n");
518 if (spapr_nested_api(spapr
) &&
519 spapr_nested_api(spapr
) != NESTED_API_PAPR
) {
520 error_setg(errp
, "Nested-HV APIs are mutually exclusive");
521 error_append_hint(errp
, "Please use either cap-nested-hv or "
522 "cap-nested-papr to proceed.\n");
525 spapr
->nested
.api
= NESTED_API_PAPR
;
527 } else if (kvm_enabled()) {
528 error_setg(errp
, "KVM implementation does not support Nested-PAPR");
529 error_append_hint(errp
,
530 "Try appending -machine cap-nested-papr=off\n");
534 static void cap_large_decr_apply(SpaprMachineState
*spapr
,
535 uint8_t val
, Error
**errp
)
538 PowerPCCPU
*cpu
= POWERPC_CPU(first_cpu
);
539 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cpu
);
542 return; /* Disabled by default */
546 if (!ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_3_00
, 0,
547 spapr
->max_compat_pvr
)) {
548 error_setg(errp
, "Large decrementer only supported on POWER9");
549 error_append_hint(errp
, "Try -cpu POWER9\n");
552 } else if (kvm_enabled()) {
553 int kvm_nr_bits
= kvmppc_get_cap_large_decr();
556 error_setg(errp
, "No large decrementer support");
557 error_append_hint(errp
,
558 "Try appending -machine cap-large-decr=off\n");
559 } else if (pcc
->lrg_decr_bits
!= kvm_nr_bits
) {
561 "KVM large decrementer size (%d) differs to model (%d)",
562 kvm_nr_bits
, pcc
->lrg_decr_bits
);
563 error_append_hint(errp
,
564 "Try appending -machine cap-large-decr=off\n");
569 static void cap_large_decr_cpu_apply(SpaprMachineState
*spapr
,
571 uint8_t val
, Error
**errp
)
574 CPUPPCState
*env
= &cpu
->env
;
575 target_ulong lpcr
= env
->spr
[SPR_LPCR
];
578 if (kvmppc_enable_cap_large_decr(cpu
, val
)) {
579 error_setg(errp
, "No large decrementer support");
580 error_append_hint(errp
,
581 "Try appending -machine cap-large-decr=off\n");
590 ppc_store_lpcr(cpu
, lpcr
);
593 static void cap_ccf_assist_apply(SpaprMachineState
*spapr
, uint8_t val
,
597 uint8_t kvm_val
= kvmppc_get_cap_count_cache_flush_assist();
599 if (tcg_enabled() && val
) {
600 /* TCG doesn't implement anything here, but allow with a warning */
601 warn_report("TCG doesn't support requested feature, cap-ccf-assist=on");
602 } else if (kvm_enabled() && (val
> kvm_val
)) {
603 uint8_t kvm_ibs
= kvmppc_get_cap_safe_indirect_branch();
605 if (kvm_ibs
== SPAPR_CAP_FIXED_CCD
) {
607 * If we don't have CCF assist on the host, the assist
608 * instruction is a harmless no-op. It won't correctly
609 * implement the cache count flush *but* if we have
610 * count-cache-disabled in the host, that flush is
611 * unnecessary. So, specifically allow this case. This
612 * allows us to have better performance on POWER9 DD2.3,
613 * while still working on POWER9 DD2.2 and POWER8 host
619 "Requested count cache flush assist capability level not supported by KVM");
620 error_append_hint(errp
, "Try appending -machine cap-ccf-assist=off\n");
624 static void cap_fwnmi_apply(SpaprMachineState
*spapr
, uint8_t val
,
629 return; /* Disabled by default */
633 if (!kvmppc_get_fwnmi()) {
635 "Firmware Assisted Non-Maskable Interrupts(FWNMI) not supported by KVM.");
636 error_append_hint(errp
, "Try appending -machine cap-fwnmi=off\n");
641 static void cap_rpt_invalidate_apply(SpaprMachineState
*spapr
,
642 uint8_t val
, Error
**errp
)
647 /* capability disabled by default */
652 error_setg(errp
, "No H_RPT_INVALIDATE support in TCG");
653 error_append_hint(errp
,
654 "Try appending -machine cap-rpt-invalidate=off\n");
655 } else if (kvm_enabled()) {
656 if (!kvmppc_has_cap_mmu_radix()) {
657 error_setg(errp
, "H_RPT_INVALIDATE only supported on Radix");
661 if (!kvmppc_has_cap_rpt_invalidate()) {
663 "KVM implementation does not support H_RPT_INVALIDATE");
664 error_append_hint(errp
,
665 "Try appending -machine cap-rpt-invalidate=off\n");
667 kvmppc_enable_h_rpt_invalidate();
672 static void cap_ail_mode_3_apply(SpaprMachineState
*spapr
,
673 uint8_t val
, Error
**errp
)
676 PowerPCCPU
*cpu
= POWERPC_CPU(first_cpu
);
677 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cpu
);
684 /* AIL-3 is only supported on POWER8 and above CPUs. */
685 if (!(pcc
->insns_flags2
& PPC2_ISA207S
)) {
686 error_setg(errp
, "TCG only supports cap-ail-mode-3 on POWER8 and later CPUs");
687 error_append_hint(errp
, "Try appending -machine cap-ail-mode-3=off\n");
690 } else if (kvm_enabled()) {
691 if (!kvmppc_supports_ail_3()) {
692 error_setg(errp
, "KVM implementation does not support cap-ail-mode-3");
693 error_append_hint(errp
, "Try appending -machine cap-ail-mode-3=off\n");
699 SpaprCapabilityInfo capability_table
[SPAPR_CAP_NUM
] = {
702 .description
= "Allow Hardware Transactional Memory (HTM)",
703 .index
= SPAPR_CAP_HTM
,
704 .get
= spapr_cap_get_bool
,
705 .set
= spapr_cap_set_bool
,
707 .apply
= cap_htm_apply
,
711 .description
= "Allow Vector Scalar Extensions (VSX)",
712 .index
= SPAPR_CAP_VSX
,
713 .get
= spapr_cap_get_bool
,
714 .set
= spapr_cap_set_bool
,
716 .apply
= cap_vsx_apply
,
720 .description
= "Allow Decimal Floating Point (DFP)",
721 .index
= SPAPR_CAP_DFP
,
722 .get
= spapr_cap_get_bool
,
723 .set
= spapr_cap_set_bool
,
725 .apply
= cap_dfp_apply
,
729 .description
= "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE
,
730 .index
= SPAPR_CAP_CFPC
,
731 .get
= spapr_cap_get_string
,
732 .set
= spapr_cap_set_string
,
734 .possible
= &cap_cfpc_possible
,
735 .apply
= cap_safe_cache_apply
,
739 .description
= "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE
,
740 .index
= SPAPR_CAP_SBBC
,
741 .get
= spapr_cap_get_string
,
742 .set
= spapr_cap_set_string
,
744 .possible
= &cap_sbbc_possible
,
745 .apply
= cap_safe_bounds_check_apply
,
750 "Indirect Branch Speculation (broken, workaround, fixed-ibs,"
751 "fixed-ccd, fixed-na)",
752 .index
= SPAPR_CAP_IBS
,
753 .get
= spapr_cap_get_string
,
754 .set
= spapr_cap_set_string
,
756 .possible
= &cap_ibs_possible
,
757 .apply
= cap_safe_indirect_branch_apply
,
759 [SPAPR_CAP_HPT_MAXPAGESIZE
] = {
760 .name
= "hpt-max-page-size",
761 .description
= "Maximum page size for Hash Page Table guests",
762 .index
= SPAPR_CAP_HPT_MAXPAGESIZE
,
763 .get
= spapr_cap_get_pagesize
,
764 .set
= spapr_cap_set_pagesize
,
766 .apply
= cap_hpt_maxpagesize_apply
,
767 .cpu_apply
= cap_hpt_maxpagesize_cpu_apply
,
768 .migrate_needed
= cap_hpt_maxpagesize_migrate_needed
,
770 [SPAPR_CAP_NESTED_KVM_HV
] = {
772 .description
= "Allow Nested KVM-HV",
773 .index
= SPAPR_CAP_NESTED_KVM_HV
,
774 .get
= spapr_cap_get_bool
,
775 .set
= spapr_cap_set_bool
,
777 .apply
= cap_nested_kvm_hv_apply
,
779 [SPAPR_CAP_NESTED_PAPR
] = {
780 .name
= "nested-papr",
781 .description
= "Allow Nested HV (PAPR API)",
782 .index
= SPAPR_CAP_NESTED_PAPR
,
783 .get
= spapr_cap_get_bool
,
784 .set
= spapr_cap_set_bool
,
786 .apply
= cap_nested_papr_apply
,
788 [SPAPR_CAP_LARGE_DECREMENTER
] = {
789 .name
= "large-decr",
790 .description
= "Allow Large Decrementer",
791 .index
= SPAPR_CAP_LARGE_DECREMENTER
,
792 .get
= spapr_cap_get_bool
,
793 .set
= spapr_cap_set_bool
,
795 .apply
= cap_large_decr_apply
,
796 .cpu_apply
= cap_large_decr_cpu_apply
,
798 [SPAPR_CAP_CCF_ASSIST
] = {
799 .name
= "ccf-assist",
800 .description
= "Count Cache Flush Assist via HW Instruction",
801 .index
= SPAPR_CAP_CCF_ASSIST
,
802 .get
= spapr_cap_get_bool
,
803 .set
= spapr_cap_set_bool
,
805 .apply
= cap_ccf_assist_apply
,
807 [SPAPR_CAP_FWNMI
] = {
809 .description
= "Implements PAPR FWNMI option",
810 .index
= SPAPR_CAP_FWNMI
,
811 .get
= spapr_cap_get_bool
,
812 .set
= spapr_cap_set_bool
,
814 .apply
= cap_fwnmi_apply
,
816 [SPAPR_CAP_RPT_INVALIDATE
] = {
817 .name
= "rpt-invalidate",
818 .description
= "Allow H_RPT_INVALIDATE",
819 .index
= SPAPR_CAP_RPT_INVALIDATE
,
820 .get
= spapr_cap_get_bool
,
821 .set
= spapr_cap_set_bool
,
823 .apply
= cap_rpt_invalidate_apply
,
825 [SPAPR_CAP_AIL_MODE_3
] = {
826 .name
= "ail-mode-3",
827 .description
= "Alternate Interrupt Location (AIL) mode 3 support",
828 .index
= SPAPR_CAP_AIL_MODE_3
,
829 .get
= spapr_cap_get_bool
,
830 .set
= spapr_cap_set_bool
,
832 .apply
= cap_ail_mode_3_apply
,
836 static SpaprCapabilities
default_caps_with_cpu(SpaprMachineState
*spapr
,
839 SpaprMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(spapr
);
840 SpaprCapabilities caps
;
842 caps
= smc
->default_caps
;
844 if (!ppc_type_check_compat(cputype
, CPU_POWERPC_LOGICAL_3_00
,
845 0, spapr
->max_compat_pvr
)) {
846 caps
.caps
[SPAPR_CAP_LARGE_DECREMENTER
] = SPAPR_CAP_OFF
;
849 if (!ppc_type_check_compat(cputype
, CPU_POWERPC_LOGICAL_2_07
,
850 0, spapr
->max_compat_pvr
)) {
851 caps
.caps
[SPAPR_CAP_HTM
] = SPAPR_CAP_OFF
;
852 caps
.caps
[SPAPR_CAP_CFPC
] = SPAPR_CAP_BROKEN
;
853 caps
.caps
[SPAPR_CAP_AIL_MODE_3
] = SPAPR_CAP_OFF
;
856 if (!ppc_type_check_compat(cputype
, CPU_POWERPC_LOGICAL_2_06_PLUS
,
857 0, spapr
->max_compat_pvr
)) {
858 caps
.caps
[SPAPR_CAP_SBBC
] = SPAPR_CAP_BROKEN
;
861 if (!ppc_type_check_compat(cputype
, CPU_POWERPC_LOGICAL_2_06
,
862 0, spapr
->max_compat_pvr
)) {
863 caps
.caps
[SPAPR_CAP_VSX
] = SPAPR_CAP_OFF
;
864 caps
.caps
[SPAPR_CAP_DFP
] = SPAPR_CAP_OFF
;
865 caps
.caps
[SPAPR_CAP_IBS
] = SPAPR_CAP_BROKEN
;
868 /* This is for pseries-2.12 and older */
869 if (smc
->default_caps
.caps
[SPAPR_CAP_HPT_MAXPAGESIZE
] == 0) {
872 if (kvmppc_hpt_needs_host_contiguous_pages()) {
873 mps
= ctz64(qemu_minrampagesize());
875 mps
= 34; /* allow everything up to 16GiB, i.e. everything */
878 caps
.caps
[SPAPR_CAP_HPT_MAXPAGESIZE
] = mps
;
884 int spapr_caps_pre_load(void *opaque
)
886 SpaprMachineState
*spapr
= opaque
;
888 /* Set to default so we can tell if this came in with the migration */
889 spapr
->mig
= spapr
->def
;
893 int spapr_caps_pre_save(void *opaque
)
895 SpaprMachineState
*spapr
= opaque
;
897 spapr
->mig
= spapr
->eff
;
901 /* This has to be called from the top-level spapr post_load, not the
902 * caps specific one. Otherwise it wouldn't be called when the source
903 * caps are all defaults, which could still conflict with overridden
904 * caps on the destination */
905 int spapr_caps_post_migration(SpaprMachineState
*spapr
)
909 SpaprCapabilities dstcaps
= spapr
->eff
;
910 SpaprCapabilities srccaps
;
912 srccaps
= default_caps_with_cpu(spapr
, MACHINE(spapr
)->cpu_type
);
913 for (i
= 0; i
< SPAPR_CAP_NUM
; i
++) {
914 /* If not default value then assume came in with the migration */
915 if (spapr
->mig
.caps
[i
] != spapr
->def
.caps
[i
]) {
916 srccaps
.caps
[i
] = spapr
->mig
.caps
[i
];
920 for (i
= 0; i
< SPAPR_CAP_NUM
; i
++) {
921 SpaprCapabilityInfo
*info
= &capability_table
[i
];
923 if (srccaps
.caps
[i
] > dstcaps
.caps
[i
]) {
924 error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)",
925 info
->name
, srccaps
.caps
[i
], dstcaps
.caps
[i
]);
929 if (srccaps
.caps
[i
] < dstcaps
.caps
[i
]) {
930 warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)",
931 info
->name
, srccaps
.caps
[i
], dstcaps
.caps
[i
]);
935 return ok
? 0 : -EINVAL
;
938 /* Used to generate the migration field and needed function for a spapr cap */
939 #define SPAPR_CAP_MIG_STATE(sname, cap) \
940 static bool spapr_cap_##sname##_needed(void *opaque) \
942 SpaprMachineState *spapr = opaque; \
943 bool (*needed)(void *opaque) = \
944 capability_table[cap].migrate_needed; \
946 return needed ? needed(opaque) : true && \
947 spapr->cmd_line_caps[cap] && \
948 (spapr->eff.caps[cap] != \
949 spapr->def.caps[cap]); \
952 const VMStateDescription vmstate_spapr_cap_##sname = { \
953 .name = "spapr/cap/" #sname, \
955 .minimum_version_id = 1, \
956 .needed = spapr_cap_##sname##_needed, \
957 .fields = (const VMStateField[]) { \
958 VMSTATE_UINT8(mig.caps[cap], \
959 SpaprMachineState), \
960 VMSTATE_END_OF_LIST() \
964 SPAPR_CAP_MIG_STATE(htm
, SPAPR_CAP_HTM
);
965 SPAPR_CAP_MIG_STATE(vsx
, SPAPR_CAP_VSX
);
966 SPAPR_CAP_MIG_STATE(dfp
, SPAPR_CAP_DFP
);
967 SPAPR_CAP_MIG_STATE(cfpc
, SPAPR_CAP_CFPC
);
968 SPAPR_CAP_MIG_STATE(sbbc
, SPAPR_CAP_SBBC
);
969 SPAPR_CAP_MIG_STATE(ibs
, SPAPR_CAP_IBS
);
970 SPAPR_CAP_MIG_STATE(hpt_maxpagesize
, SPAPR_CAP_HPT_MAXPAGESIZE
);
971 SPAPR_CAP_MIG_STATE(nested_kvm_hv
, SPAPR_CAP_NESTED_KVM_HV
);
972 SPAPR_CAP_MIG_STATE(nested_papr
, SPAPR_CAP_NESTED_PAPR
);
973 SPAPR_CAP_MIG_STATE(large_decr
, SPAPR_CAP_LARGE_DECREMENTER
);
974 SPAPR_CAP_MIG_STATE(ccf_assist
, SPAPR_CAP_CCF_ASSIST
);
975 SPAPR_CAP_MIG_STATE(fwnmi
, SPAPR_CAP_FWNMI
);
976 SPAPR_CAP_MIG_STATE(rpt_invalidate
, SPAPR_CAP_RPT_INVALIDATE
);
977 SPAPR_CAP_MIG_STATE(ail_mode_3
, SPAPR_CAP_AIL_MODE_3
);
979 void spapr_caps_init(SpaprMachineState
*spapr
)
981 SpaprCapabilities default_caps
;
984 /* Compute the actual set of caps we should run with */
985 default_caps
= default_caps_with_cpu(spapr
, MACHINE(spapr
)->cpu_type
);
987 for (i
= 0; i
< SPAPR_CAP_NUM
; i
++) {
988 /* Store the defaults */
989 spapr
->def
.caps
[i
] = default_caps
.caps
[i
];
990 /* If not set on the command line then apply the default value */
991 if (!spapr
->cmd_line_caps
[i
]) {
992 spapr
->eff
.caps
[i
] = default_caps
.caps
[i
];
997 void spapr_caps_apply(SpaprMachineState
*spapr
)
1001 for (i
= 0; i
< SPAPR_CAP_NUM
; i
++) {
1002 SpaprCapabilityInfo
*info
= &capability_table
[i
];
1005 * If the apply function can't set the desired level and thinks it's
1006 * fatal, it should cause that.
1008 info
->apply(spapr
, spapr
->eff
.caps
[i
], &error_fatal
);
1012 void spapr_caps_cpu_apply(SpaprMachineState
*spapr
, PowerPCCPU
*cpu
)
1016 for (i
= 0; i
< SPAPR_CAP_NUM
; i
++) {
1017 SpaprCapabilityInfo
*info
= &capability_table
[i
];
1020 * If the apply function can't set the desired level and thinks it's
1021 * fatal, it should cause that.
1023 if (info
->cpu_apply
) {
1024 info
->cpu_apply(spapr
, cpu
, spapr
->eff
.caps
[i
], &error_fatal
);
1029 void spapr_caps_add_properties(SpaprMachineClass
*smc
)
1031 ObjectClass
*klass
= OBJECT_CLASS(smc
);
1034 for (i
= 0; i
< ARRAY_SIZE(capability_table
); i
++) {
1035 SpaprCapabilityInfo
*cap
= &capability_table
[i
];
1036 g_autofree
char *name
= g_strdup_printf("cap-%s", cap
->name
);
1037 g_autofree
char *desc
= g_strdup_printf("%s", cap
->description
);
1039 object_class_property_add(klass
, name
, cap
->type
,
1043 object_class_property_set_description(klass
, name
, desc
);