4 * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "hw/core/cpu.h"
24 #include "sysemu/hw_accel.h"
25 #include "qemu/notify.h"
27 #include "qemu/main-loop.h"
29 #include "qemu/error-report.h"
30 #include "qemu/qemu-print.h"
31 #include "sysemu/tcg.h"
32 #include "hw/boards.h"
33 #include "hw/qdev-properties.h"
34 #include "trace-root.h"
35 #include "qemu/plugin.h"
37 CPUInterruptHandler cpu_interrupt_handler
;
39 CPUState
*cpu_by_arch_id(int64_t id
)
44 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
46 if (cc
->get_arch_id(cpu
) == id
) {
53 bool cpu_exists(int64_t id
)
55 return !!cpu_by_arch_id(id
);
58 CPUState
*cpu_create(const char *typename
)
61 CPUState
*cpu
= CPU(object_new(typename
));
62 object_property_set_bool(OBJECT(cpu
), true, "realized", &err
);
64 error_report_err(err
);
65 object_unref(OBJECT(cpu
));
71 bool cpu_paging_enabled(const CPUState
*cpu
)
73 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
75 return cc
->get_paging_enabled(cpu
);
78 static bool cpu_common_get_paging_enabled(const CPUState
*cpu
)
83 void cpu_get_memory_mapping(CPUState
*cpu
, MemoryMappingList
*list
,
86 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
88 cc
->get_memory_mapping(cpu
, list
, errp
);
91 static void cpu_common_get_memory_mapping(CPUState
*cpu
,
92 MemoryMappingList
*list
,
95 error_setg(errp
, "Obtaining memory mappings is unsupported on this CPU.");
98 /* Resetting the IRQ comes from across the code base so we take the
99 * BQL here if we need to. cpu_interrupt assumes it is held.*/
100 void cpu_reset_interrupt(CPUState
*cpu
, int mask
)
102 bool need_lock
= !qemu_mutex_iothread_locked();
105 qemu_mutex_lock_iothread();
107 cpu
->interrupt_request
&= ~mask
;
109 qemu_mutex_unlock_iothread();
113 void cpu_exit(CPUState
*cpu
)
115 atomic_set(&cpu
->exit_request
, 1);
116 /* Ensure cpu_exec will see the exit request after TCG has exited. */
118 atomic_set(&cpu
->icount_decr_ptr
->u16
.high
, -1);
121 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
124 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
126 return (*cc
->write_elf32_qemunote
)(f
, cpu
, opaque
);
129 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f
,
130 CPUState
*cpu
, void *opaque
)
135 int cpu_write_elf32_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
136 int cpuid
, void *opaque
)
138 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
140 return (*cc
->write_elf32_note
)(f
, cpu
, cpuid
, opaque
);
143 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f
,
144 CPUState
*cpu
, int cpuid
,
150 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f
, CPUState
*cpu
,
153 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
155 return (*cc
->write_elf64_qemunote
)(f
, cpu
, opaque
);
158 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f
,
159 CPUState
*cpu
, void *opaque
)
164 int cpu_write_elf64_note(WriteCoreDumpFunction f
, CPUState
*cpu
,
165 int cpuid
, void *opaque
)
167 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
169 return (*cc
->write_elf64_note
)(f
, cpu
, cpuid
, opaque
);
172 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f
,
173 CPUState
*cpu
, int cpuid
,
180 static int cpu_common_gdb_read_register(CPUState
*cpu
, GByteArray
*buf
, int reg
)
185 static int cpu_common_gdb_write_register(CPUState
*cpu
, uint8_t *buf
, int reg
)
190 static bool cpu_common_debug_check_watchpoint(CPUState
*cpu
, CPUWatchpoint
*wp
)
192 /* If no extra check is required, QEMU watchpoint match can be considered
193 * as an architectural match.
198 static bool cpu_common_virtio_is_big_endian(CPUState
*cpu
)
200 return target_words_bigendian();
203 static void cpu_common_noop(CPUState
*cpu
)
207 static bool cpu_common_exec_interrupt(CPUState
*cpu
, int int_req
)
212 #if !defined(CONFIG_USER_ONLY)
213 GuestPanicInformation
*cpu_get_crash_info(CPUState
*cpu
)
215 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
216 GuestPanicInformation
*res
= NULL
;
218 if (cc
->get_crash_info
) {
219 res
= cc
->get_crash_info(cpu
);
225 void cpu_dump_state(CPUState
*cpu
, FILE *f
, int flags
)
227 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
229 if (cc
->dump_state
) {
230 cpu_synchronize_state(cpu
);
231 cc
->dump_state(cpu
, f
, flags
);
235 void cpu_dump_statistics(CPUState
*cpu
, int flags
)
237 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
239 if (cc
->dump_statistics
) {
240 cc
->dump_statistics(cpu
, flags
);
244 void cpu_reset(CPUState
*cpu
)
246 device_cold_reset(DEVICE(cpu
));
248 trace_guest_cpu_reset(cpu
);
251 static void cpu_common_reset(DeviceState
*dev
)
253 CPUState
*cpu
= CPU(dev
);
254 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
256 if (qemu_loglevel_mask(CPU_LOG_RESET
)) {
257 qemu_log("CPU Reset (CPU %d)\n", cpu
->cpu_index
);
258 log_cpu_state(cpu
, cc
->reset_dump_flags
);
261 cpu
->interrupt_request
= 0;
264 cpu
->icount_extra
= 0;
265 atomic_set(&cpu
->icount_decr_ptr
->u32
, 0);
267 cpu
->exception_index
= -1;
268 cpu
->crash_occurred
= false;
269 cpu
->cflags_next_tb
= -1;
272 cpu_tb_jmp_cache_clear(cpu
);
274 tcg_flush_softmmu_tlb(cpu
);
278 static bool cpu_common_has_work(CPUState
*cs
)
283 ObjectClass
*cpu_class_by_name(const char *typename
, const char *cpu_model
)
285 CPUClass
*cc
= CPU_CLASS(object_class_by_name(typename
));
287 assert(cpu_model
&& cc
->class_by_name
);
288 return cc
->class_by_name(cpu_model
);
291 static void cpu_common_parse_features(const char *typename
, char *features
,
295 static bool cpu_globals_initialized
;
296 /* Single "key=value" string being parsed */
297 char *featurestr
= features
? strtok(features
, ",") : NULL
;
299 /* should be called only once, catch invalid users */
300 assert(!cpu_globals_initialized
);
301 cpu_globals_initialized
= true;
304 val
= strchr(featurestr
, '=');
306 GlobalProperty
*prop
= g_new0(typeof(*prop
), 1);
309 prop
->driver
= typename
;
310 prop
->property
= g_strdup(featurestr
);
311 prop
->value
= g_strdup(val
);
312 qdev_prop_register_global(prop
);
314 error_setg(errp
, "Expected key=value format, found %s.",
318 featurestr
= strtok(NULL
, ",");
322 static void cpu_common_realizefn(DeviceState
*dev
, Error
**errp
)
324 CPUState
*cpu
= CPU(dev
);
325 Object
*machine
= qdev_get_machine();
327 /* qdev_get_machine() can return something that's not TYPE_MACHINE
328 * if this is one of the user-only emulators; in that case there's
329 * no need to check the ignore_memory_transaction_failures board flag.
331 if (object_dynamic_cast(machine
, TYPE_MACHINE
)) {
332 ObjectClass
*oc
= object_get_class(machine
);
333 MachineClass
*mc
= MACHINE_CLASS(oc
);
336 cpu
->ignore_memory_transaction_failures
=
337 mc
->ignore_memory_transaction_failures
;
341 if (dev
->hotplugged
) {
342 cpu_synchronize_post_init(cpu
);
346 /* NOTE: latest generic point where the cpu is fully realized */
347 trace_init_vcpu(cpu
);
350 static void cpu_common_unrealizefn(DeviceState
*dev
)
352 CPUState
*cpu
= CPU(dev
);
353 /* NOTE: latest generic point before the cpu is fully unrealized */
354 trace_fini_vcpu(cpu
);
355 qemu_plugin_vcpu_exit_hook(cpu
);
356 cpu_exec_unrealizefn(cpu
);
359 static void cpu_common_initfn(Object
*obj
)
361 CPUState
*cpu
= CPU(obj
);
362 CPUClass
*cc
= CPU_GET_CLASS(obj
);
364 cpu
->cpu_index
= UNASSIGNED_CPU_INDEX
;
365 cpu
->cluster_index
= UNASSIGNED_CLUSTER_INDEX
;
366 cpu
->gdb_num_regs
= cpu
->gdb_num_g_regs
= cc
->gdb_num_core_regs
;
367 /* *-user doesn't have configurable SMP topology */
368 /* the default value is changed by qemu_init_vcpu() for softmmu */
372 qemu_mutex_init(&cpu
->work_mutex
);
373 QTAILQ_INIT(&cpu
->breakpoints
);
374 QTAILQ_INIT(&cpu
->watchpoints
);
376 cpu_exec_initfn(cpu
);
379 static void cpu_common_finalize(Object
*obj
)
381 CPUState
*cpu
= CPU(obj
);
383 qemu_mutex_destroy(&cpu
->work_mutex
);
386 static int64_t cpu_common_get_arch_id(CPUState
*cpu
)
388 return cpu
->cpu_index
;
391 static vaddr
cpu_adjust_watchpoint_address(CPUState
*cpu
, vaddr addr
, int len
)
396 static void generic_handle_interrupt(CPUState
*cpu
, int mask
)
398 cpu
->interrupt_request
|= mask
;
400 if (!qemu_cpu_is_self(cpu
)) {
405 CPUInterruptHandler cpu_interrupt_handler
= generic_handle_interrupt
;
407 static void cpu_class_init(ObjectClass
*klass
, void *data
)
409 DeviceClass
*dc
= DEVICE_CLASS(klass
);
410 CPUClass
*k
= CPU_CLASS(klass
);
412 k
->parse_features
= cpu_common_parse_features
;
413 k
->get_arch_id
= cpu_common_get_arch_id
;
414 k
->has_work
= cpu_common_has_work
;
415 k
->get_paging_enabled
= cpu_common_get_paging_enabled
;
416 k
->get_memory_mapping
= cpu_common_get_memory_mapping
;
417 k
->write_elf32_qemunote
= cpu_common_write_elf32_qemunote
;
418 k
->write_elf32_note
= cpu_common_write_elf32_note
;
419 k
->write_elf64_qemunote
= cpu_common_write_elf64_qemunote
;
420 k
->write_elf64_note
= cpu_common_write_elf64_note
;
421 k
->gdb_read_register
= cpu_common_gdb_read_register
;
422 k
->gdb_write_register
= cpu_common_gdb_write_register
;
423 k
->virtio_is_big_endian
= cpu_common_virtio_is_big_endian
;
424 k
->debug_excp_handler
= cpu_common_noop
;
425 k
->debug_check_watchpoint
= cpu_common_debug_check_watchpoint
;
426 k
->cpu_exec_enter
= cpu_common_noop
;
427 k
->cpu_exec_exit
= cpu_common_noop
;
428 k
->cpu_exec_interrupt
= cpu_common_exec_interrupt
;
429 k
->adjust_watchpoint_address
= cpu_adjust_watchpoint_address
;
430 set_bit(DEVICE_CATEGORY_CPU
, dc
->categories
);
431 dc
->realize
= cpu_common_realizefn
;
432 dc
->unrealize
= cpu_common_unrealizefn
;
433 dc
->reset
= cpu_common_reset
;
434 device_class_set_props(dc
, cpu_common_props
);
436 * Reason: CPUs still need special care by board code: wiring up
437 * IRQs, adding reset handlers, halting non-first CPUs, ...
439 dc
->user_creatable
= false;
442 static const TypeInfo cpu_type_info
= {
444 .parent
= TYPE_DEVICE
,
445 .instance_size
= sizeof(CPUState
),
446 .instance_init
= cpu_common_initfn
,
447 .instance_finalize
= cpu_common_finalize
,
449 .class_size
= sizeof(CPUClass
),
450 .class_init
= cpu_class_init
,
453 static void cpu_register_types(void)
455 type_register_static(&cpu_type_info
);
458 type_init(cpu_register_types
)