2 * APIC support - common bits of emulated and KVM kernel model
4 * Copyright (c) 2004-2005 Fabrice Bellard
5 * Copyright (c) 2011 Jan Kiszka, Siemens AG
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>
20 #include "qemu/osdep.h"
21 #include "qemu/error-report.h"
22 #include "qapi/error.h"
23 #include "qemu-common.h"
25 #include "qapi/visitor.h"
26 #include "hw/i386/apic.h"
27 #include "hw/i386/apic_internal.h"
29 #include "sysemu/hax.h"
30 #include "sysemu/kvm.h"
32 #include "hw/sysbus.h"
34 static int apic_irq_delivered
;
35 bool apic_report_tpr_access
;
37 void cpu_set_apic_base(DeviceState
*dev
, uint64_t val
)
39 trace_cpu_set_apic_base(val
);
42 APICCommonState
*s
= APIC_COMMON(dev
);
43 APICCommonClass
*info
= APIC_COMMON_GET_CLASS(s
);
44 /* switching to x2APIC, reset possibly modified xAPIC ID */
45 if (!(s
->apicbase
& MSR_IA32_APICBASE_EXTD
) &&
46 (val
& MSR_IA32_APICBASE_EXTD
)) {
47 s
->id
= s
->initial_apic_id
;
49 info
->set_base(s
, val
);
53 uint64_t cpu_get_apic_base(DeviceState
*dev
)
56 APICCommonState
*s
= APIC_COMMON(dev
);
57 trace_cpu_get_apic_base((uint64_t)s
->apicbase
);
60 trace_cpu_get_apic_base(MSR_IA32_APICBASE_BSP
);
61 return MSR_IA32_APICBASE_BSP
;
65 void cpu_set_apic_tpr(DeviceState
*dev
, uint8_t val
)
68 APICCommonClass
*info
;
75 info
= APIC_COMMON_GET_CLASS(s
);
77 info
->set_tpr(s
, val
);
80 uint8_t cpu_get_apic_tpr(DeviceState
*dev
)
83 APICCommonClass
*info
;
90 info
= APIC_COMMON_GET_CLASS(s
);
92 return info
->get_tpr(s
);
95 void apic_enable_tpr_access_reporting(DeviceState
*dev
, bool enable
)
97 APICCommonState
*s
= APIC_COMMON(dev
);
98 APICCommonClass
*info
= APIC_COMMON_GET_CLASS(s
);
100 apic_report_tpr_access
= enable
;
101 if (info
->enable_tpr_reporting
) {
102 info
->enable_tpr_reporting(s
, enable
);
106 void apic_enable_vapic(DeviceState
*dev
, hwaddr paddr
)
108 APICCommonState
*s
= APIC_COMMON(dev
);
109 APICCommonClass
*info
= APIC_COMMON_GET_CLASS(s
);
111 s
->vapic_paddr
= paddr
;
112 info
->vapic_base_update(s
);
115 void apic_handle_tpr_access_report(DeviceState
*dev
, target_ulong ip
,
118 APICCommonState
*s
= APIC_COMMON(dev
);
120 vapic_report_tpr_access(s
->vapic
, CPU(s
->cpu
), ip
, access
);
123 void apic_report_irq_delivered(int delivered
)
125 apic_irq_delivered
+= delivered
;
127 trace_apic_report_irq_delivered(apic_irq_delivered
);
130 void apic_reset_irq_delivered(void)
132 /* Copy this into a local variable to encourage gcc to emit a plain
133 * register for a sys/sdt.h marker. For details on this workaround, see:
134 * https://sourceware.org/bugzilla/show_bug.cgi?id=13296
136 volatile int a_i_d
= apic_irq_delivered
;
137 trace_apic_reset_irq_delivered(a_i_d
);
139 apic_irq_delivered
= 0;
142 int apic_get_irq_delivered(void)
144 trace_apic_get_irq_delivered(apic_irq_delivered
);
146 return apic_irq_delivered
;
149 void apic_deliver_nmi(DeviceState
*dev
)
151 APICCommonState
*s
= APIC_COMMON(dev
);
152 APICCommonClass
*info
= APIC_COMMON_GET_CLASS(s
);
154 info
->external_nmi(s
);
157 bool apic_next_timer(APICCommonState
*s
, int64_t current_time
)
161 /* We need to store the timer state separately to support APIC
162 * implementations that maintain a non-QEMU timer, e.g. inside the
163 * host kernel. This open-coded state allows us to migrate between
165 s
->timer_expiry
= -1;
167 if (s
->lvt
[APIC_LVT_TIMER
] & APIC_LVT_MASKED
) {
171 d
= (current_time
- s
->initial_count_load_time
) >> s
->count_shift
;
173 if (s
->lvt
[APIC_LVT_TIMER
] & APIC_LVT_TIMER_PERIODIC
) {
174 if (!s
->initial_count
) {
177 d
= ((d
/ ((uint64_t)s
->initial_count
+ 1)) + 1) *
178 ((uint64_t)s
->initial_count
+ 1);
180 if (d
>= s
->initial_count
) {
183 d
= (uint64_t)s
->initial_count
+ 1;
185 s
->next_time
= s
->initial_count_load_time
+ (d
<< s
->count_shift
);
186 s
->timer_expiry
= s
->next_time
;
190 void apic_init_reset(DeviceState
*dev
)
193 APICCommonClass
*info
;
199 s
= APIC_COMMON(dev
);
201 s
->spurious_vec
= 0xff;
204 memset(s
->isr
, 0, sizeof(s
->isr
));
205 memset(s
->tmr
, 0, sizeof(s
->tmr
));
206 memset(s
->irr
, 0, sizeof(s
->irr
));
207 for (i
= 0; i
< APIC_LVT_NB
; i
++) {
208 s
->lvt
[i
] = APIC_LVT_MASKED
;
211 memset(s
->icr
, 0, sizeof(s
->icr
));
214 s
->initial_count
= 0;
215 s
->initial_count_load_time
= 0;
217 s
->wait_for_sipi
= !cpu_is_bsp(s
->cpu
);
222 s
->timer_expiry
= -1;
224 info
= APIC_COMMON_GET_CLASS(s
);
230 void apic_designate_bsp(DeviceState
*dev
, bool bsp
)
236 APICCommonState
*s
= APIC_COMMON(dev
);
238 s
->apicbase
|= MSR_IA32_APICBASE_BSP
;
240 s
->apicbase
&= ~MSR_IA32_APICBASE_BSP
;
244 static void apic_reset_common(DeviceState
*dev
)
246 APICCommonState
*s
= APIC_COMMON(dev
);
247 APICCommonClass
*info
= APIC_COMMON_GET_CLASS(s
);
250 bsp
= s
->apicbase
& MSR_IA32_APICBASE_BSP
;
251 s
->apicbase
= APIC_DEFAULT_ADDRESS
| bsp
| MSR_IA32_APICBASE_ENABLE
;
252 s
->id
= s
->initial_apic_id
;
255 info
->vapic_base_update(s
);
257 apic_init_reset(dev
);
260 /* This function is only used for old state version 1 and 2 */
261 static int apic_load_old(QEMUFile
*f
, void *opaque
, int version_id
)
263 APICCommonState
*s
= opaque
;
264 APICCommonClass
*info
= APIC_COMMON_GET_CLASS(s
);
267 if (version_id
> 2) {
271 /* XXX: what if the base changes? (registered memory regions) */
272 qemu_get_be32s(f
, &s
->apicbase
);
273 qemu_get_8s(f
, &s
->id
);
274 qemu_get_8s(f
, &s
->arb_id
);
275 qemu_get_8s(f
, &s
->tpr
);
276 qemu_get_be32s(f
, &s
->spurious_vec
);
277 qemu_get_8s(f
, &s
->log_dest
);
278 qemu_get_8s(f
, &s
->dest_mode
);
279 for (i
= 0; i
< 8; i
++) {
280 qemu_get_be32s(f
, &s
->isr
[i
]);
281 qemu_get_be32s(f
, &s
->tmr
[i
]);
282 qemu_get_be32s(f
, &s
->irr
[i
]);
284 for (i
= 0; i
< APIC_LVT_NB
; i
++) {
285 qemu_get_be32s(f
, &s
->lvt
[i
]);
287 qemu_get_be32s(f
, &s
->esr
);
288 qemu_get_be32s(f
, &s
->icr
[0]);
289 qemu_get_be32s(f
, &s
->icr
[1]);
290 qemu_get_be32s(f
, &s
->divide_conf
);
291 s
->count_shift
= qemu_get_be32(f
);
292 qemu_get_be32s(f
, &s
->initial_count
);
293 s
->initial_count_load_time
= qemu_get_be64(f
);
294 s
->next_time
= qemu_get_be64(f
);
296 if (version_id
>= 2) {
297 s
->timer_expiry
= qemu_get_be64(f
);
300 if (info
->post_load
) {
306 static const VMStateDescription vmstate_apic_common
;
308 static void apic_common_realize(DeviceState
*dev
, Error
**errp
)
310 APICCommonState
*s
= APIC_COMMON(dev
);
311 APICCommonClass
*info
;
312 static DeviceState
*vapic
;
313 int instance_id
= s
->id
;
315 info
= APIC_COMMON_GET_CLASS(s
);
316 info
->realize(dev
, errp
);
318 /* Note: We need at least 1M to map the VAPIC option ROM */
319 if (!vapic
&& s
->vapic_control
& VAPIC_ENABLE_MASK
&&
320 !hax_enabled() && ram_size
>= 1024 * 1024) {
321 vapic
= sysbus_create_simple("kvmvapic", -1, NULL
);
324 if (apic_report_tpr_access
&& info
->enable_tpr_reporting
) {
325 info
->enable_tpr_reporting(s
, true);
328 if (s
->legacy_instance_id
) {
331 vmstate_register_with_alias_id(NULL
, instance_id
, &vmstate_apic_common
,
335 static void apic_common_unrealize(DeviceState
*dev
, Error
**errp
)
337 APICCommonState
*s
= APIC_COMMON(dev
);
338 APICCommonClass
*info
= APIC_COMMON_GET_CLASS(s
);
340 vmstate_unregister(NULL
, &vmstate_apic_common
, s
);
341 info
->unrealize(dev
, errp
);
343 if (apic_report_tpr_access
&& info
->enable_tpr_reporting
) {
344 info
->enable_tpr_reporting(s
, false);
348 static int apic_pre_load(void *opaque
)
350 APICCommonState
*s
= APIC_COMMON(opaque
);
352 /* The default is !cpu_is_bsp(s->cpu), but the common value is 0
353 * so that's what apic_common_sipi_needed checks for. Reset to
354 * the value that is assumed when the apic_sipi subsection is
357 s
->wait_for_sipi
= 0;
361 static void apic_dispatch_pre_save(void *opaque
)
363 APICCommonState
*s
= APIC_COMMON(opaque
);
364 APICCommonClass
*info
= APIC_COMMON_GET_CLASS(s
);
366 if (info
->pre_save
) {
371 static int apic_dispatch_post_load(void *opaque
, int version_id
)
373 APICCommonState
*s
= APIC_COMMON(opaque
);
374 APICCommonClass
*info
= APIC_COMMON_GET_CLASS(s
);
376 if (info
->post_load
) {
382 static bool apic_common_sipi_needed(void *opaque
)
384 APICCommonState
*s
= APIC_COMMON(opaque
);
385 return s
->wait_for_sipi
!= 0;
388 static const VMStateDescription vmstate_apic_common_sipi
= {
391 .minimum_version_id
= 1,
392 .needed
= apic_common_sipi_needed
,
393 .fields
= (VMStateField
[]) {
394 VMSTATE_INT32(sipi_vector
, APICCommonState
),
395 VMSTATE_INT32(wait_for_sipi
, APICCommonState
),
396 VMSTATE_END_OF_LIST()
400 static const VMStateDescription vmstate_apic_common
= {
403 .minimum_version_id
= 3,
404 .minimum_version_id_old
= 1,
405 .load_state_old
= apic_load_old
,
406 .pre_load
= apic_pre_load
,
407 .pre_save
= apic_dispatch_pre_save
,
408 .post_load
= apic_dispatch_post_load
,
409 .fields
= (VMStateField
[]) {
410 VMSTATE_UINT32(apicbase
, APICCommonState
),
411 VMSTATE_UINT8(id
, APICCommonState
),
412 VMSTATE_UINT8(arb_id
, APICCommonState
),
413 VMSTATE_UINT8(tpr
, APICCommonState
),
414 VMSTATE_UINT32(spurious_vec
, APICCommonState
),
415 VMSTATE_UINT8(log_dest
, APICCommonState
),
416 VMSTATE_UINT8(dest_mode
, APICCommonState
),
417 VMSTATE_UINT32_ARRAY(isr
, APICCommonState
, 8),
418 VMSTATE_UINT32_ARRAY(tmr
, APICCommonState
, 8),
419 VMSTATE_UINT32_ARRAY(irr
, APICCommonState
, 8),
420 VMSTATE_UINT32_ARRAY(lvt
, APICCommonState
, APIC_LVT_NB
),
421 VMSTATE_UINT32(esr
, APICCommonState
),
422 VMSTATE_UINT32_ARRAY(icr
, APICCommonState
, 2),
423 VMSTATE_UINT32(divide_conf
, APICCommonState
),
424 VMSTATE_INT32(count_shift
, APICCommonState
),
425 VMSTATE_UINT32(initial_count
, APICCommonState
),
426 VMSTATE_INT64(initial_count_load_time
, APICCommonState
),
427 VMSTATE_INT64(next_time
, APICCommonState
),
428 VMSTATE_INT64(timer_expiry
,
429 APICCommonState
), /* open-coded timer state */
430 VMSTATE_END_OF_LIST()
432 .subsections
= (const VMStateDescription
*[]) {
433 &vmstate_apic_common_sipi
,
438 static Property apic_properties_common
[] = {
439 DEFINE_PROP_UINT8("version", APICCommonState
, version
, 0x14),
440 DEFINE_PROP_BIT("vapic", APICCommonState
, vapic_control
, VAPIC_ENABLE_BIT
,
442 DEFINE_PROP_BOOL("legacy-instance-id", APICCommonState
, legacy_instance_id
,
444 DEFINE_PROP_END_OF_LIST(),
447 static void apic_common_get_id(Object
*obj
, Visitor
*v
, const char *name
,
448 void *opaque
, Error
**errp
)
450 APICCommonState
*s
= APIC_COMMON(obj
);
453 value
= s
->apicbase
& MSR_IA32_APICBASE_EXTD
? s
->initial_apic_id
: s
->id
;
454 visit_type_int(v
, name
, &value
, errp
);
457 static void apic_common_set_id(Object
*obj
, Visitor
*v
, const char *name
,
458 void *opaque
, Error
**errp
)
460 APICCommonState
*s
= APIC_COMMON(obj
);
461 DeviceState
*dev
= DEVICE(obj
);
462 Error
*local_err
= NULL
;
466 qdev_prop_set_after_realize(dev
, name
, errp
);
470 visit_type_int(v
, name
, &value
, &local_err
);
472 error_propagate(errp
, local_err
);
476 s
->initial_apic_id
= value
;
477 s
->id
= (uint8_t)value
;
480 static void apic_common_initfn(Object
*obj
)
482 APICCommonState
*s
= APIC_COMMON(obj
);
484 s
->id
= s
->initial_apic_id
= -1;
485 object_property_add(obj
, "id", "int",
487 apic_common_set_id
, NULL
, NULL
, NULL
);
490 static void apic_common_class_init(ObjectClass
*klass
, void *data
)
492 DeviceClass
*dc
= DEVICE_CLASS(klass
);
494 dc
->reset
= apic_reset_common
;
495 dc
->props
= apic_properties_common
;
496 dc
->realize
= apic_common_realize
;
497 dc
->unrealize
= apic_common_unrealize
;
499 * Reason: APIC and CPU need to be wired up by
500 * x86_cpu_apic_create()
502 dc
->cannot_instantiate_with_device_add_yet
= true;
505 static const TypeInfo apic_common_type
= {
506 .name
= TYPE_APIC_COMMON
,
507 .parent
= TYPE_DEVICE
,
508 .instance_size
= sizeof(APICCommonState
),
509 .instance_init
= apic_common_initfn
,
510 .class_size
= sizeof(APICCommonClass
),
511 .class_init
= apic_common_class_init
,
515 static void apic_common_register_types(void)
517 type_register_static(&apic_common_type
);
520 type_init(apic_common_register_types
)