2 * PowerPC gdb server stub
4 * Copyright (c) 2003-2005 Fabrice Bellard
5 * Copyright (c) 2013 SUSE LINUX Products GmbH
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
23 #include "exec/gdbstub.h"
25 static int ppc_gdb_register_len_apple(int n
)
36 case 64 + 32: /* nip */
37 case 65 + 32: /* msr */
38 case 67 + 32: /* lr */
39 case 68 + 32: /* ctr */
40 case 70 + 32: /* fpscr */
42 case 66 + 32: /* cr */
43 case 69 + 32: /* xer */
50 static int ppc_gdb_register_len(int n
)
55 return sizeof(target_ulong
);
75 return sizeof(target_ulong
);
81 return sizeof(target_ulong
);
88 * We need to present the registers to gdb in the "current" memory
89 * ordering. For user-only mode we get this for free;
90 * TARGET_WORDS_BIGENDIAN is set to the proper ordering for the
91 * binary, and cannot be changed. For system mode,
92 * TARGET_WORDS_BIGENDIAN is always set, and we must check the current
93 * mode of the chip to see if we're running in little-endian.
95 void ppc_maybe_bswap_register(CPUPPCState
*env
, uint8_t *mem_buf
, int len
)
97 #ifndef CONFIG_USER_ONLY
100 } else if (len
== 4) {
101 bswap32s((uint32_t *)mem_buf
);
102 } else if (len
== 8) {
103 bswap64s((uint64_t *)mem_buf
);
105 g_assert_not_reached();
111 * Old gdb always expects FP registers. Newer (xml-aware) gdb only
112 * expects whatever the target description contains. Due to a
113 * historical mishap the FP registers appear in between core integer
114 * regs and PC, MSR, CR, and so forth. We hack round this by giving
115 * the FP regs zero size when talking to a newer gdb.
118 int ppc_cpu_gdb_read_register(CPUState
*cs
, uint8_t *mem_buf
, int n
)
120 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
121 CPUPPCState
*env
= &cpu
->env
;
122 int r
= ppc_gdb_register_len(n
);
130 gdb_get_regl(mem_buf
, env
->gpr
[n
]);
133 stfq_p(mem_buf
, *cpu_fpr_ptr(env
, n
- 32));
137 gdb_get_regl(mem_buf
, env
->nip
);
140 gdb_get_regl(mem_buf
, env
->msr
);
146 for (i
= 0; i
< 8; i
++) {
147 cr
|= env
->crf
[i
] << (32 - ((i
+ 1) * 4));
149 gdb_get_reg32(mem_buf
, cr
);
153 gdb_get_regl(mem_buf
, env
->lr
);
156 gdb_get_regl(mem_buf
, env
->ctr
);
159 gdb_get_reg32(mem_buf
, env
->xer
);
162 gdb_get_reg32(mem_buf
, env
->fpscr
);
166 ppc_maybe_bswap_register(env
, mem_buf
, r
);
170 int ppc_cpu_gdb_read_register_apple(CPUState
*cs
, uint8_t *mem_buf
, int n
)
172 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
173 CPUPPCState
*env
= &cpu
->env
;
174 int r
= ppc_gdb_register_len_apple(n
);
182 gdb_get_reg64(mem_buf
, env
->gpr
[n
]);
185 stfq_p(mem_buf
, *cpu_fpr_ptr(env
, n
- 32));
188 stq_p(mem_buf
, n
- 64);
189 stq_p(mem_buf
+ 8, 0);
193 gdb_get_reg64(mem_buf
, env
->nip
);
196 gdb_get_reg64(mem_buf
, env
->msr
);
202 for (i
= 0; i
< 8; i
++) {
203 cr
|= env
->crf
[i
] << (32 - ((i
+ 1) * 4));
205 gdb_get_reg32(mem_buf
, cr
);
209 gdb_get_reg64(mem_buf
, env
->lr
);
212 gdb_get_reg64(mem_buf
, env
->ctr
);
215 gdb_get_reg32(mem_buf
, env
->xer
);
218 gdb_get_reg64(mem_buf
, env
->fpscr
);
222 ppc_maybe_bswap_register(env
, mem_buf
, r
);
226 int ppc_cpu_gdb_write_register(CPUState
*cs
, uint8_t *mem_buf
, int n
)
228 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
229 CPUPPCState
*env
= &cpu
->env
;
230 int r
= ppc_gdb_register_len(n
);
235 ppc_maybe_bswap_register(env
, mem_buf
, r
);
238 env
->gpr
[n
] = ldtul_p(mem_buf
);
241 *cpu_fpr_ptr(env
, n
- 32) = ldfq_p(mem_buf
);
245 env
->nip
= ldtul_p(mem_buf
);
248 ppc_store_msr(env
, ldtul_p(mem_buf
));
252 uint32_t cr
= ldl_p(mem_buf
);
254 for (i
= 0; i
< 8; i
++) {
255 env
->crf
[i
] = (cr
>> (32 - ((i
+ 1) * 4))) & 0xF;
260 env
->lr
= ldtul_p(mem_buf
);
263 env
->ctr
= ldtul_p(mem_buf
);
266 env
->xer
= ldl_p(mem_buf
);
270 store_fpscr(env
, ldtul_p(mem_buf
), 0xffffffff);
276 int ppc_cpu_gdb_write_register_apple(CPUState
*cs
, uint8_t *mem_buf
, int n
)
278 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
279 CPUPPCState
*env
= &cpu
->env
;
280 int r
= ppc_gdb_register_len_apple(n
);
285 ppc_maybe_bswap_register(env
, mem_buf
, r
);
288 env
->gpr
[n
] = ldq_p(mem_buf
);
291 *cpu_fpr_ptr(env
, n
- 32) = ldfq_p(mem_buf
);
295 env
->nip
= ldq_p(mem_buf
);
298 ppc_store_msr(env
, ldq_p(mem_buf
));
302 uint32_t cr
= ldl_p(mem_buf
);
304 for (i
= 0; i
< 8; i
++) {
305 env
->crf
[i
] = (cr
>> (32 - ((i
+ 1) * 4))) & 0xF;
310 env
->lr
= ldq_p(mem_buf
);
313 env
->ctr
= ldq_p(mem_buf
);
316 env
->xer
= ldl_p(mem_buf
);
320 store_fpscr(env
, ldq_p(mem_buf
), 0xffffffff);
327 #ifndef CONFIG_USER_ONLY
328 void ppc_gdb_gen_spr_xml(PowerPCCPU
*cpu
)
330 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cpu
);
331 CPUPPCState
*env
= &cpu
->env
;
334 unsigned int num_regs
= 0;
337 if (pcc
->gdb_spr_xml
) {
341 xml
= g_string_new("<?xml version=\"1.0\"?>");
342 g_string_append(xml
, "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">");
343 g_string_append(xml
, "<feature name=\"org.qemu.power.spr\">");
345 for (i
= 0; i
< ARRAY_SIZE(env
->spr_cb
); i
++) {
346 ppc_spr_t
*spr
= &env
->spr_cb
[i
];
352 spr_name
= g_ascii_strdown(spr
->name
, -1);
353 g_string_append_printf(xml
, "<reg name=\"%s\"", spr_name
);
356 g_string_append_printf(xml
, " bitsize=\"%d\"", TARGET_LONG_BITS
);
357 g_string_append(xml
, " group=\"spr\"/>");
360 * GDB identifies registers based on the order they are
361 * presented in the XML. These ids will not match QEMU's
362 * representation (which follows the PowerISA).
364 * Store the position of the current register description so
365 * we can make the correspondence later.
367 spr
->gdb_id
= num_regs
;
371 g_string_append(xml
, "</feature>");
373 pcc
->gdb_num_sprs
= num_regs
;
374 pcc
->gdb_spr_xml
= g_string_free(xml
, false);
377 const char *ppc_gdb_get_dynamic_xml(CPUState
*cs
, const char *xml_name
)
379 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
381 if (strcmp(xml_name
, "power-spr.xml") == 0) {
382 return pcc
->gdb_spr_xml
;