2 * Model of Xilinx Virtex5 ML507 PPC-440 refdesign.
4 * Copyright (c) 2010 Edgar E. Iglesias.
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "hw/sysbus.h"
27 #include "hw/char/serial.h"
28 #include "hw/block/flash.h"
29 #include "sysemu/sysemu.h"
30 #include "hw/devices.h"
31 #include "hw/boards.h"
32 #include "sysemu/device_tree.h"
33 #include "hw/loader.h"
36 #include "exec/address-spaces.h"
38 #include "hw/ppc/ppc.h"
39 #include "hw/ppc/ppc4xx.h"
42 #include "sysemu/block-backend.h"
43 #include "qapi/qmp/qerror.h"
45 #define EPAPR_MAGIC (0x45504150)
46 #define FLASH_SIZE (16 * 1024 * 1024)
48 #define INTC_BASEADDR 0x81800000
49 #define UART16550_BASEADDR 0x83e01003
50 #define TIMER_BASEADDR 0x83c00000
51 #define PFLASH_BASEADDR 0xfc000000
54 #define UART16550_IRQ 9
56 static struct boot_info
58 uint32_t bootstrap_pc
;
65 /* Create reset TLB entries for BookE, spanning the 32bit addr space. */
66 static void mmubooke_create_initial_mapping(CPUPPCState
*env
,
70 ppcemb_tlb_t
*tlb
= &env
->tlb
.tlbe
[0];
73 tlb
->prot
= PAGE_VALID
| ((PAGE_READ
| PAGE_WRITE
| PAGE_EXEC
) << 4);
74 tlb
->size
= 1U << 31; /* up to 0x80000000 */
75 tlb
->EPN
= va
& TARGET_PAGE_MASK
;
76 tlb
->RPN
= pa
& TARGET_PAGE_MASK
;
79 tlb
= &env
->tlb
.tlbe
[1];
81 tlb
->prot
= PAGE_VALID
| ((PAGE_READ
| PAGE_WRITE
| PAGE_EXEC
) << 4);
82 tlb
->size
= 1U << 31; /* up to 0xffffffff */
83 tlb
->EPN
= 0x80000000 & TARGET_PAGE_MASK
;
84 tlb
->RPN
= 0x80000000 & TARGET_PAGE_MASK
;
88 static PowerPCCPU
*ppc440_init_xilinx(ram_addr_t
*ram_size
,
90 const char *cpu_model
,
97 cpu
= cpu_ppc_init(cpu_model
);
99 fprintf(stderr
, "Unable to initialize CPU!\n");
104 ppc_booke_timers_init(cpu
, sysclk
, 0/* no flags */);
106 ppc_dcr_init(env
, NULL
, NULL
);
108 /* interrupt controller */
109 irqs
= g_malloc0(sizeof(qemu_irq
) * PPCUIC_OUTPUT_NB
);
110 irqs
[PPCUIC_OUTPUT_INT
] = ((qemu_irq
*)env
->irq_inputs
)[PPC40x_INPUT_INT
];
111 irqs
[PPCUIC_OUTPUT_CINT
] = ((qemu_irq
*)env
->irq_inputs
)[PPC40x_INPUT_CINT
];
112 ppcuic_init(env
, irqs
, 0x0C0, 0, 1);
116 static void main_cpu_reset(void *opaque
)
118 PowerPCCPU
*cpu
= opaque
;
119 CPUPPCState
*env
= &cpu
->env
;
120 struct boot_info
*bi
= env
->load_info
;
123 /* Linux Kernel Parameters (passing device tree):
124 * r3: pointer to the fdt
128 * r7: size of IMA in bytes
132 env
->gpr
[1] = (16<<20) - 8;
133 /* Provide a device-tree. */
134 env
->gpr
[3] = bi
->fdt
;
135 env
->nip
= bi
->bootstrap_pc
;
137 /* Create a mapping for the kernel. */
138 mmubooke_create_initial_mapping(env
, 0, 0);
139 env
->gpr
[6] = tswap32(EPAPR_MAGIC
);
140 env
->gpr
[7] = bi
->ima_size
;
143 #define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb"
144 static int xilinx_load_device_tree(hwaddr addr
,
148 const char *kernel_cmdline
)
154 const char *dtb_filename
;
156 dtb_filename
= qemu_opt_get(qemu_get_machine_opts(), "dtb");
158 fdt
= load_device_tree(dtb_filename
, &fdt_size
);
160 error_report("Error while loading device tree file '%s'",
164 /* Try the local "ppc.dtb" override. */
165 fdt
= load_device_tree("ppc.dtb", &fdt_size
);
167 path
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, BINARY_DEVICE_TREE_FILE
);
169 fdt
= load_device_tree(path
, &fdt_size
);
178 r
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-start",
181 error_report("couldn't set /chosen/linux,initrd-start");
184 r
= qemu_fdt_setprop_cell(fdt
, "/chosen", "linux,initrd-end",
185 (initrd_base
+ initrd_size
));
187 error_report("couldn't set /chosen/linux,initrd-end");
190 r
= qemu_fdt_setprop_string(fdt
, "/chosen", "bootargs", kernel_cmdline
);
192 fprintf(stderr
, "couldn't set /chosen/bootargs\n");
193 cpu_physical_memory_write(addr
, fdt
, fdt_size
);
197 static void virtex_init(MachineState
*machine
)
199 ram_addr_t ram_size
= machine
->ram_size
;
200 const char *cpu_model
= machine
->cpu_model
;
201 const char *kernel_filename
= machine
->kernel_filename
;
202 const char *kernel_cmdline
= machine
->kernel_cmdline
;
203 hwaddr initrd_base
= 0;
205 MemoryRegion
*address_space_mem
= get_system_memory();
211 MemoryRegion
*phys_ram
= g_new(MemoryRegion
, 1);
212 qemu_irq irq
[32], *cpu_irq
;
217 if (cpu_model
== NULL
) {
218 cpu_model
= "440-Xilinx";
221 cpu
= ppc440_init_xilinx(&ram_size
, 1, cpu_model
, 400000000);
223 qemu_register_reset(main_cpu_reset
, cpu
);
225 memory_region_allocate_system_memory(phys_ram
, NULL
, "ram", ram_size
);
226 memory_region_add_subregion(address_space_mem
, ram_base
, phys_ram
);
228 dinfo
= drive_get(IF_PFLASH
, 0, 0);
229 pflash_cfi01_register(PFLASH_BASEADDR
, NULL
, "virtex.flash", FLASH_SIZE
,
230 dinfo
? blk_by_legacy_dinfo(dinfo
) : NULL
,
231 (64 * 1024), FLASH_SIZE
>> 16,
232 1, 0x89, 0x18, 0x0000, 0x0, 1);
234 cpu_irq
= (qemu_irq
*) &env
->irq_inputs
[PPC40x_INPUT_INT
];
235 dev
= qdev_create(NULL
, "xlnx.xps-intc");
236 qdev_prop_set_uint32(dev
, "kind-of-intr", 0);
237 qdev_init_nofail(dev
);
238 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, INTC_BASEADDR
);
239 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, cpu_irq
[0]);
240 for (i
= 0; i
< 32; i
++) {
241 irq
[i
] = qdev_get_gpio_in(dev
, i
);
244 serial_mm_init(address_space_mem
, UART16550_BASEADDR
, 2, irq
[UART16550_IRQ
],
245 115200, serial_hds
[0], DEVICE_LITTLE_ENDIAN
);
247 /* 2 timers at irq 2 @ 62 Mhz. */
248 dev
= qdev_create(NULL
, "xlnx.xps-timer");
249 qdev_prop_set_uint32(dev
, "one-timer-only", 0);
250 qdev_prop_set_uint32(dev
, "clock-frequency", 62 * 1000000);
251 qdev_init_nofail(dev
);
252 sysbus_mmio_map(SYS_BUS_DEVICE(dev
), 0, TIMER_BASEADDR
);
253 sysbus_connect_irq(SYS_BUS_DEVICE(dev
), 0, irq
[TIMER_IRQ
]);
255 if (kernel_filename
) {
256 uint64_t entry
, low
, high
;
259 /* Boots a kernel elf binary. */
260 kernel_size
= load_elf(kernel_filename
, NULL
, NULL
,
261 &entry
, &low
, &high
, 1, ELF_MACHINE
, 0);
262 boot_info
.bootstrap_pc
= entry
& 0x00ffffff;
264 if (kernel_size
< 0) {
265 boot_offset
= 0x1200000;
266 /* If we failed loading ELF's try a raw image. */
267 kernel_size
= load_image_targphys(kernel_filename
,
270 boot_info
.bootstrap_pc
= boot_offset
;
271 high
= boot_info
.bootstrap_pc
+ kernel_size
+ 8192;
274 boot_info
.ima_size
= kernel_size
;
277 if (machine
->initrd_filename
) {
278 initrd_base
= high
= ROUND_UP(high
, 4);
279 initrd_size
= load_image_targphys(machine
->initrd_filename
,
280 high
, ram_size
- high
);
282 if (initrd_size
< 0) {
283 error_report("couldn't load ram disk '%s'",
284 machine
->initrd_filename
);
287 high
= ROUND_UP(high
+ initrd_size
, 4);
290 /* Provide a device-tree. */
291 boot_info
.fdt
= high
+ (8192 * 2);
292 boot_info
.fdt
&= ~8191;
294 xilinx_load_device_tree(boot_info
.fdt
, ram_size
,
295 initrd_base
, initrd_size
,
298 env
->load_info
= &boot_info
;
301 static QEMUMachine virtex_machine
= {
302 .name
= "virtex-ml507",
303 .desc
= "Xilinx Virtex ML507 reference design",
307 static void virtex_machine_init(void)
309 qemu_register_machine(&virtex_machine
);
312 machine_init(virtex_machine_init
);