hw/ppc/virtex_ml507.c

   1 /*
   2  * Model of Xilinx Virtex5 ML507 PPC-440 refdesign.
   3  *
   4  * Copyright (c) 2010 Edgar E. Iglesias.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "qemu/datadir.h"
  27 #include "qemu/units.h"
  28 #include "cpu.h"
  29 #include "hw/sysbus.h"
  30 #include "hw/char/serial.h"
  31 #include "hw/block/flash.h"
  32 #include "sysemu/sysemu.h"
  33 #include "sysemu/reset.h"
  34 #include "hw/boards.h"
  35 #include "sysemu/device_tree.h"
  36 #include "hw/loader.h"
  37 #include "elf.h"
  38 #include "qapi/error.h"
  39 #include "qemu/error-report.h"
  40 #include "qemu/option.h"
  41
  42 #include "hw/intc/ppc-uic.h"
  43 #include "hw/ppc/ppc.h"
  44 #include "hw/ppc/ppc4xx.h"
  45 #include "hw/qdev-properties.h"
  46
  47 #include <libfdt.h>
  48
  49 #define EPAPR_MAGIC    (0x45504150)
  50 #define FLASH_SIZE     (16 * MiB)
  51
  52 #define INTC_BASEADDR       0x81800000
  53 #define UART16550_BASEADDR  0x83e01003
  54 #define TIMER_BASEADDR      0x83c00000
  55 #define PFLASH_BASEADDR     0xfc000000
  56
  57 #define TIMER_IRQ           3
  58 #define UART16550_IRQ       9
  59
  60 static struct boot_info
  61 {
  62     uint32_t bootstrap_pc;
  63     uint32_t cmdline;
  64     uint32_t fdt;
  65     uint32_t ima_size;
  66     void *vfdt;
  67 } boot_info;
  68
  69 /* Create reset TLB entries for BookE, spanning the 32bit addr space.  */
  70 static void mmubooke_create_initial_mapping(CPUPPCState *env,
  71                                      target_ulong va,
  72                                      hwaddr pa)
  73 {
  74     ppcemb_tlb_t *tlb = &env->tlb.tlbe[0];
  75
  76     tlb->attr = 0;
  77     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
  78     tlb->size = 1U << 31; /* up to 0x80000000  */
  79     tlb->EPN = va & TARGET_PAGE_MASK;
  80     tlb->RPN = pa & TARGET_PAGE_MASK;
  81     tlb->PID = 0;
  82
  83     tlb = &env->tlb.tlbe[1];
  84     tlb->attr = 0;
  85     tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4);
  86     tlb->size = 1U << 31; /* up to 0xffffffff  */
  87     tlb->EPN = 0x80000000 & TARGET_PAGE_MASK;
  88     tlb->RPN = 0x80000000 & TARGET_PAGE_MASK;
  89     tlb->PID = 0;
  90 }
  91
  92 static PowerPCCPU *ppc440_init_xilinx(const char *cpu_type, uint32_t sysclk)
  93 {
  94     PowerPCCPU *cpu;
  95     CPUPPCState *env;
  96     DeviceState *uicdev;
  97     SysBusDevice *uicsbd;
  98
  99     cpu = POWERPC_CPU(cpu_create(cpu_type));
 100     env = &cpu->env;
 101
 102     ppc_booke_timers_init(cpu, sysclk, 0/* no flags */);
 103
 104     ppc_dcr_init(env, NULL, NULL);
 105
 106     /* interrupt controller */
 107     uicdev = qdev_new(TYPE_PPC_UIC);
 108     ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uicdev), cpu, &error_fatal);
 109     object_unref(OBJECT(uicdev));
 110     uicsbd = SYS_BUS_DEVICE(uicdev);
 111     sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT,
 112                        qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT));
 113     sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT,
 114                        qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT));
 115
 116     /* This board doesn't wire anything up to the inputs of the UIC. */
 117     return cpu;
 118 }
 119
 120 static void main_cpu_reset(void *opaque)
 121 {
 122     PowerPCCPU *cpu = opaque;
 123     CPUPPCState *env = &cpu->env;
 124     struct boot_info *bi = env->load_info;
 125
 126     cpu_reset(CPU(cpu));
 127     /* Linux Kernel Parameters (passing device tree):
 128        *   r3: pointer to the fdt
 129        *   r4: 0
 130        *   r5: 0
 131        *   r6: epapr magic
 132        *   r7: size of IMA in bytes
 133        *   r8: 0
 134        *   r9: 0
 135     */
 136     env->gpr[1] = (16 * MiB) - 8;
 137     /* Provide a device-tree.  */
 138     env->gpr[3] = bi->fdt;
 139     env->nip = bi->bootstrap_pc;
 140
 141     /* Create a mapping for the kernel.  */
 142     mmubooke_create_initial_mapping(env, 0, 0);
 143     env->gpr[6] = tswap32(EPAPR_MAGIC);
 144     env->gpr[7] = bi->ima_size;
 145 }
 146
 147 #define BINARY_DEVICE_TREE_FILE "virtex-ml507.dtb"
 148 static int xilinx_load_device_tree(MachineState *machine,
 149                                    hwaddr addr,
 150                                    hwaddr initrd_base,
 151                                    hwaddr initrd_size)
 152 {
 153     char *path;
 154     int fdt_size;
 155     void *fdt = NULL;
 156     int r;
 157     const char *dtb_filename;
 158
 159     dtb_filename = machine->dtb;
 160     if (dtb_filename) {
 161         fdt = load_device_tree(dtb_filename, &fdt_size);
 162         if (!fdt) {
 163             error_report("Error while loading device tree file '%s'",
 164                 dtb_filename);
 165         }
 166     } else {
 167         /* Try the local "ppc.dtb" override.  */
 168         fdt = load_device_tree("ppc.dtb", &fdt_size);
 169         if (!fdt) {
 170             path = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
 171             if (path) {
 172                 fdt = load_device_tree(path, &fdt_size);
 173                 g_free(path);
 174             }
 175         }
 176     }
 177     if (!fdt) {
 178         return 0;
 179     }
 180
 181     r = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start",
 182                               initrd_base);
 183     if (r < 0) {
 184         error_report("couldn't set /chosen/linux,initrd-start");
 185     }
 186
 187     r = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end",
 188                               (initrd_base + initrd_size));
 189     if (r < 0) {
 190         error_report("couldn't set /chosen/linux,initrd-end");
 191     }
 192
 193     r = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
 194                                 machine->kernel_cmdline);
 195     if (r < 0)
 196         fprintf(stderr, "couldn't set /chosen/bootargs\n");
 197     cpu_physical_memory_write(addr, fdt, fdt_size);
 198
 199     /* Set machine->fdt for 'dumpdtb' QMP/HMP command */
 200     machine->fdt = fdt;
 201
 202     return fdt_size;
 203 }
 204
 205 static void virtex_init(MachineState *machine)
 206 {
 207     const char *kernel_filename = machine->kernel_filename;
 208     hwaddr initrd_base = 0;
 209     int initrd_size = 0;
 210     MemoryRegion *address_space_mem = get_system_memory();
 211     DeviceState *dev;
 212     PowerPCCPU *cpu;
 213     CPUPPCState *env;
 214     hwaddr ram_base = 0;
 215     DriveInfo *dinfo;
 216     qemu_irq irq[32], cpu_irq;
 217     int kernel_size;
 218     int i;
 219
 220     /* init CPUs */
 221     cpu = ppc440_init_xilinx(machine->cpu_type, 400000000);
 222     env = &cpu->env;
 223
 224     if (env->mmu_model != POWERPC_MMU_BOOKE) {
 225         error_report("MMU model %i not supported by this machine",
 226                      env->mmu_model);
 227         exit(1);
 228     }
 229
 230     qemu_register_reset(main_cpu_reset, cpu);
 231
 232     memory_region_add_subregion(address_space_mem, ram_base, machine->ram);
 233
 234     dinfo = drive_get(IF_PFLASH, 0, 0);
 235     pflash_cfi01_register(PFLASH_BASEADDR, "virtex.flash", FLASH_SIZE,
 236                           dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
 237                           64 * KiB, 1, 0x89, 0x18, 0x0000, 0x0, 1);
 238
 239     cpu_irq = qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT);
 240     dev = qdev_new("xlnx.xps-intc");
 241     qdev_prop_set_uint32(dev, "kind-of-intr", 0);
 242     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 243     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
 244     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irq);
 245     for (i = 0; i < 32; i++) {
 246         irq[i] = qdev_get_gpio_in(dev, i);
 247     }
 248
 249     serial_mm_init(address_space_mem, UART16550_BASEADDR, 2, irq[UART16550_IRQ],
 250                    115200, serial_hd(0), DEVICE_LITTLE_ENDIAN);
 251
 252     /* 2 timers at irq 2 @ 62 Mhz.  */
 253     dev = qdev_new("xlnx.xps-timer");
 254     qdev_prop_set_uint32(dev, "one-timer-only", 0);
 255     qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
 256     sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 257     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
 258     sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
 259
 260     if (kernel_filename) {
 261         uint64_t entry, high;
 262         hwaddr boot_offset;
 263
 264         /* Boots a kernel elf binary.  */
 265         kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
 266                                &entry, NULL, &high, NULL, 1, PPC_ELF_MACHINE,
 267                                0, 0);
 268         boot_info.bootstrap_pc = entry & 0x00ffffff;
 269
 270         if (kernel_size < 0) {
 271             boot_offset = 0x1200000;
 272             /* If we failed loading ELF's try a raw image.  */
 273             kernel_size = load_image_targphys(kernel_filename,
 274                                               boot_offset,
 275                                               machine->ram_size);
 276             boot_info.bootstrap_pc = boot_offset;
 277             high = boot_info.bootstrap_pc + kernel_size + 8192;
 278         }
 279
 280         boot_info.ima_size = kernel_size;
 281
 282         /* Load initrd. */
 283         if (machine->initrd_filename) {
 284             initrd_base = high = ROUND_UP(high, 4);
 285             initrd_size = load_image_targphys(machine->initrd_filename,
 286                                               high, machine->ram_size - high);
 287
 288             if (initrd_size < 0) {
 289                 error_report("couldn't load ram disk '%s'",
 290                              machine->initrd_filename);
 291                 exit(1);
 292             }
 293             high = ROUND_UP(high + initrd_size, 4);
 294         }
 295
 296         /* Provide a device-tree.  */
 297         boot_info.fdt = high + (8192 * 2);
 298         boot_info.fdt &= ~8191;
 299
 300         xilinx_load_device_tree(machine, boot_info.fdt,
 301                                 initrd_base, initrd_size);
 302     }
 303     env->load_info = &boot_info;
 304 }
 305
 306 static void virtex_machine_init(MachineClass *mc)
 307 {
 308     mc->desc = "Xilinx Virtex ML507 reference design";
 309     mc->init = virtex_init;
 310     mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440-xilinx");
 311     mc->default_ram_id = "ram";
 312 }
 313
 314 DEFINE_MACHINE("virtex-ml507", virtex_machine_init)