include/hw/virtio/virtio-gpu.h

   1 /*
   2  * Virtio GPU Device
   3  *
   4  * Copyright Red Hat, Inc. 2013-2014
   5  *
   6  * Authors:
   7  *     Dave Airlie <airlied@redhat.com>
   8  *     Gerd Hoffmann <kraxel@redhat.com>
   9  *
  10  * This work is licensed under the terms of the GNU GPL, version 2.
  11  * See the COPYING file in the top-level directory.
  12  */
  13
  14 #ifndef HW_VIRTIO_GPU_H
  15 #define HW_VIRTIO_GPU_H
  16
  17 #include "qemu/queue.h"
  18 #include "ui/qemu-pixman.h"
  19 #include "ui/console.h"
  20 #include "hw/virtio/virtio.h"
  21 #include "hw/pci/pci.h"
  22 #include "qemu/log.h"
  23
  24 #include "standard-headers/linux/virtio_gpu.h"
  25 #define TYPE_VIRTIO_GPU "virtio-gpu-device"
  26 #define VIRTIO_GPU(obj)                                        \
  27         OBJECT_CHECK(VirtIOGPU, (obj), TYPE_VIRTIO_GPU)
  28
  29 #define VIRTIO_ID_GPU 16
  30
  31 struct virtio_gpu_simple_resource {
  32     uint32_t resource_id;
  33     uint32_t width;
  34     uint32_t height;
  35     uint32_t format;
  36     uint64_t *addrs;
  37     struct iovec *iov;
  38     unsigned int iov_cnt;
  39     uint32_t scanout_bitmask;
  40     pixman_image_t *image;
  41     QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
  42 };
  43
  44 struct virtio_gpu_scanout {
  45     QemuConsole *con;
  46     DisplaySurface *ds;
  47     uint32_t width, height;
  48     int x, y;
  49     int invalidate;
  50     uint32_t resource_id;
  51     struct virtio_gpu_update_cursor cursor;
  52     QEMUCursor *current_cursor;
  53 };
  54
  55 struct virtio_gpu_requested_state {
  56     uint32_t width, height;
  57     int x, y;
  58 };
  59
  60 enum virtio_gpu_conf_flags {
  61     VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1,
  62     VIRTIO_GPU_FLAG_STATS_ENABLED,
  63 };
  64
  65 #define virtio_gpu_virgl_enabled(_cfg) \
  66     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
  67 #define virtio_gpu_stats_enabled(_cfg) \
  68     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
  69
  70 struct virtio_gpu_conf {
  71     uint32_t max_outputs;
  72     uint32_t flags;
  73 };
  74
  75 struct virtio_gpu_ctrl_command {
  76     VirtQueueElement elem;
  77     VirtQueue *vq;
  78     struct virtio_gpu_ctrl_hdr cmd_hdr;
  79     uint32_t error;
  80     bool waiting;
  81     bool finished;
  82     QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
  83 };
  84
  85 typedef struct VirtIOGPU {
  86     VirtIODevice parent_obj;
  87
  88     QEMUBH *ctrl_bh;
  89     QEMUBH *cursor_bh;
  90     VirtQueue *ctrl_vq;
  91     VirtQueue *cursor_vq;
  92
  93     int enable;
  94
  95     int config_size;
  96     DeviceState *qdev;
  97
  98     QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
  99     QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq;
 100     QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
 101
 102     struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
 103     struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS];
 104
 105     struct virtio_gpu_conf conf;
 106     int enabled_output_bitmask;
 107     struct virtio_gpu_config virtio_config;
 108
 109     bool use_virgl_renderer;
 110     bool renderer_inited;
 111     int renderer_blocked;
 112     QEMUTimer *fence_poll;
 113     QEMUTimer *print_stats;
 114
 115     uint32_t inflight;
 116     struct {
 117         uint32_t max_inflight;
 118         uint32_t requests;
 119         uint32_t req_3d;
 120         uint32_t bytes_3d;
 121     } stats;
 122
 123     Error *migration_blocker;
 124 } VirtIOGPU;
 125
 126 extern const GraphicHwOps virtio_gpu_ops;
 127
 128 /* to share between PCI and VGA */
 129 #define DEFINE_VIRTIO_GPU_PCI_PROPERTIES(_state)               \
 130     DEFINE_PROP_BIT("ioeventfd", _state, flags,                \
 131                     VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, false), \
 132     DEFINE_PROP_UINT32("vectors", _state, nvectors, 3)
 133
 134 #define VIRTIO_GPU_FILL_CMD(out) do {                                   \
 135         size_t s;                                                       \
 136         s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0,          \
 137                        &out, sizeof(out));                              \
 138         if (s != sizeof(out)) {                                         \
 139             qemu_log_mask(LOG_GUEST_ERROR,                              \
 140                           "%s: command size incorrect %zu vs %zu\n",    \
 141                           __func__, s, sizeof(out));                    \
 142             return;                                                     \
 143         }                                                               \
 144     } while (0)
 145
 146 /* virtio-gpu.c */
 147 void virtio_gpu_ctrl_response(VirtIOGPU *g,
 148                               struct virtio_gpu_ctrl_command *cmd,
 149                               struct virtio_gpu_ctrl_hdr *resp,
 150                               size_t resp_len);
 151 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
 152                                      struct virtio_gpu_ctrl_command *cmd,
 153                                      enum virtio_gpu_ctrl_type type);
 154 void virtio_gpu_get_display_info(VirtIOGPU *g,
 155                                  struct virtio_gpu_ctrl_command *cmd);
 156 int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,
 157                                   struct virtio_gpu_ctrl_command *cmd,
 158                                   uint64_t **addr, struct iovec **iov);
 159 void virtio_gpu_cleanup_mapping_iov(struct iovec *iov, uint32_t count);
 160 void virtio_gpu_process_cmdq(VirtIOGPU *g);
 161
 162 /* virtio-gpu-3d.c */
 163 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
 164                                   struct virtio_gpu_ctrl_command *cmd);
 165 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);
 166 void virtio_gpu_virgl_reset(VirtIOGPU *g);
 167 int virtio_gpu_virgl_init(VirtIOGPU *g);
 168
 169 #endif