target/s390x: Fix translation exception on illegal instruction
[qemu/ar7.git] / hw / arm / bcm2835_peripherals.c
blobdcff13433e562d4e2cd47887fa94e7a9959e639a
1 /*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6 * Written by Andrew Baumann
8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
9 * See the COPYING file in the top-level directory.
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qemu/module.h"
15 #include "hw/arm/bcm2835_peripherals.h"
16 #include "hw/misc/bcm2835_mbox_defs.h"
17 #include "hw/arm/raspi_platform.h"
18 #include "sysemu/sysemu.h"
20 /* Peripheral base address on the VC (GPU) system bus */
21 #define BCM2835_VC_PERI_BASE 0x7e000000
23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
24 #define BCM2835_SDHC_CAPAREG 0x52134b4
26 static void create_unimp(BCM2835PeripheralState *ps,
27 UnimplementedDeviceState *uds,
28 const char *name, hwaddr ofs, hwaddr size)
30 object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE);
31 qdev_prop_set_string(DEVICE(uds), "name", name);
32 qdev_prop_set_uint64(DEVICE(uds), "size", size);
33 sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal);
34 memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
35 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
38 static void bcm2835_peripherals_init(Object *obj)
40 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
42 /* Memory region for peripheral devices, which we export to our parent */
43 memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000);
44 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
46 /* Internal memory region for peripheral bus addresses (not exported) */
47 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
49 /* Internal memory region for request/response communication with
50 * mailbox-addressable peripherals (not exported)
52 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
53 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
55 /* Interrupt Controller */
56 object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC);
58 /* SYS Timer */
59 object_initialize_child(obj, "systimer", &s->systmr,
60 TYPE_BCM2835_SYSTIMER);
62 /* UART0 */
63 object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011);
65 /* AUX / UART1 */
66 object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX);
68 /* Mailboxes */
69 object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX);
71 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
72 OBJECT(&s->mbox_mr));
74 /* Framebuffer */
75 object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB);
76 object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size");
78 object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
79 OBJECT(&s->gpu_bus_mr));
81 /* Property channel */
82 object_initialize_child(obj, "property", &s->property,
83 TYPE_BCM2835_PROPERTY);
84 object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
85 "board-rev");
87 object_property_add_const_link(OBJECT(&s->property), "fb",
88 OBJECT(&s->fb));
89 object_property_add_const_link(OBJECT(&s->property), "dma-mr",
90 OBJECT(&s->gpu_bus_mr));
92 /* Random Number Generator */
93 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG);
95 /* Extended Mass Media Controller */
96 object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI);
98 /* SDHOST */
99 object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST);
101 /* DMA Channels */
102 object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA);
104 object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
105 OBJECT(&s->gpu_bus_mr));
107 /* Thermal */
108 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL);
110 /* GPIO */
111 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO);
113 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
114 OBJECT(&s->sdhci.sdbus));
115 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
116 OBJECT(&s->sdhost.sdbus));
118 /* Mphi */
119 object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI);
121 /* DWC2 */
122 object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
124 /* CPRMAN clock manager */
125 object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN);
127 object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
128 OBJECT(&s->gpu_bus_mr));
131 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
133 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
134 Object *obj;
135 MemoryRegion *ram;
136 Error *err = NULL;
137 uint64_t ram_size, vcram_size;
138 int n;
140 obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
142 ram = MEMORY_REGION(obj);
143 ram_size = memory_region_size(ram);
145 /* Map peripherals and RAM into the GPU address space. */
146 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
147 "bcm2835-peripherals", &s->peri_mr, 0,
148 memory_region_size(&s->peri_mr));
150 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
151 &s->peri_mr_alias, 1);
153 /* RAM is aliased four times (different cache configurations) on the GPU */
154 for (n = 0; n < 4; n++) {
155 memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
156 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
157 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
158 &s->ram_alias[n], 0);
161 /* Interrupt Controller */
162 if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) {
163 return;
166 /* CPRMAN clock manager */
167 if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) {
168 return;
170 memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
171 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
172 qdev_connect_clock_in(DEVICE(&s->uart0), "clk",
173 qdev_get_clock_out(DEVICE(&s->cprman), "uart-out"));
175 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
176 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
177 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
179 /* Sys Timer */
180 if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) {
181 return;
183 memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
184 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
185 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
186 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
187 INTERRUPT_TIMER0));
188 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1,
189 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
190 INTERRUPT_TIMER1));
191 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2,
192 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
193 INTERRUPT_TIMER2));
194 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3,
195 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
196 INTERRUPT_TIMER3));
198 /* UART0 */
199 qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
200 if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) {
201 return;
204 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
205 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
206 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
207 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
208 INTERRUPT_UART0));
210 /* AUX / UART1 */
211 qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
213 if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) {
214 return;
217 memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
218 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
219 sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
220 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
221 INTERRUPT_AUX));
223 /* Mailboxes */
224 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) {
225 return;
228 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
229 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
230 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
231 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
232 INTERRUPT_ARM_MAILBOX));
234 /* Framebuffer */
235 vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err);
236 if (err) {
237 error_propagate(errp, err);
238 return;
241 if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base",
242 ram_size - vcram_size, errp)) {
243 return;
246 if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) {
247 return;
250 memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
251 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
252 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
253 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
255 /* Property channel */
256 if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) {
257 return;
260 memory_region_add_subregion(&s->mbox_mr,
261 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
262 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
263 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
264 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
266 /* Random Number Generator */
267 if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) {
268 return;
271 memory_region_add_subregion(&s->peri_mr, RNG_OFFSET,
272 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0));
274 /* Extended Mass Media Controller
276 * Compatible with:
277 * - SD Host Controller Specification Version 3.0 Draft 1.0
278 * - SDIO Specification Version 3.0
279 * - MMC Specification Version 4.4
281 * For the exact details please refer to the Arasan documentation:
282 * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf
284 object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3,
285 &error_abort);
286 object_property_set_uint(OBJECT(&s->sdhci), "capareg",
287 BCM2835_SDHC_CAPAREG, &error_abort);
288 object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true,
289 &error_abort);
290 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
291 return;
294 memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
295 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
296 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
297 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
298 INTERRUPT_ARASANSDIO));
300 /* SDHOST */
301 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) {
302 return;
305 memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET,
306 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0));
307 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0,
308 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
309 INTERRUPT_SDIO));
311 /* DMA Channels */
312 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) {
313 return;
316 memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
317 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
318 memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
319 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));
321 for (n = 0; n <= 12; n++) {
322 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), n,
323 qdev_get_gpio_in_named(DEVICE(&s->ic),
324 BCM2835_IC_GPU_IRQ,
325 INTERRUPT_DMA0 + n));
328 /* THERMAL */
329 if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) {
330 return;
332 memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET,
333 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
335 /* GPIO */
336 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
337 return;
340 memory_region_add_subregion(&s->peri_mr, GPIO_OFFSET,
341 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0));
343 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");
345 /* Mphi */
346 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) {
347 return;
350 memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET,
351 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0));
352 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
353 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
354 INTERRUPT_HOSTPORT));
356 /* DWC2 */
357 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) {
358 return;
361 memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
362 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0));
363 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0,
364 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
365 INTERRUPT_USB));
367 create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
368 create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
369 create_unimp(s, &s->powermgt, "bcm2835-powermgt", PM_OFFSET, 0x114);
370 create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
371 create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
372 create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
373 create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
374 create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
375 create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
376 create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
377 create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
378 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
379 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
380 create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
381 create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
384 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
386 DeviceClass *dc = DEVICE_CLASS(oc);
388 dc->realize = bcm2835_peripherals_realize;
391 static const TypeInfo bcm2835_peripherals_type_info = {
392 .name = TYPE_BCM2835_PERIPHERALS,
393 .parent = TYPE_SYS_BUS_DEVICE,
394 .instance_size = sizeof(BCM2835PeripheralState),
395 .instance_init = bcm2835_peripherals_init,
396 .class_init = bcm2835_peripherals_class_init,
399 static void bcm2835_peripherals_register_types(void)
401 type_register_static(&bcm2835_peripherals_type_info);
404 type_init(bcm2835_peripherals_register_types)