Merge remote-tracking branch 'qemu-project/master'
[qemu/ar7.git] / hw / arm / bcm2835_peripherals.c
blob32b68da17166c4fa10fe17bf2f40f4b9cf0d9448
1 /*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6 * Written by Andrew Baumann
8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
9 * See the COPYING file in the top-level directory.
12 #include "qemu/osdep.h"
13 #include "qapi/error.h"
14 #include "qemu/module.h"
15 #include "hw/arm/bcm2835_peripherals.h"
16 #include "hw/misc/bcm2835_mbox_defs.h"
17 #include "hw/arm/raspi_platform.h"
18 #include "sysemu/sysemu.h"
20 /* Peripheral base address on the VC (GPU) system bus */
21 #define BCM2835_VC_PERI_BASE 0x7e000000
23 /* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
24 #define BCM2835_SDHC_CAPAREG 0x52134b4
27 * According to Linux driver & DTS, dma channels 0--10 have separate IRQ,
28 * while channels 11--14 share one IRQ:
30 #define SEPARATE_DMA_IRQ_MAX 10
31 #define ORGATED_DMA_IRQ_COUNT 4
33 /* All three I2C controllers share the same IRQ */
34 #define ORGATED_I2C_IRQ_COUNT 3
36 void create_unimp(BCMSocPeripheralBaseState *ps,
37 UnimplementedDeviceState *uds,
38 const char *name, hwaddr ofs, hwaddr size)
40 object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE);
41 qdev_prop_set_string(DEVICE(uds), "name", name);
42 qdev_prop_set_uint64(DEVICE(uds), "size", size);
43 sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal);
44 memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
45 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
48 static void bcm2835_peripherals_init(Object *obj)
50 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
51 BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(obj);
53 /* Random Number Generator */
54 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG);
56 /* Thermal */
57 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL);
59 /* GPIO */
60 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO);
62 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
63 OBJECT(&s_base->sdhci.sdbus));
64 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
65 OBJECT(&s_base->sdhost.sdbus));
67 /* Gated DMA interrupts */
68 object_initialize_child(obj, "orgated-dma-irq",
69 &s_base->orgated_dma_irq, TYPE_OR_IRQ);
70 object_property_set_int(OBJECT(&s_base->orgated_dma_irq), "num-lines",
71 ORGATED_DMA_IRQ_COUNT, &error_abort);
74 static void raspi_peripherals_base_init(Object *obj)
76 BCMSocPeripheralBaseState *s = BCM_SOC_PERIPHERALS_BASE(obj);
77 BCMSocPeripheralBaseClass *bc = BCM_SOC_PERIPHERALS_BASE_GET_CLASS(obj);
79 /* Memory region for peripheral devices, which we export to our parent */
80 memory_region_init(&s->peri_mr, obj, "bcm2835-peripherals", bc->peri_size);
81 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
83 /* Internal memory region for peripheral bus addresses (not exported) */
84 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
86 /* Internal memory region for request/response communication with
87 * mailbox-addressable peripherals (not exported)
89 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
90 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
92 /* Interrupt Controller */
93 object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC);
95 /* SYS Timer */
96 object_initialize_child(obj, "systimer", &s->systmr,
97 TYPE_BCM2835_SYSTIMER);
99 /* UART0 */
100 object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011);
102 /* AUX / UART1 */
103 object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX);
105 #if 0
106 /* System timer */
107 object_initialize(&s->st, sizeof(s->st), TYPE_BCM2835_ST);
108 object_property_add_child(obj, "systimer", OBJECT(&s->st), NULL);
109 qdev_set_parent_bus(DEVICE(&s->st), sysbus_get_default());
111 /* ARM timer */
112 object_initialize(&s->timer, sizeof(s->timer), TYPE_BCM2835_TIMER);
113 object_property_add_child(obj, "armtimer", OBJECT(&s->timer), NULL);
114 qdev_set_parent_bus(DEVICE(&s->timer), sysbus_get_default());
116 /* USB controller */
117 object_initialize(&s->usb, sizeof(s->usb), TYPE_BCM2835_USB);
118 object_property_add_child(obj, "usb", OBJECT(&s->usb), NULL);
119 qdev_set_parent_bus(DEVICE(&s->usb), sysbus_get_default());
121 object_property_add_const_link(OBJECT(&s->usb), "dma_mr",
122 OBJECT(&s->gpu_bus_mr), &error_abort);
123 #endif
125 /* Mailboxes */
126 object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX);
128 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
129 OBJECT(&s->mbox_mr));
131 #if 0
132 /* Power management */
133 object_initialize(&s->power, sizeof(s->power), TYPE_BCM2835_POWER);
134 object_property_add_child(obj, "power", OBJECT(&s->power), NULL);
135 qdev_set_parent_bus(DEVICE(&s->power), sysbus_get_default());
136 #endif
138 /* Framebuffer */
139 object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB);
140 object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size");
141 object_property_add_alias(obj, "vcram-base", OBJECT(&s->fb), "vcram-base");
143 object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
144 OBJECT(&s->gpu_bus_mr));
146 /* OTP */
147 object_initialize_child(obj, "bcm2835-otp", &s->otp,
148 TYPE_BCM2835_OTP);
150 /* Property channel */
151 object_initialize_child(obj, "property", &s->property,
152 TYPE_BCM2835_PROPERTY);
153 object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
154 "board-rev");
155 object_property_add_alias(obj, "command-line", OBJECT(&s->property),
156 "command-line");
158 object_property_add_const_link(OBJECT(&s->property), "fb",
159 OBJECT(&s->fb));
160 object_property_add_const_link(OBJECT(&s->property), "dma-mr",
161 OBJECT(&s->gpu_bus_mr));
162 object_property_add_const_link(OBJECT(&s->property), "otp",
163 OBJECT(&s->otp));
165 /* Extended Mass Media Controller */
166 object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI);
168 /* SDHOST */
169 object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST);
171 /* DMA Channels */
172 object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA);
174 object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
175 OBJECT(&s->gpu_bus_mr));
177 /* Mphi */
178 object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI);
180 /* DWC2 */
181 object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
183 /* CPRMAN clock manager */
184 object_initialize_child(obj, "cprman", &s->cprman, TYPE_BCM2835_CPRMAN);
186 object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
187 OBJECT(&s->gpu_bus_mr));
189 /* Power Management */
190 object_initialize_child(obj, "powermgt", &s->powermgt,
191 TYPE_BCM2835_POWERMGT);
193 /* SPI */
194 object_initialize_child(obj, "bcm2835-spi0", &s->spi[0],
195 TYPE_BCM2835_SPI);
197 /* I2C */
198 object_initialize_child(obj, "bcm2835-i2c0", &s->i2c[0],
199 TYPE_BCM2835_I2C);
200 object_initialize_child(obj, "bcm2835-i2c1", &s->i2c[1],
201 TYPE_BCM2835_I2C);
202 object_initialize_child(obj, "bcm2835-i2c2", &s->i2c[2],
203 TYPE_BCM2835_I2C);
205 object_initialize_child(obj, "orgated-i2c-irq",
206 &s->orgated_i2c_irq, TYPE_OR_IRQ);
207 object_property_set_int(OBJECT(&s->orgated_i2c_irq), "num-lines",
208 ORGATED_I2C_IRQ_COUNT, &error_abort);
211 static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
213 MemoryRegion *mphi_mr;
214 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
215 BCMSocPeripheralBaseState *s_base = BCM_SOC_PERIPHERALS_BASE(dev);
216 int n;
218 bcm_soc_peripherals_common_realize(dev, errp);
220 /* Extended Mass Media Controller */
221 sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->sdhci), 0,
222 qdev_get_gpio_in_named(DEVICE(&s_base->ic), BCM2835_IC_GPU_IRQ,
223 INTERRUPT_ARASANSDIO));
225 /* Connect DMA 0-12 to the interrupt controller */
226 for (n = 0; n <= SEPARATE_DMA_IRQ_MAX; n++) {
227 sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma), n,
228 qdev_get_gpio_in_named(DEVICE(&s_base->ic),
229 BCM2835_IC_GPU_IRQ,
230 INTERRUPT_DMA0 + n));
233 if (!qdev_realize(DEVICE(&s_base->orgated_dma_irq), NULL, errp)) {
234 return;
236 for (n = 0; n < ORGATED_DMA_IRQ_COUNT; n++) {
237 sysbus_connect_irq(SYS_BUS_DEVICE(&s_base->dma),
238 SEPARATE_DMA_IRQ_MAX + 1 + n,
239 qdev_get_gpio_in(DEVICE(&s_base->orgated_dma_irq), n));
241 qdev_connect_gpio_out(DEVICE(&s_base->orgated_dma_irq), 0,
242 qdev_get_gpio_in_named(DEVICE(&s_base->ic),
243 BCM2835_IC_GPU_IRQ,
244 INTERRUPT_DMA0 + SEPARATE_DMA_IRQ_MAX + 1));
246 /* Random Number Generator */
247 if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), errp)) {
248 return;
250 memory_region_add_subregion(
251 &s_base->peri_mr, RNG_OFFSET,
252 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0));
254 /* THERMAL */
255 if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), errp)) {
256 return;
258 memory_region_add_subregion(&s_base->peri_mr, THERMAL_OFFSET,
259 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
261 /* Map MPHI to the peripherals memory map */
262 mphi_mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s_base->mphi), 0);
263 memory_region_add_subregion(&s_base->peri_mr, MPHI_OFFSET, mphi_mr);
265 /* GPIO */
266 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
267 return;
269 memory_region_add_subregion(
270 &s_base->peri_mr, GPIO_OFFSET,
271 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0));
273 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");
276 void bcm_soc_peripherals_common_realize(DeviceState *dev, Error **errp)
278 BCMSocPeripheralBaseState *s = BCM_SOC_PERIPHERALS_BASE(dev);
279 Object *obj;
280 MemoryRegion *ram;
281 Error *err = NULL;
282 uint64_t ram_size, vcram_size, vcram_base;
283 int n;
285 obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
287 ram = MEMORY_REGION(obj);
288 ram_size = memory_region_size(ram);
290 /* Map peripherals and RAM into the GPU address space. */
291 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
292 "bcm2835-peripherals", &s->peri_mr, 0,
293 memory_region_size(&s->peri_mr));
295 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
296 &s->peri_mr_alias, 1);
298 /* RAM is aliased four times (different cache configurations) on the GPU */
299 for (n = 0; n < 4; n++) {
300 memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
301 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
302 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
303 &s->ram_alias[n], 0);
306 /* Interrupt Controller */
307 if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), errp)) {
308 return;
311 /* CPRMAN clock manager */
312 if (!sysbus_realize(SYS_BUS_DEVICE(&s->cprman), errp)) {
313 return;
315 memory_region_add_subregion(&s->peri_mr, CPRMAN_OFFSET,
316 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cprman), 0));
317 qdev_connect_clock_in(DEVICE(&s->uart0), "clk",
318 qdev_get_clock_out(DEVICE(&s->cprman), "uart-out"));
320 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
321 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
322 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
324 /* Sys Timer */
325 if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), errp)) {
326 return;
328 memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
329 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
330 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
331 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
332 INTERRUPT_TIMER0));
333 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 1,
334 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
335 INTERRUPT_TIMER1));
336 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 2,
337 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
338 INTERRUPT_TIMER2));
339 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 3,
340 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
341 INTERRUPT_TIMER3));
343 /* UART0 */
344 qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
345 if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), errp)) {
346 return;
349 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
350 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
351 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
352 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
353 INTERRUPT_UART0));
355 /* AUX / UART1 */
356 qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
358 if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), errp)) {
359 return;
362 memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
363 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
364 sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
365 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
366 INTERRUPT_AUX));
368 #if 0
369 /* System timer */
370 object_property_set_bool(OBJECT(&s->st), true, "realized", &err);
371 if (err) {
372 error_propagate(errp, err);
373 return;
376 memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
377 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->st), 0));
378 sysbus_connect_irq(SYS_BUS_DEVICE(&s->st), 0,
379 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
380 INTERRUPT_TIMER0));
381 sysbus_connect_irq(SYS_BUS_DEVICE(&s->st), 1,
382 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
383 INTERRUPT_TIMER1));
384 sysbus_connect_irq(SYS_BUS_DEVICE(&s->st), 2,
385 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
386 INTERRUPT_TIMER2));
387 sysbus_connect_irq(SYS_BUS_DEVICE(&s->st), 3,
388 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
389 INTERRUPT_TIMER3));
391 /* ARM timer */
392 object_property_set_bool(OBJECT(&s->timer), true, "realized", &err);
393 if (err) {
394 error_propagate(errp, err);
395 return;
398 memory_region_add_subregion(&s->peri_mr, ARMCTRL_TIMER0_1_OFFSET,
399 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->timer), 0));
400 sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer), 0,
401 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
402 INTERRUPT_ARM_TIMER));
404 /* USB controller */
405 object_property_set_bool(OBJECT(&s->usb), true, "realized", &err);
406 if (err) {
407 error_propagate(errp, err);
408 return;
411 memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
412 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->usb), 0));
413 sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb), 0,
414 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
415 INTERRUPT_USB));
417 /* MPHI - Message-based Parallel Host Interface */
418 object_property_set_bool(OBJECT(&s->mphi), true, "realized", &err);
419 if (err) {
420 error_propagate(errp, err);
421 return;
424 memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET,
425 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0));
426 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
427 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
428 INTERRUPT_HOSTPORT));
429 #endif
431 /* Mailboxes */
432 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), errp)) {
433 return;
436 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
437 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
438 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
439 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
440 INTERRUPT_ARM_MAILBOX));
442 #if 0
443 /* Power management */
444 object_property_set_bool(OBJECT(&s->power), true, "realized", &err);
445 if (err) {
446 error_propagate(errp, err);
447 return;
450 memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_POWER << MBOX_AS_CHAN_SHIFT,
451 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->power), 0));
452 sysbus_connect_irq(SYS_BUS_DEVICE(&s->power), 0,
453 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_POWER));
454 #endif
456 /* Framebuffer */
457 vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err);
458 if (err) {
459 error_propagate(errp, err);
460 return;
463 vcram_base = object_property_get_uint(OBJECT(s), "vcram-base", &err);
464 if (err) {
465 error_propagate(errp, err);
466 return;
469 if (vcram_base == 0) {
470 vcram_base = ram_size - vcram_size;
472 vcram_base = MIN(vcram_base, UPPER_RAM_BASE - vcram_size);
474 if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base", vcram_base,
475 errp)) {
476 return;
478 if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), errp)) {
479 return;
482 memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
483 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
484 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
485 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
487 /* OTP */
488 if (!sysbus_realize(SYS_BUS_DEVICE(&s->otp), errp)) {
489 return;
492 memory_region_add_subregion(&s->peri_mr, OTP_OFFSET,
493 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->otp), 0));
495 /* Property channel */
496 if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), errp)) {
497 return;
500 memory_region_add_subregion(&s->mbox_mr,
501 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
502 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
503 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
504 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
506 /* Extended Mass Media Controller
508 * Compatible with:
509 * - SD Host Controller Specification Version 3.0 Draft 1.0
510 * - SDIO Specification Version 3.0
511 * - MMC Specification Version 4.4
513 * For the exact details please refer to the Arasan documentation:
514 * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf
516 object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3,
517 &error_abort);
518 object_property_set_uint(OBJECT(&s->sdhci), "capareg",
519 BCM2835_SDHC_CAPAREG, &error_abort);
520 object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true,
521 &error_abort);
522 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
523 return;
526 memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
527 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
529 /* SDHOST */
530 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), errp)) {
531 return;
534 memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET,
535 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0));
536 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0,
537 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
538 INTERRUPT_SDIO));
540 /* DMA Channels */
541 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), errp)) {
542 return;
545 memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
546 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
547 memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
548 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));
550 /* Mphi */
551 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), errp)) {
552 return;
555 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
556 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
557 INTERRUPT_HOSTPORT));
559 /* DWC2 */
560 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), errp)) {
561 return;
564 memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
565 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0));
566 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0,
567 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
568 INTERRUPT_USB));
570 /* Power Management */
571 if (!sysbus_realize(SYS_BUS_DEVICE(&s->powermgt), errp)) {
572 return;
575 memory_region_add_subregion(&s->peri_mr, PM_OFFSET,
576 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->powermgt), 0));
578 /* SPI */
579 if (!sysbus_realize(SYS_BUS_DEVICE(&s->spi[0]), errp)) {
580 return;
583 memory_region_add_subregion(&s->peri_mr, SPI0_OFFSET,
584 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->spi[0]), 0));
585 sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[0]), 0,
586 qdev_get_gpio_in_named(DEVICE(&s->ic),
587 BCM2835_IC_GPU_IRQ,
588 INTERRUPT_SPI));
590 /* I2C */
591 for (n = 0; n < 3; n++) {
592 if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c[n]), errp)) {
593 return;
597 memory_region_add_subregion(&s->peri_mr, BSC0_OFFSET,
598 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[0]), 0));
599 memory_region_add_subregion(&s->peri_mr, BSC1_OFFSET,
600 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[1]), 0));
601 memory_region_add_subregion(&s->peri_mr, BSC2_OFFSET,
602 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->i2c[2]), 0));
604 if (!qdev_realize(DEVICE(&s->orgated_i2c_irq), NULL, errp)) {
605 return;
607 for (n = 0; n < ORGATED_I2C_IRQ_COUNT; n++) {
608 sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[n]), 0,
609 qdev_get_gpio_in(DEVICE(&s->orgated_i2c_irq), n));
611 qdev_connect_gpio_out(DEVICE(&s->orgated_i2c_irq), 0,
612 qdev_get_gpio_in_named(DEVICE(&s->ic),
613 BCM2835_IC_GPU_IRQ,
614 INTERRUPT_I2C));
616 create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000);
617 create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
618 create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
619 create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
620 create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
621 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
622 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
623 create_unimp(s, &s->v3d, "bcm2835-v3d", V3D_OFFSET, 0x1000);
624 create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
627 static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
629 DeviceClass *dc = DEVICE_CLASS(oc);
630 BCMSocPeripheralBaseClass *bc = BCM_SOC_PERIPHERALS_BASE_CLASS(oc);
632 bc->peri_size = 0x1000000;
633 dc->realize = bcm2835_peripherals_realize;
636 static const TypeInfo bcm2835_peripherals_types[] = {
638 .name = TYPE_BCM2835_PERIPHERALS,
639 .parent = TYPE_BCM_SOC_PERIPHERALS_BASE,
640 .instance_size = sizeof(BCM2835PeripheralState),
641 .instance_init = bcm2835_peripherals_init,
642 .class_init = bcm2835_peripherals_class_init,
643 }, {
644 .name = TYPE_BCM_SOC_PERIPHERALS_BASE,
645 .parent = TYPE_SYS_BUS_DEVICE,
646 .instance_size = sizeof(BCMSocPeripheralBaseState),
647 .instance_init = raspi_peripherals_base_init,
648 .class_size = sizeof(BCMSocPeripheralBaseClass),
649 .abstract = true,
653 DEFINE_TYPES(bcm2835_peripherals_types)