docs: Document QMP event rate limiting
[qemu/ar7.git] / hw / i386 / pc_piix.c
blob393dcc4544c9f40884ec1a7f7c6e34d6d8afcb3d
1 /*
2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include <glib.h>
27 #include "hw/hw.h"
28 #include "hw/loader.h"
29 #include "hw/i386/pc.h"
30 #include "hw/i386/apic.h"
31 #include "hw/smbios/smbios.h"
32 #include "hw/pci/pci.h"
33 #include "hw/pci/pci_ids.h"
34 #include "hw/usb.h"
35 #include "net/net.h"
36 #include "hw/boards.h"
37 #include "hw/ide.h"
38 #include "sysemu/kvm.h"
39 #include "hw/kvm/clock.h"
40 #include "sysemu/sysemu.h"
41 #include "hw/sysbus.h"
42 #include "sysemu/arch_init.h"
43 #include "sysemu/block-backend.h"
44 #include "hw/i2c/smbus.h"
45 #include "hw/xen/xen.h"
46 #include "exec/memory.h"
47 #include "exec/address-spaces.h"
48 #include "hw/acpi/acpi.h"
49 #include "cpu.h"
50 #include "qemu/error-report.h"
51 #ifdef CONFIG_XEN
52 #include <xen/hvm/hvm_info_table.h>
53 #include "hw/xen/xen_pt.h"
54 #endif
55 #include "migration/migration.h"
57 #define MAX_IDE_BUS 2
59 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
60 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
61 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
63 static bool pci_enabled = true;
64 static bool has_acpi_build = true;
65 static bool rsdp_in_ram = true;
66 static int legacy_acpi_table_size;
67 static bool smbios_defaults = true;
68 static bool smbios_legacy_mode;
69 static bool smbios_uuid_encoded = true;
70 /* Make sure that guest addresses aligned at 1Gbyte boundaries get mapped to
71 * host addresses aligned at 1Gbyte boundaries. This way we can use 1GByte
72 * pages in the host.
74 static bool gigabyte_align = true;
75 static bool has_reserved_memory = true;
76 static bool kvmclock_enabled = true;
78 /* PC hardware initialisation */
79 static void pc_init1(MachineState *machine,
80 const char *host_type, const char *pci_type)
82 PCMachineState *pcms = PC_MACHINE(machine);
83 MemoryRegion *system_memory = get_system_memory();
84 MemoryRegion *system_io = get_system_io();
85 int i;
86 PCIBus *pci_bus;
87 ISABus *isa_bus;
88 PCII440FXState *i440fx_state;
89 int piix3_devfn = -1;
90 qemu_irq *gsi;
91 qemu_irq *i8259;
92 qemu_irq smi_irq;
93 GSIState *gsi_state;
94 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
95 BusState *idebus[MAX_IDE_BUS];
96 ISADevice *rtc_state;
97 MemoryRegion *ram_memory;
98 MemoryRegion *pci_memory;
99 MemoryRegion *rom_memory;
100 PcGuestInfo *guest_info;
101 ram_addr_t lowmem;
103 /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory).
104 * If it doesn't, we need to split it in chunks below and above 4G.
105 * In any case, try to make sure that guest addresses aligned at
106 * 1G boundaries get mapped to host addresses aligned at 1G boundaries.
107 * For old machine types, use whatever split we used historically to avoid
108 * breaking migration.
110 if (machine->ram_size >= 0xe0000000) {
111 lowmem = gigabyte_align ? 0xc0000000 : 0xe0000000;
112 } else {
113 lowmem = 0xe0000000;
116 /* Handle the machine opt max-ram-below-4g. It is basically doing
117 * min(qemu limit, user limit).
119 if (lowmem > pcms->max_ram_below_4g) {
120 lowmem = pcms->max_ram_below_4g;
121 if (machine->ram_size - lowmem > lowmem &&
122 lowmem & ((1ULL << 30) - 1)) {
123 error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64
124 ") not a multiple of 1G; possible bad performance.",
125 pcms->max_ram_below_4g);
129 if (machine->ram_size >= lowmem) {
130 pcms->above_4g_mem_size = machine->ram_size - lowmem;
131 pcms->below_4g_mem_size = lowmem;
132 } else {
133 pcms->above_4g_mem_size = 0;
134 pcms->below_4g_mem_size = machine->ram_size;
137 if (xen_enabled() && xen_hvm_init(pcms, &ram_memory) != 0) {
138 fprintf(stderr, "xen hardware virtual machine initialisation failed\n");
139 exit(1);
142 pc_cpus_init(pcms);
144 if (kvm_enabled() && kvmclock_enabled) {
145 kvmclock_create();
148 if (pci_enabled) {
149 pci_memory = g_new(MemoryRegion, 1);
150 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
151 rom_memory = pci_memory;
152 } else {
153 pci_memory = NULL;
154 rom_memory = system_memory;
157 guest_info = pc_guest_info_init(pcms);
159 guest_info->has_acpi_build = has_acpi_build;
160 guest_info->legacy_acpi_table_size = legacy_acpi_table_size;
162 guest_info->isapc_ram_fw = !pci_enabled;
163 guest_info->has_reserved_memory = has_reserved_memory;
164 guest_info->rsdp_in_ram = rsdp_in_ram;
166 if (smbios_defaults) {
167 MachineClass *mc = MACHINE_GET_CLASS(machine);
168 /* These values are guest ABI, do not change */
169 smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)",
170 mc->name, smbios_legacy_mode, smbios_uuid_encoded,
171 SMBIOS_ENTRY_POINT_21);
174 /* allocate ram and load rom/bios */
175 if (!xen_enabled()) {
176 pc_memory_init(pcms, system_memory,
177 rom_memory, &ram_memory, guest_info);
178 } else if (machine->kernel_filename != NULL) {
179 /* For xen HVM direct kernel boot, load linux here */
180 xen_load_linux(pcms, guest_info);
183 gsi_state = g_malloc0(sizeof(*gsi_state));
184 if (kvm_irqchip_in_kernel()) {
185 kvm_pc_setup_irq_routing(pci_enabled);
186 gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
187 GSI_NUM_PINS);
188 } else {
189 gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
192 if (pci_enabled) {
193 pci_bus = i440fx_init(host_type,
194 pci_type,
195 &i440fx_state, &piix3_devfn, &isa_bus, gsi,
196 system_memory, system_io, machine->ram_size,
197 pcms->below_4g_mem_size,
198 pcms->above_4g_mem_size,
199 pci_memory, ram_memory);
200 } else {
201 pci_bus = NULL;
202 i440fx_state = NULL;
203 isa_bus = isa_bus_new(NULL, get_system_memory(), system_io);
204 no_hpet = 1;
206 isa_bus_irqs(isa_bus, gsi);
208 if (kvm_irqchip_in_kernel()) {
209 i8259 = kvm_i8259_init(isa_bus);
210 } else if (xen_enabled()) {
211 i8259 = xen_interrupt_controller_init();
212 } else {
213 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
216 for (i = 0; i < ISA_NUM_IRQS; i++) {
217 gsi_state->i8259_irq[i] = i8259[i];
219 g_free(i8259);
220 if (pci_enabled) {
221 ioapic_init_gsi(gsi_state, "i440fx");
224 pc_register_ferr_irq(gsi[13]);
226 pc_vga_init(isa_bus, pci_enabled ? pci_bus : NULL);
228 assert(pcms->vmport != ON_OFF_AUTO_MAX);
229 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
230 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
233 /* init basic PC hardware */
234 pc_basic_device_init(isa_bus, gsi, &rtc_state, true,
235 (pcms->vmport != ON_OFF_AUTO_ON), 0x4);
237 pc_nic_init(isa_bus, pci_bus);
239 ide_drive_get(hd, ARRAY_SIZE(hd));
240 if (pci_enabled) {
241 PCIDevice *dev;
242 if (xen_enabled()) {
243 dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1);
244 } else {
245 dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
247 idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
248 idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
249 } else {
250 for(i = 0; i < MAX_IDE_BUS; i++) {
251 ISADevice *dev;
252 char busname[] = "ide.0";
253 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
254 ide_irq[i],
255 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
257 * The ide bus name is ide.0 for the first bus and ide.1 for the
258 * second one.
260 busname[4] = '0' + i;
261 idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
265 pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state);
267 if (pci_enabled && usb_enabled()) {
268 pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
271 if (pci_enabled && acpi_enabled) {
272 DeviceState *piix4_pm;
273 I2CBus *smbus;
275 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
276 /* TODO: Populate SPD eeprom data. */
277 smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
278 gsi[9], smi_irq,
279 pc_machine_is_smm_enabled(pcms),
280 &piix4_pm);
281 smbus_eeprom_init(smbus, 8, NULL, 0);
283 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
284 TYPE_HOTPLUG_HANDLER,
285 (Object **)&pcms->acpi_dev,
286 object_property_allow_set_link,
287 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
288 object_property_set_link(OBJECT(machine), OBJECT(piix4_pm),
289 PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
292 if (pci_enabled) {
293 pc_pci_device_init(pci_bus);
297 /* Looking for a pc_compat_2_4() function? It doesn't exist.
298 * pc_compat_*() functions that run on machine-init time and
299 * change global QEMU state are deprecated. Please don't create
300 * one, and implement any pc-*-2.4 (and newer) compat code in
301 * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
304 static void pc_compat_2_3(MachineState *machine)
306 PCMachineState *pcms = PC_MACHINE(machine);
307 savevm_skip_section_footers();
308 if (kvm_enabled()) {
309 pcms->smm = ON_OFF_AUTO_OFF;
311 global_state_set_optional();
312 savevm_skip_configuration();
315 static void pc_compat_2_2(MachineState *machine)
317 pc_compat_2_3(machine);
318 rsdp_in_ram = false;
319 machine->suppress_vmdesc = true;
322 static void pc_compat_2_1(MachineState *machine)
324 PCMachineState *pcms = PC_MACHINE(machine);
326 pc_compat_2_2(machine);
327 smbios_uuid_encoded = false;
328 x86_cpu_change_kvm_default("svm", NULL);
329 pcms->enforce_aligned_dimm = false;
332 static void pc_compat_2_0(MachineState *machine)
334 pc_compat_2_1(machine);
335 /* This value depends on the actual DSDT and SSDT compiled into
336 * the source QEMU; unfortunately it depends on the binary and
337 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
338 * both QEMU 1.7 and QEMU 2.0.
340 * Large variations cause migration to fail for more than one
341 * consecutive value of the "-smp" maxcpus option.
343 * For small variations of the kind caused by different iasl versions,
344 * the 4k rounding usually leaves slack. However, there could be still
345 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
346 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
348 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
349 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
351 legacy_acpi_table_size = 6652;
352 smbios_legacy_mode = true;
353 has_reserved_memory = false;
354 pc_set_legacy_acpi_data_size();
357 static void pc_compat_1_7(MachineState *machine)
359 pc_compat_2_0(machine);
360 smbios_defaults = false;
361 gigabyte_align = false;
362 option_rom_has_mr = true;
363 legacy_acpi_table_size = 6414;
364 x86_cpu_change_kvm_default("x2apic", NULL);
367 static void pc_compat_1_6(MachineState *machine)
369 pc_compat_1_7(machine);
370 rom_file_has_mr = false;
371 has_acpi_build = false;
374 static void pc_compat_1_5(MachineState *machine)
376 pc_compat_1_6(machine);
379 static void pc_compat_1_4(MachineState *machine)
381 pc_compat_1_5(machine);
384 static void pc_compat_1_3(MachineState *machine)
386 pc_compat_1_4(machine);
387 enable_compat_apic_id_mode();
390 /* PC compat function for pc-0.14 to pc-1.2 */
391 static void pc_compat_1_2(MachineState *machine)
393 pc_compat_1_3(machine);
394 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
397 /* PC compat function for pc-0.10 to pc-0.13 */
398 static void pc_compat_0_13(MachineState *machine)
400 pc_compat_1_2(machine);
401 kvmclock_enabled = false;
404 static void pc_init_isa(MachineState *machine)
406 pci_enabled = false;
407 has_acpi_build = false;
408 smbios_defaults = false;
409 gigabyte_align = false;
410 smbios_legacy_mode = true;
411 has_reserved_memory = false;
412 option_rom_has_mr = true;
413 rom_file_has_mr = false;
414 if (!machine->cpu_model) {
415 machine->cpu_model = "486";
417 x86_cpu_change_kvm_default("kvm-pv-eoi", NULL);
418 enable_compat_apic_id_mode();
419 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
422 #ifdef CONFIG_XEN
423 static void pc_xen_hvm_init_pci(MachineState *machine)
425 const char *pci_type = has_igd_gfx_passthru ?
426 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
428 pc_init1(machine,
429 TYPE_I440FX_PCI_HOST_BRIDGE,
430 pci_type);
433 static void pc_xen_hvm_init(MachineState *machine)
435 PCIBus *bus;
437 if (!xen_enabled()) {
438 error_report("xenfv machine requires the xen accelerator");
439 exit(1);
442 pc_xen_hvm_init_pci(machine);
444 bus = pci_find_primary_bus();
445 if (bus != NULL) {
446 pci_create_simple(bus, -1, "xen-platform");
449 #endif
451 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
452 static void pc_init_##suffix(MachineState *machine) \
454 void (*compat)(MachineState *m) = (compatfn); \
455 if (compat) { \
456 compat(machine); \
458 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
459 TYPE_I440FX_PCI_DEVICE); \
461 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
463 static void pc_i440fx_machine_options(MachineClass *m)
465 m->family = "pc_piix";
466 m->desc = "Standard PC (i440FX + PIIX, 1996)";
467 m->hot_add_cpu = pc_hot_add_cpu;
468 m->default_machine_opts = "firmware=bios-256k.bin";
469 m->default_display = "std";
472 static void pc_i440fx_2_5_machine_options(MachineClass *m)
474 pc_i440fx_machine_options(m);
475 m->alias = "pc";
476 m->is_default = 1;
479 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
480 pc_i440fx_2_5_machine_options);
483 static void pc_i440fx_2_4_machine_options(MachineClass *m)
485 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
486 pc_i440fx_2_5_machine_options(m);
487 m->alias = NULL;
488 m->is_default = 0;
489 pcmc->broken_reserved_end = true;
490 SET_MACHINE_COMPAT(m, PC_COMPAT_2_4);
493 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
494 pc_i440fx_2_4_machine_options)
497 static void pc_i440fx_2_3_machine_options(MachineClass *m)
499 pc_i440fx_2_4_machine_options(m);
500 m->alias = NULL;
501 m->is_default = 0;
502 SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
505 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3,
506 pc_i440fx_2_3_machine_options);
509 static void pc_i440fx_2_2_machine_options(MachineClass *m)
511 pc_i440fx_2_3_machine_options(m);
512 SET_MACHINE_COMPAT(m, PC_COMPAT_2_2);
515 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2,
516 pc_i440fx_2_2_machine_options);
519 static void pc_i440fx_2_1_machine_options(MachineClass *m)
521 pc_i440fx_2_2_machine_options(m);
522 m->default_display = NULL;
523 SET_MACHINE_COMPAT(m, PC_COMPAT_2_1);
526 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1,
527 pc_i440fx_2_1_machine_options);
531 static void pc_i440fx_2_0_machine_options(MachineClass *m)
533 pc_i440fx_2_1_machine_options(m);
534 SET_MACHINE_COMPAT(m, PC_COMPAT_2_0);
537 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0,
538 pc_i440fx_2_0_machine_options);
541 static void pc_i440fx_1_7_machine_options(MachineClass *m)
543 pc_i440fx_2_0_machine_options(m);
544 m->default_machine_opts = NULL;
545 SET_MACHINE_COMPAT(m, PC_COMPAT_1_7);
548 DEFINE_I440FX_MACHINE(v1_7, "pc-i440fx-1.7", pc_compat_1_7,
549 pc_i440fx_1_7_machine_options);
552 static void pc_i440fx_1_6_machine_options(MachineClass *m)
554 pc_i440fx_1_7_machine_options(m);
555 SET_MACHINE_COMPAT(m, PC_COMPAT_1_6);
558 DEFINE_I440FX_MACHINE(v1_6, "pc-i440fx-1.6", pc_compat_1_6,
559 pc_i440fx_1_6_machine_options);
562 static void pc_i440fx_1_5_machine_options(MachineClass *m)
564 pc_i440fx_1_6_machine_options(m);
565 SET_MACHINE_COMPAT(m, PC_COMPAT_1_5);
568 DEFINE_I440FX_MACHINE(v1_5, "pc-i440fx-1.5", pc_compat_1_5,
569 pc_i440fx_1_5_machine_options);
572 static void pc_i440fx_1_4_machine_options(MachineClass *m)
574 pc_i440fx_1_5_machine_options(m);
575 m->hot_add_cpu = NULL;
576 SET_MACHINE_COMPAT(m, PC_COMPAT_1_4);
579 DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4,
580 pc_i440fx_1_4_machine_options);
583 #define PC_COMPAT_1_3 \
584 PC_COMPAT_1_4 \
586 .driver = "usb-tablet",\
587 .property = "usb_version",\
588 .value = stringify(1),\
589 },{\
590 .driver = "virtio-net-pci",\
591 .property = "ctrl_mac_addr",\
592 .value = "off", \
593 },{ \
594 .driver = "virtio-net-pci", \
595 .property = "mq", \
596 .value = "off", \
597 }, {\
598 .driver = "e1000",\
599 .property = "autonegotiation",\
600 .value = "off",\
604 static void pc_i440fx_1_3_machine_options(MachineClass *m)
606 pc_i440fx_1_4_machine_options(m);
607 SET_MACHINE_COMPAT(m, PC_COMPAT_1_3);
610 DEFINE_I440FX_MACHINE(v1_3, "pc-1.3", pc_compat_1_3,
611 pc_i440fx_1_3_machine_options);
614 #define PC_COMPAT_1_2 \
615 PC_COMPAT_1_3 \
617 .driver = "nec-usb-xhci",\
618 .property = "msi",\
619 .value = "off",\
620 },{\
621 .driver = "nec-usb-xhci",\
622 .property = "msix",\
623 .value = "off",\
624 },{\
625 .driver = "ivshmem",\
626 .property = "use64",\
627 .value = "0",\
628 },{\
629 .driver = "qxl",\
630 .property = "revision",\
631 .value = stringify(3),\
632 },{\
633 .driver = "qxl-vga",\
634 .property = "revision",\
635 .value = stringify(3),\
636 },{\
637 .driver = "VGA",\
638 .property = "mmio",\
639 .value = "off",\
642 static void pc_i440fx_1_2_machine_options(MachineClass *m)
644 pc_i440fx_1_3_machine_options(m);
645 SET_MACHINE_COMPAT(m, PC_COMPAT_1_2);
648 DEFINE_I440FX_MACHINE(v1_2, "pc-1.2", pc_compat_1_2,
649 pc_i440fx_1_2_machine_options);
652 #define PC_COMPAT_1_1 \
653 PC_COMPAT_1_2 \
655 .driver = "virtio-scsi-pci",\
656 .property = "hotplug",\
657 .value = "off",\
658 },{\
659 .driver = "virtio-scsi-pci",\
660 .property = "param_change",\
661 .value = "off",\
662 },{\
663 .driver = "VGA",\
664 .property = "vgamem_mb",\
665 .value = stringify(8),\
666 },{\
667 .driver = "vmware-svga",\
668 .property = "vgamem_mb",\
669 .value = stringify(8),\
670 },{\
671 .driver = "qxl-vga",\
672 .property = "vgamem_mb",\
673 .value = stringify(8),\
674 },{\
675 .driver = "qxl",\
676 .property = "vgamem_mb",\
677 .value = stringify(8),\
678 },{\
679 .driver = "virtio-blk-pci",\
680 .property = "config-wce",\
681 .value = "off",\
684 static void pc_i440fx_1_1_machine_options(MachineClass *m)
686 pc_i440fx_1_2_machine_options(m);
687 SET_MACHINE_COMPAT(m, PC_COMPAT_1_1);
690 DEFINE_I440FX_MACHINE(v1_1, "pc-1.1", pc_compat_1_2,
691 pc_i440fx_1_1_machine_options);
694 #define PC_COMPAT_1_0 \
695 PC_COMPAT_1_1 \
697 .driver = TYPE_ISA_FDC,\
698 .property = "check_media_rate",\
699 .value = "off",\
700 }, {\
701 .driver = "virtio-balloon-pci",\
702 .property = "class",\
703 .value = stringify(PCI_CLASS_MEMORY_RAM),\
704 },{\
705 .driver = "apic-common",\
706 .property = "vapic",\
707 .value = "off",\
708 },{\
709 .driver = TYPE_USB_DEVICE,\
710 .property = "full-path",\
711 .value = "no",\
714 static void pc_i440fx_1_0_machine_options(MachineClass *m)
716 pc_i440fx_1_1_machine_options(m);
717 m->hw_version = "1.0";
718 SET_MACHINE_COMPAT(m, PC_COMPAT_1_0);
721 DEFINE_I440FX_MACHINE(v1_0, "pc-1.0", pc_compat_1_2,
722 pc_i440fx_1_0_machine_options);
725 #define PC_COMPAT_0_15 \
726 PC_COMPAT_1_0
728 static void pc_i440fx_0_15_machine_options(MachineClass *m)
730 pc_i440fx_1_0_machine_options(m);
731 m->hw_version = "0.15";
732 SET_MACHINE_COMPAT(m, PC_COMPAT_0_15);
735 DEFINE_I440FX_MACHINE(v0_15, "pc-0.15", pc_compat_1_2,
736 pc_i440fx_0_15_machine_options);
739 #define PC_COMPAT_0_14 \
740 PC_COMPAT_0_15 \
742 .driver = "virtio-blk-pci",\
743 .property = "event_idx",\
744 .value = "off",\
745 },{\
746 .driver = "virtio-serial-pci",\
747 .property = "event_idx",\
748 .value = "off",\
749 },{\
750 .driver = "virtio-net-pci",\
751 .property = "event_idx",\
752 .value = "off",\
753 },{\
754 .driver = "virtio-balloon-pci",\
755 .property = "event_idx",\
756 .value = "off",\
757 },{\
758 .driver = "qxl",\
759 .property = "revision",\
760 .value = stringify(2),\
761 },{\
762 .driver = "qxl-vga",\
763 .property = "revision",\
764 .value = stringify(2),\
767 static void pc_i440fx_0_14_machine_options(MachineClass *m)
769 pc_i440fx_0_15_machine_options(m);
770 m->hw_version = "0.14";
771 SET_MACHINE_COMPAT(m, PC_COMPAT_0_14);
774 DEFINE_I440FX_MACHINE(v0_14, "pc-0.14", pc_compat_1_2,
775 pc_i440fx_0_14_machine_options);
778 #define PC_COMPAT_0_13 \
779 PC_COMPAT_0_14 \
781 .driver = TYPE_PCI_DEVICE,\
782 .property = "command_serr_enable",\
783 .value = "off",\
784 },{\
785 .driver = "AC97",\
786 .property = "use_broken_id",\
787 .value = stringify(1),\
788 },{\
789 .driver = "virtio-9p-pci",\
790 .property = "vectors",\
791 .value = stringify(0),\
792 },{\
793 .driver = "VGA",\
794 .property = "rombar",\
795 .value = stringify(0),\
796 },{\
797 .driver = "vmware-svga",\
798 .property = "rombar",\
799 .value = stringify(0),\
802 static void pc_i440fx_0_13_machine_options(MachineClass *m)
804 pc_i440fx_0_14_machine_options(m);
805 m->hw_version = "0.13";
806 SET_MACHINE_COMPAT(m, PC_COMPAT_0_13);
809 DEFINE_I440FX_MACHINE(v0_13, "pc-0.13", pc_compat_0_13,
810 pc_i440fx_0_13_machine_options);
813 #define PC_COMPAT_0_12 \
814 PC_COMPAT_0_13 \
816 .driver = "virtio-serial-pci",\
817 .property = "max_ports",\
818 .value = stringify(1),\
819 },{\
820 .driver = "virtio-serial-pci",\
821 .property = "vectors",\
822 .value = stringify(0),\
823 },{\
824 .driver = "usb-mouse",\
825 .property = "serial",\
826 .value = "1",\
827 },{\
828 .driver = "usb-tablet",\
829 .property = "serial",\
830 .value = "1",\
831 },{\
832 .driver = "usb-kbd",\
833 .property = "serial",\
834 .value = "1",\
837 static void pc_i440fx_0_12_machine_options(MachineClass *m)
839 pc_i440fx_0_13_machine_options(m);
840 m->hw_version = "0.12";
841 SET_MACHINE_COMPAT(m, PC_COMPAT_0_12);
844 DEFINE_I440FX_MACHINE(v0_12, "pc-0.12", pc_compat_0_13,
845 pc_i440fx_0_12_machine_options);
848 #define PC_COMPAT_0_11 \
849 PC_COMPAT_0_12 \
851 .driver = "virtio-blk-pci",\
852 .property = "vectors",\
853 .value = stringify(0),\
854 },{\
855 .driver = TYPE_PCI_DEVICE,\
856 .property = "rombar",\
857 .value = stringify(0),\
858 },{\
859 .driver = "ide-drive",\
860 .property = "ver",\
861 .value = "0.11",\
862 },{\
863 .driver = "scsi-disk",\
864 .property = "ver",\
865 .value = "0.11",\
868 static void pc_i440fx_0_11_machine_options(MachineClass *m)
870 pc_i440fx_0_12_machine_options(m);
871 m->hw_version = "0.11";
872 SET_MACHINE_COMPAT(m, PC_COMPAT_0_11);
875 DEFINE_I440FX_MACHINE(v0_11, "pc-0.11", pc_compat_0_13,
876 pc_i440fx_0_11_machine_options);
879 #define PC_COMPAT_0_10 \
880 PC_COMPAT_0_11 \
882 .driver = "virtio-blk-pci",\
883 .property = "class",\
884 .value = stringify(PCI_CLASS_STORAGE_OTHER),\
885 },{\
886 .driver = "virtio-serial-pci",\
887 .property = "class",\
888 .value = stringify(PCI_CLASS_DISPLAY_OTHER),\
889 },{\
890 .driver = "virtio-net-pci",\
891 .property = "vectors",\
892 .value = stringify(0),\
893 },{\
894 .driver = "ide-drive",\
895 .property = "ver",\
896 .value = "0.10",\
897 },{\
898 .driver = "scsi-disk",\
899 .property = "ver",\
900 .value = "0.10",\
903 static void pc_i440fx_0_10_machine_options(MachineClass *m)
905 pc_i440fx_0_11_machine_options(m);
906 m->hw_version = "0.10";
907 SET_MACHINE_COMPAT(m, PC_COMPAT_0_10);
910 DEFINE_I440FX_MACHINE(v0_10, "pc-0.10", pc_compat_0_13,
911 pc_i440fx_0_10_machine_options);
913 typedef struct {
914 uint16_t gpu_device_id;
915 uint16_t pch_device_id;
916 uint8_t pch_revision_id;
917 } IGDDeviceIDInfo;
919 /* In real world different GPU should have different PCH. But actually
920 * the different PCH DIDs likely map to different PCH SKUs. We do the
921 * same thing for the GPU. For PCH, the different SKUs are going to be
922 * all the same silicon design and implementation, just different
923 * features turn on and off with fuses. The SW interfaces should be
924 * consistent across all SKUs in a given family (eg LPT). But just same
925 * features may not be supported.
927 * Most of these different PCH features probably don't matter to the
928 * Gfx driver, but obviously any difference in display port connections
929 * will so it should be fine with any PCH in case of passthrough.
931 * So currently use one PCH version, 0x8c4e, to cover all HSW(Haswell)
932 * scenarios, 0x9cc3 for BDW(Broadwell).
934 static const IGDDeviceIDInfo igd_combo_id_infos[] = {
935 /* HSW Classic */
936 {0x0402, 0x8c4e, 0x04}, /* HSWGT1D, HSWD_w7 */
937 {0x0406, 0x8c4e, 0x04}, /* HSWGT1M, HSWM_w7 */
938 {0x0412, 0x8c4e, 0x04}, /* HSWGT2D, HSWD_w7 */
939 {0x0416, 0x8c4e, 0x04}, /* HSWGT2M, HSWM_w7 */
940 {0x041E, 0x8c4e, 0x04}, /* HSWGT15D, HSWD_w7 */
941 /* HSW ULT */
942 {0x0A06, 0x8c4e, 0x04}, /* HSWGT1UT, HSWM_w7 */
943 {0x0A16, 0x8c4e, 0x04}, /* HSWGT2UT, HSWM_w7 */
944 {0x0A26, 0x8c4e, 0x06}, /* HSWGT3UT, HSWM_w7 */
945 {0x0A2E, 0x8c4e, 0x04}, /* HSWGT3UT28W, HSWM_w7 */
946 {0x0A1E, 0x8c4e, 0x04}, /* HSWGT2UX, HSWM_w7 */
947 {0x0A0E, 0x8c4e, 0x04}, /* HSWGT1ULX, HSWM_w7 */
948 /* HSW CRW */
949 {0x0D26, 0x8c4e, 0x04}, /* HSWGT3CW, HSWM_w7 */
950 {0x0D22, 0x8c4e, 0x04}, /* HSWGT3CWDT, HSWD_w7 */
951 /* HSW Server */
952 {0x041A, 0x8c4e, 0x04}, /* HSWSVGT2, HSWD_w7 */
953 /* HSW SRVR */
954 {0x040A, 0x8c4e, 0x04}, /* HSWSVGT1, HSWD_w7 */
955 /* BSW */
956 {0x1606, 0x9cc3, 0x03}, /* BDWULTGT1, BDWM_w7 */
957 {0x1616, 0x9cc3, 0x03}, /* BDWULTGT2, BDWM_w7 */
958 {0x1626, 0x9cc3, 0x03}, /* BDWULTGT3, BDWM_w7 */
959 {0x160E, 0x9cc3, 0x03}, /* BDWULXGT1, BDWM_w7 */
960 {0x161E, 0x9cc3, 0x03}, /* BDWULXGT2, BDWM_w7 */
961 {0x1602, 0x9cc3, 0x03}, /* BDWHALOGT1, BDWM_w7 */
962 {0x1612, 0x9cc3, 0x03}, /* BDWHALOGT2, BDWM_w7 */
963 {0x1622, 0x9cc3, 0x03}, /* BDWHALOGT3, BDWM_w7 */
964 {0x162B, 0x9cc3, 0x03}, /* BDWHALO28W, BDWM_w7 */
965 {0x162A, 0x9cc3, 0x03}, /* BDWGT3WRKS, BDWM_w7 */
966 {0x162D, 0x9cc3, 0x03}, /* BDWGT3SRVR, BDWM_w7 */
969 static void isa_bridge_class_init(ObjectClass *klass, void *data)
971 DeviceClass *dc = DEVICE_CLASS(klass);
972 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
974 dc->desc = "ISA bridge faked to support IGD PT";
975 k->vendor_id = PCI_VENDOR_ID_INTEL;
976 k->class_id = PCI_CLASS_BRIDGE_ISA;
979 static TypeInfo isa_bridge_info = {
980 .name = "igd-passthrough-isa-bridge",
981 .parent = TYPE_PCI_DEVICE,
982 .instance_size = sizeof(PCIDevice),
983 .class_init = isa_bridge_class_init,
986 static void pt_graphics_register_types(void)
988 type_register_static(&isa_bridge_info);
990 type_init(pt_graphics_register_types)
992 void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id)
994 struct PCIDevice *bridge_dev;
995 int i, num;
996 uint16_t pch_dev_id = 0xffff;
997 uint8_t pch_rev_id;
999 num = ARRAY_SIZE(igd_combo_id_infos);
1000 for (i = 0; i < num; i++) {
1001 if (gpu_dev_id == igd_combo_id_infos[i].gpu_device_id) {
1002 pch_dev_id = igd_combo_id_infos[i].pch_device_id;
1003 pch_rev_id = igd_combo_id_infos[i].pch_revision_id;
1007 if (pch_dev_id == 0xffff) {
1008 return;
1011 /* Currently IGD drivers always need to access PCH by 1f.0. */
1012 bridge_dev = pci_create_simple(bus, PCI_DEVFN(0x1f, 0),
1013 "igd-passthrough-isa-bridge");
1016 * Note that vendor id is always PCI_VENDOR_ID_INTEL.
1018 if (!bridge_dev) {
1019 fprintf(stderr, "set igd-passthrough-isa-bridge failed!\n");
1020 return;
1022 pci_config_set_device_id(bridge_dev->config, pch_dev_id);
1023 pci_config_set_revision(bridge_dev->config, pch_rev_id);
1026 static void isapc_machine_options(MachineClass *m)
1028 m->desc = "ISA-only PC";
1029 m->max_cpus = 1;
1032 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
1033 isapc_machine_options);
1036 #ifdef CONFIG_XEN
1037 static void xenfv_machine_options(MachineClass *m)
1039 m->desc = "Xen Fully-virtualized PC";
1040 m->max_cpus = HVM_MAX_VCPUS;
1041 m->default_machine_opts = "accel=xen";
1042 m->hot_add_cpu = pc_hot_add_cpu;
1045 DEFINE_PC_MACHINE(xenfv, "xenfv", pc_xen_hvm_init,
1046 xenfv_machine_options);
1047 #endif