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Merge tag 'v9.0.0-rc3'
[qemu/ar7.git] / hw / i386 / pc_piix.c
blob18ba07660926d196a1c4598473536187465fcec6
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include CONFIG_DEVICES
27
28 #include "qemu/units.h"
29 #include "hw/char/parallel-isa.h"
30 #include "hw/dma/i8257.h"
31 #include "hw/loader.h"
32 #include "hw/i386/x86.h"
33 #include "hw/i386/pc.h"
34 #include "hw/i386/apic.h"
35 #include "hw/pci-host/i440fx.h"
36 #include "hw/rtc/mc146818rtc.h"
37 #include "hw/southbridge/piix.h"
38 #include "hw/display/ramfb.h"
39 #include "hw/pci/pci.h"
40 #include "hw/pci/pci_ids.h"
41 #include "hw/usb.h"
42 #include "net/net.h"
43 #include "hw/ide/isa.h"
44 #include "hw/ide/pci.h"
45 #include "hw/irq.h"
46 #include "sysemu/kvm.h"
47 #include "hw/i386/kvm/clock.h"
48 #include "hw/sysbus.h"
49 #include "hw/i2c/smbus_eeprom.h"
50 #include "exec/memory.h"
51 #include "hw/acpi/acpi.h"
52 #include "qapi/error.h"
53 #include "qemu/error-report.h"
54 #include "sysemu/xen.h"
55 #ifdef CONFIG_XEN
56 #include <xen/hvm/hvm_info_table.h>
57 #include "hw/xen/xen_pt.h"
58 #include "hw/xen/xen_igd.h"
59 #endif
60 #include "hw/xen/xen-x86.h"
61 #include "hw/xen/xen.h"
62 #include "migration/global_state.h"
63 #include "migration/misc.h"
64 #include "sysemu/runstate.h"
65 #include "sysemu/numa.h"
66 #include "hw/hyperv/vmbus-bridge.h"
67 #include "hw/mem/nvdimm.h"
68 #include "hw/i386/acpi-build.h"
69 #include "kvm/kvm-cpu.h"
70 #include "target/i386/cpu.h"
71
72 #define XEN_IOAPIC_NUM_PIRQS 128ULL
73
74 #ifdef CONFIG_IDE_ISA
75 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
76 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
77 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
78 #endif
79
80 /*
81 * Return the global irq number corresponding to a given device irq
82 * pin. We could also use the bus number to have a more precise mapping.
83 */
84 static int pc_pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx)
85 {
86 int slot_addend;
87 slot_addend = PCI_SLOT(pci_dev->devfn) - 1;
88 return (pci_intx + slot_addend) & 3;
89 }
90
91 static void piix_intx_routing_notifier_xen(PCIDevice *dev)
92 {
93 int i;
94
95 /* Scan for updates to PCI link routes. */
96 for (i = 0; i < PIIX_NUM_PIRQS; i++) {
97 const PCIINTxRoute route = pci_device_route_intx_to_irq(dev, i);
98 const uint8_t v = route.mode == PCI_INTX_ENABLED ? route.irq : 0;
99 xen_set_pci_link_route(i, v);
100 }
101 }
102
103 /* PC hardware initialisation */
104 static void pc_init1(MachineState *machine, const char *pci_type)
105 {
106 PCMachineState *pcms = PC_MACHINE(machine);
107 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
108 X86MachineState *x86ms = X86_MACHINE(machine);
109 MemoryRegion *system_memory = get_system_memory();
110 MemoryRegion *system_io = get_system_io();
111 Object *phb = NULL;
112 ISABus *isa_bus;
113 Object *piix4_pm = NULL;
114 qemu_irq smi_irq;
115 GSIState *gsi_state;
116 MemoryRegion *ram_memory;
117 MemoryRegion *pci_memory = NULL;
118 MemoryRegion *rom_memory = system_memory;
119 ram_addr_t lowmem;
120 uint64_t hole64_size = 0;
121
122 /*
123 * Calculate ram split, for memory below and above 4G. It's a bit
124 * complicated for backward compatibility reasons ...
125 *
126 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
127 * default value for max_ram_below_4g now.
128 *
129 * - Then, to gigabyte align the memory, we move the split to 3G
130 * (lowmem = 0xc0000000). But only in case we have to split in
131 * the first place, i.e. ram_size is larger than (traditional)
132 * lowmem. And for new machine types (gigabyte_align = true)
133 * only, for live migration compatibility reasons.
134 *
135 * - Next the max-ram-below-4g option was added, which allowed to
136 * reduce lowmem to a smaller value, to allow a larger PCI I/O
137 * window below 4G. qemu doesn't enforce gigabyte alignment here,
138 * but prints a warning.
139 *
140 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
141 * so legacy non-PAE guests can get as much memory as possible in
142 * the 32bit address space below 4G.
143 *
144 * - Note that Xen has its own ram setup code in xen_ram_init(),
145 * called via xen_hvm_init_pc().
146 *
147 * Examples:
148 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
149 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
150 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
151 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
152 */
153 if (xen_enabled()) {
154 xen_hvm_init_pc(pcms, &ram_memory);
155 } else {
156 ram_memory = machine->ram;
157 if (!pcms->max_ram_below_4g) {
158 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
159 }
160 lowmem = pcms->max_ram_below_4g;
161 if (machine->ram_size >= pcms->max_ram_below_4g) {
162 if (pcmc->gigabyte_align) {
163 if (lowmem > 0xc0000000) {
164 lowmem = 0xc0000000;
165 }
166 if (lowmem & (1 * GiB - 1)) {
167 warn_report("Large machine and max_ram_below_4g "
168 "(%" PRIu64 ") not a multiple of 1G; "
169 "possible bad performance.",
170 pcms->max_ram_below_4g);
171 }
172 }
173 }
174
175 if (machine->ram_size >= lowmem) {
176 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
177 x86ms->below_4g_mem_size = lowmem;
178 } else {
179 x86ms->above_4g_mem_size = 0;
180 x86ms->below_4g_mem_size = machine->ram_size;
181 }
182 }
183
184 pc_machine_init_sgx_epc(pcms);
185 x86_cpus_init(x86ms, pcmc->default_cpu_version);
186
187 if (kvm_enabled()) {
188 kvmclock_create(pcmc->kvmclock_create_always);
189 }
190
191 if (pcmc->pci_enabled) {
192 pci_memory = g_new(MemoryRegion, 1);
193 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
194 rom_memory = pci_memory;
195
196 phb = OBJECT(qdev_new(TYPE_I440FX_PCI_HOST_BRIDGE));
197 object_property_add_child(OBJECT(machine), "i440fx", phb);
198 object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM,
199 OBJECT(ram_memory), &error_fatal);
200 object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM,
201 OBJECT(pci_memory), &error_fatal);
202 object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM,
203 OBJECT(system_memory), &error_fatal);
204 object_property_set_link(phb, PCI_HOST_PROP_IO_MEM,
205 OBJECT(system_io), &error_fatal);
206 object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE,
207 x86ms->below_4g_mem_size, &error_fatal);
208 object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE,
209 x86ms->above_4g_mem_size, &error_fatal);
210 object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type,
211 &error_fatal);
212 sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
213
214 pcms->pcibus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0"));
215 pci_bus_map_irqs(pcms->pcibus,
216 xen_enabled() ? xen_pci_slot_get_pirq
217 : pc_pci_slot_get_pirq);
218
219 hole64_size = object_property_get_uint(phb,
220 PCI_HOST_PROP_PCI_HOLE64_SIZE,
221 &error_abort);
222 }
223
224 /* allocate ram and load rom/bios */
225 if (!xen_enabled()) {
226 pc_memory_init(pcms, system_memory, rom_memory, hole64_size);
227 } else {
228 assert(machine->ram_size == x86ms->below_4g_mem_size +
229 x86ms->above_4g_mem_size);
230
231 pc_system_flash_cleanup_unused(pcms);
232 if (machine->kernel_filename != NULL) {
233 /* For xen HVM direct kernel boot, load linux here */
234 xen_load_linux(pcms);
235 }
236 }
237
238 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
239
240 if (pcmc->pci_enabled) {
241 PCIDevice *pci_dev;
242 DeviceState *dev;
243 size_t i;
244
245 pci_dev = pci_new_multifunction(-1, pcms->south_bridge);
246 object_property_set_bool(OBJECT(pci_dev), "has-usb",
247 machine_usb(machine), &error_abort);
248 object_property_set_bool(OBJECT(pci_dev), "has-acpi",
249 x86_machine_is_acpi_enabled(x86ms),
250 &error_abort);
251 object_property_set_bool(OBJECT(pci_dev), "has-pic", false,
252 &error_abort);
253 object_property_set_bool(OBJECT(pci_dev), "has-pit", false,
254 &error_abort);
255 qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100);
256 object_property_set_bool(OBJECT(pci_dev), "smm-enabled",
257 x86_machine_is_smm_enabled(x86ms),
258 &error_abort);
259 dev = DEVICE(pci_dev);
260 for (i = 0; i < ISA_NUM_IRQS; i++) {
261 qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]);
262 }
263 pci_realize_and_unref(pci_dev, pcms->pcibus, &error_fatal);
264
265 if (xen_enabled()) {
266 pci_device_set_intx_routing_notifier(
267 pci_dev, piix_intx_routing_notifier_xen);
268
269 /*
270 * Xen supports additional interrupt routes from the PCI devices to
271 * the IOAPIC: the four pins of each PCI device on the bus are also
272 * connected to the IOAPIC directly.
273 * These additional routes can be discovered through ACPI.
274 */
275 pci_bus_irqs(pcms->pcibus, xen_intx_set_irq, pci_dev,
276 XEN_IOAPIC_NUM_PIRQS);
277 }
278
279 isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
280 x86ms->rtc = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
281 "rtc"));
282 piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
283 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
284 pci_ide_create_devs(PCI_DEVICE(dev));
285 pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0");
286 pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1");
287 } else {
288 isa_bus = isa_bus_new(NULL, system_memory, system_io,
289 &error_abort);
290 isa_bus_register_input_irqs(isa_bus, x86ms->gsi);
291
292 x86ms->rtc = isa_new(TYPE_MC146818_RTC);
293 qdev_prop_set_int32(DEVICE(x86ms->rtc), "base_year", 2000);
294 isa_realize_and_unref(x86ms->rtc, isa_bus, &error_fatal);
295
296 i8257_dma_init(OBJECT(machine), isa_bus, 0);
297 pcms->hpet_enabled = false;
298 }
299
300 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
301 pc_i8259_create(isa_bus, gsi_state->i8259_irq);
302 }
303
304 if (phb) {
305 ioapic_init_gsi(gsi_state, phb);
306 }
307
308 if (tcg_enabled()) {
309 x86_register_ferr_irq(x86ms->gsi[13]);
310 }
311
312 pc_vga_init(isa_bus, pcmc->pci_enabled ? pcms->pcibus : NULL);
313
314 assert(pcms->vmport != ON_OFF_AUTO__MAX);
315 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
316 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
317 }
318
319 /* init basic PC hardware */
320 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc, true,
321 0x4);
322
323 pc_nic_init(pcmc, isa_bus, pcms->pcibus);
324
325 #ifdef CONFIG_IDE_ISA
326 if (!pcmc->pci_enabled) {
327 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
328 int i;
329
330 ide_drive_get(hd, ARRAY_SIZE(hd));
331 for (i = 0; i < MAX_IDE_BUS; i++) {
332 ISADevice *dev;
333 char busname[] = "ide.0";
334 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
335 ide_irq[i],
336 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
337 /*
338 * The ide bus name is ide.0 for the first bus and ide.1 for the
339 * second one.
340 */
341 busname[4] = '0' + i;
342 pcms->idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
343 }
344 }
345 #endif
346
347 if (piix4_pm) {
348 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
349
350 qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq);
351 pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c"));
352 /* TODO: Populate SPD eeprom data. */
353 smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
354
355 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
356 TYPE_HOTPLUG_HANDLER,
357 (Object **)&x86ms->acpi_dev,
358 object_property_allow_set_link,
359 OBJ_PROP_LINK_STRONG);
360 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
361 piix4_pm, &error_abort);
362 }
363
364 if (machine->nvdimms_state->is_enabled) {
365 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
366 x86_nvdimm_acpi_dsmio,
367 x86ms->fw_cfg, OBJECT(pcms));
368 }
369 }
370
371 typedef enum PCSouthBridgeOption {
372 PC_SOUTH_BRIDGE_OPTION_PIIX3,
373 PC_SOUTH_BRIDGE_OPTION_PIIX4,
374 PC_SOUTH_BRIDGE_OPTION_MAX,
375 } PCSouthBridgeOption;
376
377 static const QEnumLookup PCSouthBridgeOption_lookup = {
378 .array = (const char *const[]) {
379 [PC_SOUTH_BRIDGE_OPTION_PIIX3] = TYPE_PIIX3_DEVICE,
380 [PC_SOUTH_BRIDGE_OPTION_PIIX4] = TYPE_PIIX4_PCI_DEVICE,
381 },
382 .size = PC_SOUTH_BRIDGE_OPTION_MAX
383 };
384
385 static int pc_get_south_bridge(Object *obj, Error **errp)
386 {
387 PCMachineState *pcms = PC_MACHINE(obj);
388 int i;
389
390 for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) {
391 if (g_strcmp0(PCSouthBridgeOption_lookup.array[i],
392 pcms->south_bridge) == 0) {
393 return i;
394 }
395 }
396
397 error_setg(errp, "Invalid south bridge value set");
398 return 0;
399 }
400
401 static void pc_set_south_bridge(Object *obj, int value, Error **errp)
402 {
403 PCMachineState *pcms = PC_MACHINE(obj);
404
405 if (value < 0) {
406 error_setg(errp, "Value can't be negative");
407 return;
408 }
409
410 if (value >= PCSouthBridgeOption_lookup.size) {
411 error_setg(errp, "Value too big");
412 return;
413 }
414
415 pcms->south_bridge = PCSouthBridgeOption_lookup.array[value];
416 }
417
418 /* Looking for a pc_compat_2_4() function? It doesn't exist.
419 * pc_compat_*() functions that run on machine-init time and
420 * change global QEMU state are deprecated. Please don't create
421 * one, and implement any pc-*-2.4 (and newer) compat code in
422 * hw_compat_*, pc_compat_*, or * pc_*_machine_options().
423 */
424
425 static void pc_compat_2_3_fn(MachineState *machine)
426 {
427 X86MachineState *x86ms = X86_MACHINE(machine);
428 if (kvm_enabled()) {
429 x86ms->smm = ON_OFF_AUTO_OFF;
430 }
431 }
432
433 static void pc_compat_2_2_fn(MachineState *machine)
434 {
435 pc_compat_2_3_fn(machine);
436 }
437
438 static void pc_compat_2_1_fn(MachineState *machine)
439 {
440 pc_compat_2_2_fn(machine);
441 x86_cpu_change_kvm_default("svm", NULL);
442 }
443
444 static void pc_compat_2_0_fn(MachineState *machine)
445 {
446 pc_compat_2_1_fn(machine);
447 }
448
449 #ifdef CONFIG_ISAPC
450 static void pc_init_isa(MachineState *machine)
451 {
452 pc_init1(machine, NULL);
453 }
454 #endif
455
456 #ifdef CONFIG_XEN
457 static void pc_xen_hvm_init_pci(MachineState *machine)
458 {
459 const char *pci_type = xen_igd_gfx_pt_enabled() ?
460 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
461
462 pc_init1(machine, pci_type);
463 }
464
465 static void pc_xen_hvm_init(MachineState *machine)
466 {
467 PCMachineState *pcms = PC_MACHINE(machine);
468
469 if (!xen_enabled()) {
470 error_report("xenfv machine requires the xen accelerator");
471 exit(1);
472 }
473
474 pc_xen_hvm_init_pci(machine);
475 xen_igd_reserve_slot(pcms->pcibus);
476 pci_create_simple(pcms->pcibus, -1, "xen-platform");
477 }
478 #endif
479
480 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
481 static void pc_init_##suffix(MachineState *machine) \
482 { \
483 void (*compat)(MachineState *m) = (compatfn); \
484 if (compat) { \
485 compat(machine); \
486 } \
487 pc_init1(machine, TYPE_I440FX_PCI_DEVICE); \
488 } \
489 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
490
491 static void pc_i440fx_machine_options(MachineClass *m)
492 {
493 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
494 ObjectClass *oc = OBJECT_CLASS(m);
495 pcmc->default_south_bridge = TYPE_PIIX3_DEVICE;
496 pcmc->pci_root_uid = 0;
497 pcmc->default_cpu_version = 1;
498
499 m->family = "pc_piix";
500 m->desc = "Standard PC (i440FX + PIIX, 1996)";
501 m->default_machine_opts = "firmware=bios-256k.bin";
502 m->default_display = "std";
503 m->default_nic = "e1000";
504 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
505 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
506 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
507
508 object_class_property_add_enum(oc, "x-south-bridge", "PCSouthBridgeOption",
509 &PCSouthBridgeOption_lookup,
510 pc_get_south_bridge,
511 pc_set_south_bridge);
512 object_class_property_set_description(oc, "x-south-bridge",
513 "Use a different south bridge than PIIX3");
514 }
515
516 static void pc_i440fx_9_0_machine_options(MachineClass *m)
517 {
518 pc_i440fx_machine_options(m);
519 m->alias = "pc";
520 m->is_default = true;
521 }
522
523 DEFINE_I440FX_MACHINE(v9_0, "pc-i440fx-9.0", NULL,
524 pc_i440fx_9_0_machine_options);
525
526 static void pc_i440fx_8_2_machine_options(MachineClass *m)
527 {
528 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
529
530 pc_i440fx_9_0_machine_options(m);
531 m->alias = NULL;
532 m->is_default = false;
533
534 compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len);
535 compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len);
536 /* For pc-i44fx-8.2 and 8.1, use SMBIOS 3.X by default */
537 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_64;
538 }
539
540 DEFINE_I440FX_MACHINE(v8_2, "pc-i440fx-8.2", NULL,
541 pc_i440fx_8_2_machine_options);
542
543 static void pc_i440fx_8_1_machine_options(MachineClass *m)
544 {
545 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
546
547 pc_i440fx_8_2_machine_options(m);
548 pcmc->broken_32bit_mem_addr_check = true;
549
550 compat_props_add(m->compat_props, hw_compat_8_1, hw_compat_8_1_len);
551 compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len);
552 }
553
554 DEFINE_I440FX_MACHINE(v8_1, "pc-i440fx-8.1", NULL,
555 pc_i440fx_8_1_machine_options);
556
557 static void pc_i440fx_8_0_machine_options(MachineClass *m)
558 {
559 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
560
561 pc_i440fx_8_1_machine_options(m);
562 compat_props_add(m->compat_props, hw_compat_8_0, hw_compat_8_0_len);
563 compat_props_add(m->compat_props, pc_compat_8_0, pc_compat_8_0_len);
564
565 /* For pc-i44fx-8.0 and older, use SMBIOS 2.8 by default */
566 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32;
567 }
568
569 DEFINE_I440FX_MACHINE(v8_0, "pc-i440fx-8.0", NULL,
570 pc_i440fx_8_0_machine_options);
571
572 static void pc_i440fx_7_2_machine_options(MachineClass *m)
573 {
574 pc_i440fx_8_0_machine_options(m);
575 compat_props_add(m->compat_props, hw_compat_7_2, hw_compat_7_2_len);
576 compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len);
577 }
578
579 DEFINE_I440FX_MACHINE(v7_2, "pc-i440fx-7.2", NULL,
580 pc_i440fx_7_2_machine_options);
581
582 static void pc_i440fx_7_1_machine_options(MachineClass *m)
583 {
584 pc_i440fx_7_2_machine_options(m);
585 compat_props_add(m->compat_props, hw_compat_7_1, hw_compat_7_1_len);
586 compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len);
587 }
588
589 DEFINE_I440FX_MACHINE(v7_1, "pc-i440fx-7.1", NULL,
590 pc_i440fx_7_1_machine_options);
591
592 static void pc_i440fx_7_0_machine_options(MachineClass *m)
593 {
594 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
595 pc_i440fx_7_1_machine_options(m);
596 pcmc->enforce_amd_1tb_hole = false;
597 compat_props_add(m->compat_props, hw_compat_7_0, hw_compat_7_0_len);
598 compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len);
599 }
600
601 DEFINE_I440FX_MACHINE(v7_0, "pc-i440fx-7.0", NULL,
602 pc_i440fx_7_0_machine_options);
603
604 static void pc_i440fx_6_2_machine_options(MachineClass *m)
605 {
606 pc_i440fx_7_0_machine_options(m);
607 compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len);
608 compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len);
609 }
610
611 DEFINE_I440FX_MACHINE(v6_2, "pc-i440fx-6.2", NULL,
612 pc_i440fx_6_2_machine_options);
613
614 static void pc_i440fx_6_1_machine_options(MachineClass *m)
615 {
616 pc_i440fx_6_2_machine_options(m);
617 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len);
618 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len);
619 m->smp_props.prefer_sockets = true;
620 }
621
622 DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL,
623 pc_i440fx_6_1_machine_options);
624
625 static void pc_i440fx_6_0_machine_options(MachineClass *m)
626 {
627 pc_i440fx_6_1_machine_options(m);
628 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len);
629 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len);
630 }
631
632 DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL,
633 pc_i440fx_6_0_machine_options);
634
635 static void pc_i440fx_5_2_machine_options(MachineClass *m)
636 {
637 pc_i440fx_6_0_machine_options(m);
638 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
639 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
640 }
641
642 DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL,
643 pc_i440fx_5_2_machine_options);
644
645 static void pc_i440fx_5_1_machine_options(MachineClass *m)
646 {
647 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
648
649 pc_i440fx_5_2_machine_options(m);
650 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
651 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
652 pcmc->kvmclock_create_always = false;
653 pcmc->pci_root_uid = 1;
654 }
655
656 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL,
657 pc_i440fx_5_1_machine_options);
658
659 static void pc_i440fx_5_0_machine_options(MachineClass *m)
660 {
661 pc_i440fx_5_1_machine_options(m);
662 m->numa_mem_supported = true;
663 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
664 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
665 m->auto_enable_numa_with_memdev = false;
666 }
667
668 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL,
669 pc_i440fx_5_0_machine_options);
670
671 static void pc_i440fx_4_2_machine_options(MachineClass *m)
672 {
673 pc_i440fx_5_0_machine_options(m);
674 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
675 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
676 }
677
678 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL,
679 pc_i440fx_4_2_machine_options);
680
681 static void pc_i440fx_4_1_machine_options(MachineClass *m)
682 {
683 pc_i440fx_4_2_machine_options(m);
684 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
685 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
686 }
687
688 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL,
689 pc_i440fx_4_1_machine_options);
690
691 static void pc_i440fx_4_0_machine_options(MachineClass *m)
692 {
693 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
694 pc_i440fx_4_1_machine_options(m);
695 pcmc->default_cpu_version = CPU_VERSION_LEGACY;
696 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
697 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
698 }
699
700 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
701 pc_i440fx_4_0_machine_options);
702
703 static void pc_i440fx_3_1_machine_options(MachineClass *m)
704 {
705 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
706
707 pc_i440fx_4_0_machine_options(m);
708 m->smbus_no_migration_support = true;
709 pcmc->pvh_enabled = false;
710 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
711 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
712 }
713
714 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
715 pc_i440fx_3_1_machine_options);
716
717 static void pc_i440fx_3_0_machine_options(MachineClass *m)
718 {
719 pc_i440fx_3_1_machine_options(m);
720 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
721 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
722 }
723
724 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
725 pc_i440fx_3_0_machine_options);
726
727 static void pc_i440fx_2_12_machine_options(MachineClass *m)
728 {
729 pc_i440fx_3_0_machine_options(m);
730 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
731 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
732 }
733
734 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
735 pc_i440fx_2_12_machine_options);
736
737 static void pc_i440fx_2_11_machine_options(MachineClass *m)
738 {
739 pc_i440fx_2_12_machine_options(m);
740 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
741 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
742 }
743
744 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
745 pc_i440fx_2_11_machine_options);
746
747 static void pc_i440fx_2_10_machine_options(MachineClass *m)
748 {
749 pc_i440fx_2_11_machine_options(m);
750 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
751 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
752 m->auto_enable_numa_with_memhp = false;
753 }
754
755 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
756 pc_i440fx_2_10_machine_options);
757
758 static void pc_i440fx_2_9_machine_options(MachineClass *m)
759 {
760 pc_i440fx_2_10_machine_options(m);
761 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
762 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
763 }
764
765 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
766 pc_i440fx_2_9_machine_options);
767
768 static void pc_i440fx_2_8_machine_options(MachineClass *m)
769 {
770 pc_i440fx_2_9_machine_options(m);
771 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
772 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
773 }
774
775 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
776 pc_i440fx_2_8_machine_options);
777
778 static void pc_i440fx_2_7_machine_options(MachineClass *m)
779 {
780 pc_i440fx_2_8_machine_options(m);
781 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
782 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
783 }
784
785 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
786 pc_i440fx_2_7_machine_options);
787
788 static void pc_i440fx_2_6_machine_options(MachineClass *m)
789 {
790 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
791 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
792
793 pc_i440fx_2_7_machine_options(m);
794 pcmc->legacy_cpu_hotplug = true;
795 x86mc->fwcfg_dma_enabled = false;
796 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
797 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
798 }
799
800 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
801 pc_i440fx_2_6_machine_options);
802
803 static void pc_i440fx_2_5_machine_options(MachineClass *m)
804 {
805 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
806
807 pc_i440fx_2_6_machine_options(m);
808 x86mc->save_tsc_khz = false;
809 m->legacy_fw_cfg_order = 1;
810 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
811 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
812 }
813
814 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
815 pc_i440fx_2_5_machine_options);
816
817 static void pc_i440fx_2_4_machine_options(MachineClass *m)
818 {
819 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
820
821 pc_i440fx_2_5_machine_options(m);
822 m->hw_version = "2.4.0";
823 pcmc->broken_reserved_end = true;
824 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
825 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
826 }
827
828 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
829 pc_i440fx_2_4_machine_options)
830
831 static void pc_i440fx_2_3_machine_options(MachineClass *m)
832 {
833 pc_i440fx_2_4_machine_options(m);
834 m->hw_version = "2.3.0";
835 m->deprecation_reason = "old and unattended - use a newer version instead";
836 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
837 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
838 }
839
840 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
841 pc_i440fx_2_3_machine_options);
842
843 static void pc_i440fx_2_2_machine_options(MachineClass *m)
844 {
845 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
846
847 pc_i440fx_2_3_machine_options(m);
848 m->hw_version = "2.2.0";
849 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
850 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
851 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
852 pcmc->rsdp_in_ram = false;
853 pcmc->resizable_acpi_blob = false;
854 }
855
856 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
857 pc_i440fx_2_2_machine_options);
858
859 static void pc_i440fx_2_1_machine_options(MachineClass *m)
860 {
861 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
862
863 pc_i440fx_2_2_machine_options(m);
864 m->hw_version = "2.1.0";
865 m->default_display = NULL;
866 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
867 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
868 pcmc->smbios_uuid_encoded = false;
869 pcmc->enforce_aligned_dimm = false;
870 }
871
872 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
873 pc_i440fx_2_1_machine_options);
874
875 static void pc_i440fx_2_0_machine_options(MachineClass *m)
876 {
877 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
878
879 pc_i440fx_2_1_machine_options(m);
880 m->hw_version = "2.0.0";
881 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
882 pcmc->smbios_legacy_mode = true;
883 pcmc->has_reserved_memory = false;
884 /* This value depends on the actual DSDT and SSDT compiled into
885 * the source QEMU; unfortunately it depends on the binary and
886 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
887 * both QEMU 1.7 and QEMU 2.0.
888 *
889 * Large variations cause migration to fail for more than one
890 * consecutive value of the "-smp" maxcpus option.
891 *
892 * For small variations of the kind caused by different iasl versions,
893 * the 4k rounding usually leaves slack. However, there could be still
894 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
895 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
896 *
897 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
898 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
899 */
900 pcmc->legacy_acpi_table_size = 6652;
901 pcmc->acpi_data_size = 0x10000;
902 }
903
904 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
905 pc_i440fx_2_0_machine_options);
906
907 #ifdef CONFIG_ISAPC
908 static void isapc_machine_options(MachineClass *m)
909 {
910 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
911 m->desc = "ISA-only PC";
912 m->max_cpus = 1;
913 m->option_rom_has_mr = true;
914 m->rom_file_has_mr = false;
915 pcmc->pci_enabled = false;
916 pcmc->has_acpi_build = false;
917 pcmc->smbios_defaults = false;
918 pcmc->gigabyte_align = false;
919 pcmc->smbios_legacy_mode = true;
920 pcmc->has_reserved_memory = false;
921 m->default_nic = "ne2k_isa";
922 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
923 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
924 }
925
926 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
927 isapc_machine_options);
928 #endif
929
930 #ifdef CONFIG_XEN
931 static void xenfv_4_2_machine_options(MachineClass *m)
932 {
933 pc_i440fx_4_2_machine_options(m);
934 m->desc = "Xen Fully-virtualized PC";
935 m->max_cpus = HVM_MAX_VCPUS;
936 m->default_machine_opts = "accel=xen,suppress-vmdesc=on";
937 }
938
939 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init,
940 xenfv_4_2_machine_options);
941
942 static void xenfv_3_1_machine_options(MachineClass *m)
943 {
944 pc_i440fx_3_1_machine_options(m);
945 m->desc = "Xen Fully-virtualized PC";
946 m->alias = "xenfv";
947 m->max_cpus = HVM_MAX_VCPUS;
948 m->default_machine_opts = "accel=xen,suppress-vmdesc=on";
949 }
950
951 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init,
952 xenfv_3_1_machine_options);
953 #endif
AR7 emulation for QEMU