ppc/pnv: fix XSCOM MMIO base address for P9 machines with multiple chips
[qemu/ar7.git] / include / hw / ppc / pnv_xscom.h
blob67641ed2780018e6bf52058308053286f863c195
1 /*
2 * QEMU PowerPC PowerNV XSCOM bus definitions
4 * Copyright (c) 2016, IBM Corporation.
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #ifndef PPC_PNV_XSCOM_H
21 #define PPC_PNV_XSCOM_H
23 #include "qom/object.h"
25 typedef struct PnvXScomInterface {
26 Object parent;
27 } PnvXScomInterface;
29 #define TYPE_PNV_XSCOM_INTERFACE "pnv-xscom-interface"
30 #define PNV_XSCOM_INTERFACE(obj) \
31 OBJECT_CHECK(PnvXScomInterface, (obj), TYPE_PNV_XSCOM_INTERFACE)
32 #define PNV_XSCOM_INTERFACE_CLASS(klass) \
33 OBJECT_CLASS_CHECK(PnvXScomInterfaceClass, (klass), \
34 TYPE_PNV_XSCOM_INTERFACE)
35 #define PNV_XSCOM_INTERFACE_GET_CLASS(obj) \
36 OBJECT_GET_CLASS(PnvXScomInterfaceClass, (obj), TYPE_PNV_XSCOM_INTERFACE)
38 typedef struct PnvXScomInterfaceClass {
39 InterfaceClass parent;
40 int (*dt_xscom)(PnvXScomInterface *dev, void *fdt, int offset);
41 } PnvXScomInterfaceClass;
44 * Layout of the XSCOM PCB addresses of EX core 1 (POWER 8)
46 * GPIO 0x1100xxxx
47 * SCOM 0x1101xxxx
48 * OHA 0x1102xxxx
49 * CLOCK CTL 0x1103xxxx
50 * FIR 0x1104xxxx
51 * THERM 0x1105xxxx
52 * <reserved> 0x1106xxxx
53 * ..
54 * 0x110Exxxx
55 * PCB SLAVE 0x110Fxxxx
58 #define PNV_XSCOM_EX_CORE_BASE 0x10000000ull
60 #define PNV_XSCOM_EX_BASE(core) \
61 (PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24))
62 #define PNV_XSCOM_EX_SIZE 0x100000
64 #define PNV_XSCOM_LPC_BASE 0xb0020
65 #define PNV_XSCOM_LPC_SIZE 0x4
67 #define PNV_XSCOM_PSIHB_BASE 0x2010900
68 #define PNV_XSCOM_PSIHB_SIZE 0x20
70 #define PNV_XSCOM_OCC_BASE 0x0066000
71 #define PNV_XSCOM_OCC_SIZE 0x6000
73 #define PNV9_XSCOM_EC_BASE(core) \
74 ((uint64_t)(((core) & 0x1F) + 0x20) << 24)
75 #define PNV9_XSCOM_EC_SIZE 0x100000
77 #define PNV9_XSCOM_EQ_BASE(core) \
78 ((uint64_t)(((core) & 0x1C) + 0x40) << 22)
79 #define PNV9_XSCOM_EQ_SIZE 0x100000
81 #define PNV9_XSCOM_OCC_BASE PNV_XSCOM_OCC_BASE
82 #define PNV9_XSCOM_OCC_SIZE 0x8000
84 #define PNV9_XSCOM_PSIHB_BASE 0x5012900
85 #define PNV9_XSCOM_PSIHB_SIZE 0x100
87 #define PNV9_XSCOM_XIVE_BASE 0x5013000
88 #define PNV9_XSCOM_XIVE_SIZE 0x300
90 extern void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp);
91 extern int pnv_dt_xscom(PnvChip *chip, void *fdt, int offset);
93 extern void pnv_xscom_add_subregion(PnvChip *chip, hwaddr offset,
94 MemoryRegion *mr);
95 extern void pnv_xscom_region_init(MemoryRegion *mr,
96 struct Object *owner,
97 const MemoryRegionOps *ops,
98 void *opaque,
99 const char *name,
100 uint64_t size);
102 #endif /* PPC_PNV_XSCOM_H */