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hw/i386/pc: Confine system flash handling to pc_sysfw
[qemu/ar7.git] / hw / i386 / pc_piix.c
blobec7c07b3621c94f8bfa8252f78b57ad9a5c317cb
1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include CONFIG_DEVICES
27
28 #include "qemu/units.h"
29 #include "hw/char/parallel-isa.h"
30 #include "hw/dma/i8257.h"
31 #include "hw/loader.h"
32 #include "hw/i386/x86.h"
33 #include "hw/i386/pc.h"
34 #include "hw/i386/apic.h"
35 #include "hw/pci-host/i440fx.h"
36 #include "hw/rtc/mc146818rtc.h"
37 #include "hw/southbridge/piix.h"
38 #include "hw/display/ramfb.h"
39 #include "hw/pci/pci.h"
40 #include "hw/pci/pci_ids.h"
41 #include "hw/usb.h"
42 #include "net/net.h"
43 #include "hw/ide/isa.h"
44 #include "hw/ide/pci.h"
45 #include "hw/irq.h"
46 #include "sysemu/kvm.h"
47 #include "hw/i386/kvm/clock.h"
48 #include "hw/sysbus.h"
49 #include "hw/i2c/smbus_eeprom.h"
50 #include "exec/memory.h"
51 #include "hw/acpi/acpi.h"
52 #include "qapi/error.h"
53 #include "qemu/error-report.h"
54 #include "sysemu/xen.h"
55 #ifdef CONFIG_XEN
56 #include <xen/hvm/hvm_info_table.h>
57 #include "hw/xen/xen_pt.h"
58 #endif
59 #include "hw/xen/xen-x86.h"
60 #include "hw/xen/xen.h"
61 #include "migration/global_state.h"
62 #include "migration/misc.h"
63 #include "sysemu/numa.h"
64 #include "hw/hyperv/vmbus-bridge.h"
65 #include "hw/mem/nvdimm.h"
66 #include "hw/i386/acpi-build.h"
67 #include "kvm/kvm-cpu.h"
68 #include "target/i386/cpu.h"
69
70 #define XEN_IOAPIC_NUM_PIRQS 128ULL
71
72 #ifdef CONFIG_IDE_ISA
73 static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
74 static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
75 static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
76 #endif
77
78 /*
79 * Return the global irq number corresponding to a given device irq
80 * pin. We could also use the bus number to have a more precise mapping.
81 */
82 static int pc_pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx)
83 {
84 int slot_addend;
85 slot_addend = PCI_SLOT(pci_dev->devfn) - 1;
86 return (pci_intx + slot_addend) & 3;
87 }
88
89 static void piix_intx_routing_notifier_xen(PCIDevice *dev)
90 {
91 int i;
92
93 /* Scan for updates to PCI link routes. */
94 for (i = 0; i < PIIX_NUM_PIRQS; i++) {
95 const PCIINTxRoute route = pci_device_route_intx_to_irq(dev, i);
96 const uint8_t v = route.mode == PCI_INTX_ENABLED ? route.irq : 0;
97 xen_set_pci_link_route(i, v);
98 }
99 }
100
101 /* PC hardware initialisation */
102 static void pc_init1(MachineState *machine,
103 const char *host_type, const char *pci_type)
104 {
105 PCMachineState *pcms = PC_MACHINE(machine);
106 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
107 X86MachineState *x86ms = X86_MACHINE(machine);
108 MemoryRegion *system_memory = get_system_memory();
109 MemoryRegion *system_io = get_system_io();
110 PCIBus *pci_bus = NULL;
111 ISABus *isa_bus;
112 Object *piix4_pm = NULL;
113 qemu_irq smi_irq;
114 GSIState *gsi_state;
115 ISADevice *rtc_state;
116 MemoryRegion *ram_memory;
117 MemoryRegion *pci_memory = NULL;
118 MemoryRegion *rom_memory = system_memory;
119 ram_addr_t lowmem;
120 uint64_t hole64_size = 0;
121
122 /*
123 * Calculate ram split, for memory below and above 4G. It's a bit
124 * complicated for backward compatibility reasons ...
125 *
126 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
127 * default value for max_ram_below_4g now.
128 *
129 * - Then, to gigabyte align the memory, we move the split to 3G
130 * (lowmem = 0xc0000000). But only in case we have to split in
131 * the first place, i.e. ram_size is larger than (traditional)
132 * lowmem. And for new machine types (gigabyte_align = true)
133 * only, for live migration compatibility reasons.
134 *
135 * - Next the max-ram-below-4g option was added, which allowed to
136 * reduce lowmem to a smaller value, to allow a larger PCI I/O
137 * window below 4G. qemu doesn't enforce gigabyte alignment here,
138 * but prints a warning.
139 *
140 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
141 * so legacy non-PAE guests can get as much memory as possible in
142 * the 32bit address space below 4G.
143 *
144 * - Note that Xen has its own ram setup code in xen_ram_init(),
145 * called via xen_hvm_init_pc().
146 *
147 * Examples:
148 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
149 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
150 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
151 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
152 */
153 if (xen_enabled()) {
154 xen_hvm_init_pc(pcms, &ram_memory);
155 } else {
156 ram_memory = machine->ram;
157 if (!pcms->max_ram_below_4g) {
158 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
159 }
160 lowmem = pcms->max_ram_below_4g;
161 if (machine->ram_size >= pcms->max_ram_below_4g) {
162 if (pcmc->gigabyte_align) {
163 if (lowmem > 0xc0000000) {
164 lowmem = 0xc0000000;
165 }
166 if (lowmem & (1 * GiB - 1)) {
167 warn_report("Large machine and max_ram_below_4g "
168 "(%" PRIu64 ") not a multiple of 1G; "
169 "possible bad performance.",
170 pcms->max_ram_below_4g);
171 }
172 }
173 }
174
175 if (machine->ram_size >= lowmem) {
176 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
177 x86ms->below_4g_mem_size = lowmem;
178 } else {
179 x86ms->above_4g_mem_size = 0;
180 x86ms->below_4g_mem_size = machine->ram_size;
181 }
182 }
183
184 pc_machine_init_sgx_epc(pcms);
185 x86_cpus_init(x86ms, pcmc->default_cpu_version);
186
187 if (kvm_enabled() && pcmc->kvmclock_enabled) {
188 kvmclock_create(pcmc->kvmclock_create_always);
189 }
190
191 if (pcmc->pci_enabled) {
192 Object *phb;
193
194 pci_memory = g_new(MemoryRegion, 1);
195 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
196 rom_memory = pci_memory;
197
198 phb = OBJECT(qdev_new(host_type));
199 object_property_add_child(OBJECT(machine), "i440fx", phb);
200 object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM,
201 OBJECT(ram_memory), &error_fatal);
202 object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM,
203 OBJECT(pci_memory), &error_fatal);
204 object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM,
205 OBJECT(system_memory), &error_fatal);
206 object_property_set_link(phb, PCI_HOST_PROP_IO_MEM,
207 OBJECT(system_io), &error_fatal);
208 object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE,
209 x86ms->below_4g_mem_size, &error_fatal);
210 object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE,
211 x86ms->above_4g_mem_size, &error_fatal);
212 object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type,
213 &error_fatal);
214 sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
215
216 pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0"));
217 pci_bus_map_irqs(pci_bus,
218 xen_enabled() ? xen_pci_slot_get_pirq
219 : pc_pci_slot_get_pirq);
220 pcms->bus = pci_bus;
221
222 hole64_size = object_property_get_uint(phb,
223 PCI_HOST_PROP_PCI_HOLE64_SIZE,
224 &error_abort);
225 }
226
227 /* allocate ram and load rom/bios */
228 if (!xen_enabled()) {
229 pc_memory_init(pcms, system_memory, rom_memory, hole64_size);
230 } else {
231 assert(machine->ram_size == x86ms->below_4g_mem_size +
232 x86ms->above_4g_mem_size);
233
234 if (machine->kernel_filename != NULL) {
235 /* For xen HVM direct kernel boot, load linux here */
236 xen_load_linux(pcms);
237 }
238 }
239
240 gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
241
242 if (pcmc->pci_enabled) {
243 PCIDevice *pci_dev;
244 DeviceState *dev;
245 size_t i;
246
247 pci_dev = pci_new_multifunction(-1, pcms->south_bridge);
248 object_property_set_bool(OBJECT(pci_dev), "has-usb",
249 machine_usb(machine), &error_abort);
250 object_property_set_bool(OBJECT(pci_dev), "has-acpi",
251 x86_machine_is_acpi_enabled(x86ms),
252 &error_abort);
253 object_property_set_bool(OBJECT(pci_dev), "has-pic", false,
254 &error_abort);
255 object_property_set_bool(OBJECT(pci_dev), "has-pit", false,
256 &error_abort);
257 qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100);
258 object_property_set_bool(OBJECT(pci_dev), "smm-enabled",
259 x86_machine_is_smm_enabled(x86ms),
260 &error_abort);
261 dev = DEVICE(pci_dev);
262 for (i = 0; i < ISA_NUM_IRQS; i++) {
263 qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]);
264 }
265 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
266
267 if (xen_enabled()) {
268 pci_device_set_intx_routing_notifier(
269 pci_dev, piix_intx_routing_notifier_xen);
270
271 /*
272 * Xen supports additional interrupt routes from the PCI devices to
273 * the IOAPIC: the four pins of each PCI device on the bus are also
274 * connected to the IOAPIC directly.
275 * These additional routes can be discovered through ACPI.
276 */
277 pci_bus_irqs(pci_bus, xen_intx_set_irq, pci_dev,
278 XEN_IOAPIC_NUM_PIRQS);
279 }
280
281 isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
282 rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
283 "rtc"));
284 piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
285 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
286 pci_ide_create_devs(PCI_DEVICE(dev));
287 pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0");
288 pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1");
289 } else {
290 isa_bus = isa_bus_new(NULL, system_memory, system_io,
291 &error_abort);
292 isa_bus_register_input_irqs(isa_bus, x86ms->gsi);
293
294 rtc_state = isa_new(TYPE_MC146818_RTC);
295 qdev_prop_set_int32(DEVICE(rtc_state), "base_year", 2000);
296 isa_realize_and_unref(rtc_state, isa_bus, &error_fatal);
297
298 i8257_dma_init(OBJECT(machine), isa_bus, 0);
299 pcms->hpet_enabled = false;
300 }
301
302 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
303 pc_i8259_create(isa_bus, gsi_state->i8259_irq);
304 }
305
306 if (pcmc->pci_enabled) {
307 ioapic_init_gsi(gsi_state, "i440fx");
308 }
309
310 if (tcg_enabled()) {
311 x86_register_ferr_irq(x86ms->gsi[13]);
312 }
313
314 pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
315
316 assert(pcms->vmport != ON_OFF_AUTO__MAX);
317 if (pcms->vmport == ON_OFF_AUTO_AUTO) {
318 pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON;
319 }
320
321 /* init basic PC hardware */
322 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, rtc_state, true,
323 0x4);
324
325 pc_nic_init(pcmc, isa_bus, pci_bus);
326
327 #ifdef CONFIG_IDE_ISA
328 if (!pcmc->pci_enabled) {
329 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
330 int i;
331
332 ide_drive_get(hd, ARRAY_SIZE(hd));
333 for (i = 0; i < MAX_IDE_BUS; i++) {
334 ISADevice *dev;
335 char busname[] = "ide.0";
336 dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i],
337 ide_irq[i],
338 hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
339 /*
340 * The ide bus name is ide.0 for the first bus and ide.1 for the
341 * second one.
342 */
343 busname[4] = '0' + i;
344 pcms->idebus[i] = qdev_get_child_bus(DEVICE(dev), busname);
345 }
346 }
347 #endif
348
349 pc_cmos_init(pcms, rtc_state);
350
351 if (piix4_pm) {
352 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
353
354 qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq);
355 pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c"));
356 /* TODO: Populate SPD eeprom data. */
357 smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
358
359 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
360 TYPE_HOTPLUG_HANDLER,
361 (Object **)&x86ms->acpi_dev,
362 object_property_allow_set_link,
363 OBJ_PROP_LINK_STRONG);
364 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
365 piix4_pm, &error_abort);
366 }
367
368 if (machine->nvdimms_state->is_enabled) {
369 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
370 x86_nvdimm_acpi_dsmio,
371 x86ms->fw_cfg, OBJECT(pcms));
372 }
373 }
374
375 typedef enum PCSouthBridgeOption {
376 PC_SOUTH_BRIDGE_OPTION_PIIX3,
377 PC_SOUTH_BRIDGE_OPTION_PIIX4,
378 PC_SOUTH_BRIDGE_OPTION_MAX,
379 } PCSouthBridgeOption;
380
381 static const QEnumLookup PCSouthBridgeOption_lookup = {
382 .array = (const char *const[]) {
383 [PC_SOUTH_BRIDGE_OPTION_PIIX3] = TYPE_PIIX3_DEVICE,
384 [PC_SOUTH_BRIDGE_OPTION_PIIX4] = TYPE_PIIX4_PCI_DEVICE,
385 },
386 .size = PC_SOUTH_BRIDGE_OPTION_MAX
387 };
388
389 #define NotifyVmexitOption_str(val) \
390 qapi_enum_lookup(&NotifyVmexitOption_lookup, (val))
391
392 static int pc_get_south_bridge(Object *obj, Error **errp)
393 {
394 PCMachineState *pcms = PC_MACHINE(obj);
395 int i;
396
397 for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) {
398 if (g_strcmp0(PCSouthBridgeOption_lookup.array[i],
399 pcms->south_bridge) == 0) {
400 return i;
401 }
402 }
403
404 error_setg(errp, "Invalid south bridge value set");
405 return 0;
406 }
407
408 static void pc_set_south_bridge(Object *obj, int value, Error **errp)
409 {
410 PCMachineState *pcms = PC_MACHINE(obj);
411
412 if (value < 0) {
413 error_setg(errp, "Value can't be negative");
414 return;
415 }
416
417 if (value >= PCSouthBridgeOption_lookup.size) {
418 error_setg(errp, "Value too big");
419 return;
420 }
421
422 pcms->south_bridge = PCSouthBridgeOption_lookup.array[value];
423 }
424
425 /* Looking for a pc_compat_2_4() function? It doesn't exist.
426 * pc_compat_*() functions that run on machine-init time and
427 * change global QEMU state are deprecated. Please don't create
428 * one, and implement any pc-*-2.4 (and newer) compat code in
429 * hw_compat_*, pc_compat_*, or * pc_*_machine_options().
430 */
431
432 static void pc_compat_2_3_fn(MachineState *machine)
433 {
434 X86MachineState *x86ms = X86_MACHINE(machine);
435 if (kvm_enabled()) {
436 x86ms->smm = ON_OFF_AUTO_OFF;
437 }
438 }
439
440 static void pc_compat_2_2_fn(MachineState *machine)
441 {
442 pc_compat_2_3_fn(machine);
443 }
444
445 static void pc_compat_2_1_fn(MachineState *machine)
446 {
447 pc_compat_2_2_fn(machine);
448 x86_cpu_change_kvm_default("svm", NULL);
449 }
450
451 static void pc_compat_2_0_fn(MachineState *machine)
452 {
453 pc_compat_2_1_fn(machine);
454 }
455
456 #ifdef CONFIG_ISAPC
457 static void pc_init_isa(MachineState *machine)
458 {
459 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);
460 }
461 #endif
462
463 #ifdef CONFIG_XEN
464 static void pc_xen_hvm_init_pci(MachineState *machine)
465 {
466 const char *pci_type = xen_igd_gfx_pt_enabled() ?
467 TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE : TYPE_I440FX_PCI_DEVICE;
468
469 pc_init1(machine,
470 TYPE_I440FX_PCI_HOST_BRIDGE,
471 pci_type);
472 }
473
474 static void pc_xen_hvm_init(MachineState *machine)
475 {
476 PCMachineState *pcms = PC_MACHINE(machine);
477
478 if (!xen_enabled()) {
479 error_report("xenfv machine requires the xen accelerator");
480 exit(1);
481 }
482
483 pc_xen_hvm_init_pci(machine);
484 xen_igd_reserve_slot(pcms->bus);
485 pci_create_simple(pcms->bus, -1, "xen-platform");
486 }
487 #endif
488
489 #define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \
490 static void pc_init_##suffix(MachineState *machine) \
491 { \
492 void (*compat)(MachineState *m) = (compatfn); \
493 if (compat) { \
494 compat(machine); \
495 } \
496 pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, \
497 TYPE_I440FX_PCI_DEVICE); \
498 } \
499 DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn)
500
501 static void pc_i440fx_machine_options(MachineClass *m)
502 {
503 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
504 ObjectClass *oc = OBJECT_CLASS(m);
505 pcmc->default_south_bridge = TYPE_PIIX3_DEVICE;
506 pcmc->pci_root_uid = 0;
507 pcmc->default_cpu_version = 1;
508
509 m->family = "pc_piix";
510 m->desc = "Standard PC (i440FX + PIIX, 1996)";
511 m->default_machine_opts = "firmware=bios-256k.bin";
512 m->default_display = "std";
513 m->default_nic = "e1000";
514 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
515 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
516 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
517
518 object_class_property_add_enum(oc, "x-south-bridge", "PCSouthBridgeOption",
519 &PCSouthBridgeOption_lookup,
520 pc_get_south_bridge,
521 pc_set_south_bridge);
522 object_class_property_set_description(oc, "x-south-bridge",
523 "Use a different south bridge than PIIX3");
524 }
525
526 static void pc_i440fx_9_0_machine_options(MachineClass *m)
527 {
528 pc_i440fx_machine_options(m);
529 m->alias = "pc";
530 m->is_default = true;
531 }
532
533 DEFINE_I440FX_MACHINE(v9_0, "pc-i440fx-9.0", NULL,
534 pc_i440fx_9_0_machine_options);
535
536 static void pc_i440fx_8_2_machine_options(MachineClass *m)
537 {
538 pc_i440fx_9_0_machine_options(m);
539 m->alias = NULL;
540 m->is_default = false;
541
542 compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len);
543 compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len);
544 }
545
546 DEFINE_I440FX_MACHINE(v8_2, "pc-i440fx-8.2", NULL,
547 pc_i440fx_8_2_machine_options);
548
549 static void pc_i440fx_8_1_machine_options(MachineClass *m)
550 {
551 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
552
553 pc_i440fx_8_2_machine_options(m);
554 pcmc->broken_32bit_mem_addr_check = true;
555
556 compat_props_add(m->compat_props, hw_compat_8_1, hw_compat_8_1_len);
557 compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len);
558 }
559
560 DEFINE_I440FX_MACHINE(v8_1, "pc-i440fx-8.1", NULL,
561 pc_i440fx_8_1_machine_options);
562
563 static void pc_i440fx_8_0_machine_options(MachineClass *m)
564 {
565 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
566
567 pc_i440fx_8_1_machine_options(m);
568 compat_props_add(m->compat_props, hw_compat_8_0, hw_compat_8_0_len);
569 compat_props_add(m->compat_props, pc_compat_8_0, pc_compat_8_0_len);
570
571 /* For pc-i44fx-8.0 and older, use SMBIOS 2.8 by default */
572 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32;
573 }
574
575 DEFINE_I440FX_MACHINE(v8_0, "pc-i440fx-8.0", NULL,
576 pc_i440fx_8_0_machine_options);
577
578 static void pc_i440fx_7_2_machine_options(MachineClass *m)
579 {
580 pc_i440fx_8_0_machine_options(m);
581 compat_props_add(m->compat_props, hw_compat_7_2, hw_compat_7_2_len);
582 compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len);
583 }
584
585 DEFINE_I440FX_MACHINE(v7_2, "pc-i440fx-7.2", NULL,
586 pc_i440fx_7_2_machine_options);
587
588 static void pc_i440fx_7_1_machine_options(MachineClass *m)
589 {
590 pc_i440fx_7_2_machine_options(m);
591 compat_props_add(m->compat_props, hw_compat_7_1, hw_compat_7_1_len);
592 compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len);
593 }
594
595 DEFINE_I440FX_MACHINE(v7_1, "pc-i440fx-7.1", NULL,
596 pc_i440fx_7_1_machine_options);
597
598 static void pc_i440fx_7_0_machine_options(MachineClass *m)
599 {
600 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
601 pc_i440fx_7_1_machine_options(m);
602 pcmc->enforce_amd_1tb_hole = false;
603 compat_props_add(m->compat_props, hw_compat_7_0, hw_compat_7_0_len);
604 compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len);
605 }
606
607 DEFINE_I440FX_MACHINE(v7_0, "pc-i440fx-7.0", NULL,
608 pc_i440fx_7_0_machine_options);
609
610 static void pc_i440fx_6_2_machine_options(MachineClass *m)
611 {
612 pc_i440fx_7_0_machine_options(m);
613 compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len);
614 compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len);
615 }
616
617 DEFINE_I440FX_MACHINE(v6_2, "pc-i440fx-6.2", NULL,
618 pc_i440fx_6_2_machine_options);
619
620 static void pc_i440fx_6_1_machine_options(MachineClass *m)
621 {
622 pc_i440fx_6_2_machine_options(m);
623 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len);
624 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len);
625 m->smp_props.prefer_sockets = true;
626 }
627
628 DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL,
629 pc_i440fx_6_1_machine_options);
630
631 static void pc_i440fx_6_0_machine_options(MachineClass *m)
632 {
633 pc_i440fx_6_1_machine_options(m);
634 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len);
635 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len);
636 }
637
638 DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL,
639 pc_i440fx_6_0_machine_options);
640
641 static void pc_i440fx_5_2_machine_options(MachineClass *m)
642 {
643 pc_i440fx_6_0_machine_options(m);
644 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
645 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
646 }
647
648 DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL,
649 pc_i440fx_5_2_machine_options);
650
651 static void pc_i440fx_5_1_machine_options(MachineClass *m)
652 {
653 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
654
655 pc_i440fx_5_2_machine_options(m);
656 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
657 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
658 pcmc->kvmclock_create_always = false;
659 pcmc->pci_root_uid = 1;
660 }
661
662 DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL,
663 pc_i440fx_5_1_machine_options);
664
665 static void pc_i440fx_5_0_machine_options(MachineClass *m)
666 {
667 pc_i440fx_5_1_machine_options(m);
668 m->numa_mem_supported = true;
669 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
670 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
671 m->auto_enable_numa_with_memdev = false;
672 }
673
674 DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL,
675 pc_i440fx_5_0_machine_options);
676
677 static void pc_i440fx_4_2_machine_options(MachineClass *m)
678 {
679 pc_i440fx_5_0_machine_options(m);
680 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
681 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
682 }
683
684 DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL,
685 pc_i440fx_4_2_machine_options);
686
687 static void pc_i440fx_4_1_machine_options(MachineClass *m)
688 {
689 pc_i440fx_4_2_machine_options(m);
690 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
691 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
692 }
693
694 DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL,
695 pc_i440fx_4_1_machine_options);
696
697 static void pc_i440fx_4_0_machine_options(MachineClass *m)
698 {
699 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
700 pc_i440fx_4_1_machine_options(m);
701 pcmc->default_cpu_version = CPU_VERSION_LEGACY;
702 compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
703 compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
704 }
705
706 DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL,
707 pc_i440fx_4_0_machine_options);
708
709 static void pc_i440fx_3_1_machine_options(MachineClass *m)
710 {
711 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
712
713 pc_i440fx_4_0_machine_options(m);
714 m->smbus_no_migration_support = true;
715 pcmc->pvh_enabled = false;
716 compat_props_add(m->compat_props, hw_compat_3_1, hw_compat_3_1_len);
717 compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len);
718 }
719
720 DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL,
721 pc_i440fx_3_1_machine_options);
722
723 static void pc_i440fx_3_0_machine_options(MachineClass *m)
724 {
725 pc_i440fx_3_1_machine_options(m);
726 compat_props_add(m->compat_props, hw_compat_3_0, hw_compat_3_0_len);
727 compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len);
728 }
729
730 DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL,
731 pc_i440fx_3_0_machine_options);
732
733 static void pc_i440fx_2_12_machine_options(MachineClass *m)
734 {
735 pc_i440fx_3_0_machine_options(m);
736 compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len);
737 compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len);
738 }
739
740 DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL,
741 pc_i440fx_2_12_machine_options);
742
743 static void pc_i440fx_2_11_machine_options(MachineClass *m)
744 {
745 pc_i440fx_2_12_machine_options(m);
746 compat_props_add(m->compat_props, hw_compat_2_11, hw_compat_2_11_len);
747 compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len);
748 }
749
750 DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL,
751 pc_i440fx_2_11_machine_options);
752
753 static void pc_i440fx_2_10_machine_options(MachineClass *m)
754 {
755 pc_i440fx_2_11_machine_options(m);
756 compat_props_add(m->compat_props, hw_compat_2_10, hw_compat_2_10_len);
757 compat_props_add(m->compat_props, pc_compat_2_10, pc_compat_2_10_len);
758 m->auto_enable_numa_with_memhp = false;
759 }
760
761 DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL,
762 pc_i440fx_2_10_machine_options);
763
764 static void pc_i440fx_2_9_machine_options(MachineClass *m)
765 {
766 pc_i440fx_2_10_machine_options(m);
767 compat_props_add(m->compat_props, hw_compat_2_9, hw_compat_2_9_len);
768 compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len);
769 }
770
771 DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL,
772 pc_i440fx_2_9_machine_options);
773
774 static void pc_i440fx_2_8_machine_options(MachineClass *m)
775 {
776 pc_i440fx_2_9_machine_options(m);
777 compat_props_add(m->compat_props, hw_compat_2_8, hw_compat_2_8_len);
778 compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len);
779 }
780
781 DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL,
782 pc_i440fx_2_8_machine_options);
783
784 static void pc_i440fx_2_7_machine_options(MachineClass *m)
785 {
786 pc_i440fx_2_8_machine_options(m);
787 compat_props_add(m->compat_props, hw_compat_2_7, hw_compat_2_7_len);
788 compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len);
789 }
790
791 DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL,
792 pc_i440fx_2_7_machine_options);
793
794 static void pc_i440fx_2_6_machine_options(MachineClass *m)
795 {
796 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
797 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
798
799 pc_i440fx_2_7_machine_options(m);
800 pcmc->legacy_cpu_hotplug = true;
801 x86mc->fwcfg_dma_enabled = false;
802 compat_props_add(m->compat_props, hw_compat_2_6, hw_compat_2_6_len);
803 compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len);
804 }
805
806 DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL,
807 pc_i440fx_2_6_machine_options);
808
809 static void pc_i440fx_2_5_machine_options(MachineClass *m)
810 {
811 X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
812
813 pc_i440fx_2_6_machine_options(m);
814 x86mc->save_tsc_khz = false;
815 m->legacy_fw_cfg_order = 1;
816 compat_props_add(m->compat_props, hw_compat_2_5, hw_compat_2_5_len);
817 compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len);
818 }
819
820 DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL,
821 pc_i440fx_2_5_machine_options);
822
823 static void pc_i440fx_2_4_machine_options(MachineClass *m)
824 {
825 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
826
827 pc_i440fx_2_5_machine_options(m);
828 m->hw_version = "2.4.0";
829 pcmc->broken_reserved_end = true;
830 compat_props_add(m->compat_props, hw_compat_2_4, hw_compat_2_4_len);
831 compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len);
832 }
833
834 DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL,
835 pc_i440fx_2_4_machine_options)
836
837 static void pc_i440fx_2_3_machine_options(MachineClass *m)
838 {
839 pc_i440fx_2_4_machine_options(m);
840 m->hw_version = "2.3.0";
841 m->deprecation_reason = "old and unattended - use a newer version instead";
842 compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len);
843 compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len);
844 }
845
846 DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn,
847 pc_i440fx_2_3_machine_options);
848
849 static void pc_i440fx_2_2_machine_options(MachineClass *m)
850 {
851 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
852
853 pc_i440fx_2_3_machine_options(m);
854 m->hw_version = "2.2.0";
855 m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on";
856 compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len);
857 compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len);
858 pcmc->rsdp_in_ram = false;
859 pcmc->resizable_acpi_blob = false;
860 }
861
862 DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn,
863 pc_i440fx_2_2_machine_options);
864
865 static void pc_i440fx_2_1_machine_options(MachineClass *m)
866 {
867 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
868
869 pc_i440fx_2_2_machine_options(m);
870 m->hw_version = "2.1.0";
871 m->default_display = NULL;
872 compat_props_add(m->compat_props, hw_compat_2_1, hw_compat_2_1_len);
873 compat_props_add(m->compat_props, pc_compat_2_1, pc_compat_2_1_len);
874 pcmc->smbios_uuid_encoded = false;
875 pcmc->enforce_aligned_dimm = false;
876 }
877
878 DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn,
879 pc_i440fx_2_1_machine_options);
880
881 static void pc_i440fx_2_0_machine_options(MachineClass *m)
882 {
883 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
884
885 pc_i440fx_2_1_machine_options(m);
886 m->hw_version = "2.0.0";
887 compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len);
888 pcmc->smbios_legacy_mode = true;
889 pcmc->has_reserved_memory = false;
890 /* This value depends on the actual DSDT and SSDT compiled into
891 * the source QEMU; unfortunately it depends on the binary and
892 * not on the machine type, so we cannot make pc-i440fx-1.7 work on
893 * both QEMU 1.7 and QEMU 2.0.
894 *
895 * Large variations cause migration to fail for more than one
896 * consecutive value of the "-smp" maxcpus option.
897 *
898 * For small variations of the kind caused by different iasl versions,
899 * the 4k rounding usually leaves slack. However, there could be still
900 * one or two values that break. For QEMU 1.7 and QEMU 2.0 the
901 * slack is only ~10 bytes before one "-smp maxcpus" value breaks!
902 *
903 * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on
904 * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418.
905 */
906 pcmc->legacy_acpi_table_size = 6652;
907 pcmc->acpi_data_size = 0x10000;
908 }
909
910 DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn,
911 pc_i440fx_2_0_machine_options);
912
913 #ifdef CONFIG_ISAPC
914 static void isapc_machine_options(MachineClass *m)
915 {
916 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
917 m->desc = "ISA-only PC";
918 m->max_cpus = 1;
919 m->option_rom_has_mr = true;
920 m->rom_file_has_mr = false;
921 pcmc->pci_enabled = false;
922 pcmc->has_acpi_build = false;
923 pcmc->smbios_defaults = false;
924 pcmc->gigabyte_align = false;
925 pcmc->smbios_legacy_mode = true;
926 pcmc->has_reserved_memory = false;
927 m->default_nic = "ne2k_isa";
928 m->default_cpu_type = X86_CPU_TYPE_NAME("486");
929 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
930 }
931
932 DEFINE_PC_MACHINE(isapc, "isapc", pc_init_isa,
933 isapc_machine_options);
934 #endif
935
936 #ifdef CONFIG_XEN
937 static void xenfv_4_2_machine_options(MachineClass *m)
938 {
939 pc_i440fx_4_2_machine_options(m);
940 m->desc = "Xen Fully-virtualized PC";
941 m->max_cpus = HVM_MAX_VCPUS;
942 m->default_machine_opts = "accel=xen,suppress-vmdesc=on";
943 }
944
945 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init,
946 xenfv_4_2_machine_options);
947
948 static void xenfv_3_1_machine_options(MachineClass *m)
949 {
950 pc_i440fx_3_1_machine_options(m);
951 m->desc = "Xen Fully-virtualized PC";
952 m->alias = "xenfv";
953 m->max_cpus = HVM_MAX_VCPUS;
954 m->default_machine_opts = "accel=xen,suppress-vmdesc=on";
955 }
956
957 DEFINE_PC_MACHINE(xenfv, "xenfv-3.1", pc_xen_hvm_init,
958 xenfv_3_1_machine_options);
959 #endif
AR7 emulation for QEMU