2 * Xilinx Zynq MPSoC PMU (Power Management Unit) emulation
4 * Copyright (C) 2017 Xilinx Inc
5 * Written by Alistair Francis <alistair.francis@xilinx.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 #include "qemu/osdep.h"
19 #include "qapi/error.h"
20 #include "exec/address-spaces.h"
21 #include "hw/boards.h"
25 #include "hw/intc/xlnx-zynqmp-ipi.h"
26 #include "hw/intc/xlnx-pmu-iomod-intc.h"
28 /* Define the PMU device */
30 #define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc"
31 #define XLNX_ZYNQMP_PMU_SOC(obj) OBJECT_CHECK(XlnxZynqMPPMUSoCState, (obj), \
32 TYPE_XLNX_ZYNQMP_PMU_SOC)
34 #define XLNX_ZYNQMP_PMU_ROM_SIZE 0x8000
35 #define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000
36 #define XLNX_ZYNQMP_PMU_RAM_ADDR 0xFFDC0000
38 #define XLNX_ZYNQMP_PMU_INTC_ADDR 0xFFD40000
40 #define XLNX_ZYNQMP_PMU_NUM_IPIS 4
42 static const uint64_t ipi_addr
[XLNX_ZYNQMP_PMU_NUM_IPIS
] = {
43 0xFF340000, 0xFF350000, 0xFF360000, 0xFF370000,
45 static const uint64_t ipi_irq
[XLNX_ZYNQMP_PMU_NUM_IPIS
] = {
49 typedef struct XlnxZynqMPPMUSoCState
{
51 DeviceState parent_obj
;
56 XlnxZynqMPIPI ipi
[XLNX_ZYNQMP_PMU_NUM_IPIS
];
57 } XlnxZynqMPPMUSoCState
;
60 static void xlnx_zynqmp_pmu_soc_init(Object
*obj
)
62 XlnxZynqMPPMUSoCState
*s
= XLNX_ZYNQMP_PMU_SOC(obj
);
64 object_initialize_child(obj
, "pmu-cpu", &s
->cpu
, TYPE_MICROBLAZE_CPU
);
66 object_initialize_child(obj
, "intc", &s
->intc
, TYPE_XLNX_PMU_IO_INTC
);
68 /* Create the IPI device */
69 for (int i
= 0; i
< XLNX_ZYNQMP_PMU_NUM_IPIS
; i
++) {
70 char *name
= g_strdup_printf("ipi%d", i
);
71 object_initialize_child(obj
, name
, &s
->ipi
[i
], TYPE_XLNX_ZYNQMP_IPI
);
76 static void xlnx_zynqmp_pmu_soc_realize(DeviceState
*dev
, Error
**errp
)
78 XlnxZynqMPPMUSoCState
*s
= XLNX_ZYNQMP_PMU_SOC(dev
);
81 object_property_set_uint(OBJECT(&s
->cpu
), XLNX_ZYNQMP_PMU_ROM_ADDR
,
82 "base-vectors", &error_abort
);
83 object_property_set_bool(OBJECT(&s
->cpu
), true, "use-stack-protection",
85 object_property_set_uint(OBJECT(&s
->cpu
), 0, "use-fpu", &error_abort
);
86 object_property_set_uint(OBJECT(&s
->cpu
), 0, "use-hw-mul", &error_abort
);
87 object_property_set_bool(OBJECT(&s
->cpu
), true, "use-barrel",
89 object_property_set_bool(OBJECT(&s
->cpu
), true, "use-msr-instr",
91 object_property_set_bool(OBJECT(&s
->cpu
), true, "use-pcmp-instr",
93 object_property_set_bool(OBJECT(&s
->cpu
), false, "use-mmu", &error_abort
);
94 object_property_set_bool(OBJECT(&s
->cpu
), true, "endianness",
96 object_property_set_str(OBJECT(&s
->cpu
), "8.40.b", "version",
98 object_property_set_uint(OBJECT(&s
->cpu
), 0, "pvr", &error_abort
);
99 qdev_realize(DEVICE(&s
->cpu
), NULL
, &err
);
101 error_propagate(errp
, err
);
105 object_property_set_uint(OBJECT(&s
->intc
), 0x10, "intc-intr-size",
107 object_property_set_uint(OBJECT(&s
->intc
), 0x0, "intc-level-edge",
109 object_property_set_uint(OBJECT(&s
->intc
), 0xffff, "intc-positive",
111 sysbus_realize(SYS_BUS_DEVICE(&s
->intc
), &err
);
113 error_propagate(errp
, err
);
116 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->intc
), 0, XLNX_ZYNQMP_PMU_INTC_ADDR
);
117 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->intc
), 0,
118 qdev_get_gpio_in(DEVICE(&s
->cpu
), MB_CPU_IRQ
));
120 /* Connect the IPI device */
121 for (int i
= 0; i
< XLNX_ZYNQMP_PMU_NUM_IPIS
; i
++) {
122 sysbus_realize(SYS_BUS_DEVICE(&s
->ipi
[i
]), &error_abort
);
123 sysbus_mmio_map(SYS_BUS_DEVICE(&s
->ipi
[i
]), 0, ipi_addr
[i
]);
124 sysbus_connect_irq(SYS_BUS_DEVICE(&s
->ipi
[i
]), 0,
125 qdev_get_gpio_in(DEVICE(&s
->intc
), ipi_irq
[i
]));
129 static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass
*oc
, void *data
)
131 DeviceClass
*dc
= DEVICE_CLASS(oc
);
133 dc
->realize
= xlnx_zynqmp_pmu_soc_realize
;
136 static const TypeInfo xlnx_zynqmp_pmu_soc_type_info
= {
137 .name
= TYPE_XLNX_ZYNQMP_PMU_SOC
,
138 .parent
= TYPE_DEVICE
,
139 .instance_size
= sizeof(XlnxZynqMPPMUSoCState
),
140 .instance_init
= xlnx_zynqmp_pmu_soc_init
,
141 .class_init
= xlnx_zynqmp_pmu_soc_class_init
,
144 static void xlnx_zynqmp_pmu_soc_register_types(void)
146 type_register_static(&xlnx_zynqmp_pmu_soc_type_info
);
149 type_init(xlnx_zynqmp_pmu_soc_register_types
)
151 /* Define the PMU Machine */
153 static void xlnx_zynqmp_pmu_init(MachineState
*machine
)
155 XlnxZynqMPPMUSoCState
*pmu
= g_new0(XlnxZynqMPPMUSoCState
, 1);
156 MemoryRegion
*address_space_mem
= get_system_memory();
157 MemoryRegion
*pmu_rom
= g_new(MemoryRegion
, 1);
158 MemoryRegion
*pmu_ram
= g_new(MemoryRegion
, 1);
161 memory_region_init_rom(pmu_rom
, NULL
, "xlnx-zynqmp-pmu.rom",
162 XLNX_ZYNQMP_PMU_ROM_SIZE
, &error_fatal
);
163 memory_region_add_subregion(address_space_mem
, XLNX_ZYNQMP_PMU_ROM_ADDR
,
167 memory_region_init_ram(pmu_ram
, NULL
, "xlnx-zynqmp-pmu.ram",
168 machine
->ram_size
, &error_fatal
);
169 memory_region_add_subregion(address_space_mem
, XLNX_ZYNQMP_PMU_RAM_ADDR
,
172 /* Create the PMU device */
173 object_initialize_child(OBJECT(machine
), "pmu", pmu
,
174 TYPE_XLNX_ZYNQMP_PMU_SOC
);
175 qdev_realize(DEVICE(pmu
), NULL
, &error_fatal
);
177 /* Load the kernel */
178 microblaze_load_kernel(&pmu
->cpu
, XLNX_ZYNQMP_PMU_RAM_ADDR
,
180 machine
->initrd_filename
,
185 static void xlnx_zynqmp_pmu_machine_init(MachineClass
*mc
)
187 mc
->desc
= "Xilinx ZynqMP PMU machine";
188 mc
->init
= xlnx_zynqmp_pmu_init
;
191 DEFINE_MACHINE("xlnx-zynqmp-pmu", xlnx_zynqmp_pmu_machine_init
)