include/hw/virtio/virtio-gpu.h

   1 /*
   2  * Virtio GPU Device
   3  *
   4  * Copyright Red Hat, Inc. 2013-2014
   5  *
   6  * Authors:
   7  *     Dave Airlie <airlied@redhat.com>
   8  *     Gerd Hoffmann <kraxel@redhat.com>
   9  *
  10  * This work is licensed under the terms of the GNU GPL, version 2.
  11  * See the COPYING file in the top-level directory.
  12  */
  13
  14 #ifndef HW_VIRTIO_GPU_H
  15 #define HW_VIRTIO_GPU_H
  16
  17 #include "qemu/queue.h"
  18 #include "ui/qemu-pixman.h"
  19 #include "ui/console.h"
  20 #include "hw/virtio/virtio.h"
  21 #include "qemu/log.h"
  22 #include "sysemu/vhost-user-backend.h"
  23
  24 #include "standard-headers/linux/virtio_gpu.h"
  25 #include "qom/object.h"
  26
  27 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base"
  28 OBJECT_DECLARE_TYPE(VirtIOGPUBase, VirtIOGPUBaseClass,
  29                     VIRTIO_GPU_BASE)
  30
  31 #define TYPE_VIRTIO_GPU "virtio-gpu-device"
  32 OBJECT_DECLARE_TYPE(VirtIOGPU, VirtIOGPUClass, VIRTIO_GPU)
  33
  34 #define TYPE_VIRTIO_GPU_GL "virtio-gpu-gl-device"
  35 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPUGL, VIRTIO_GPU_GL)
  36
  37 #define TYPE_VHOST_USER_GPU "vhost-user-gpu"
  38 OBJECT_DECLARE_SIMPLE_TYPE(VhostUserGPU, VHOST_USER_GPU)
  39
  40 #define VIRTIO_ID_GPU 16
  41
  42 struct virtio_gpu_simple_resource {
  43     uint32_t resource_id;
  44     uint32_t width;
  45     uint32_t height;
  46     uint32_t format;
  47     uint64_t *addrs;
  48     struct iovec *iov;
  49     unsigned int iov_cnt;
  50     uint32_t scanout_bitmask;
  51     pixman_image_t *image;
  52     uint64_t hostmem;
  53     QTAILQ_ENTRY(virtio_gpu_simple_resource) next;
  54 };
  55
  56 struct virtio_gpu_scanout {
  57     QemuConsole *con;
  58     DisplaySurface *ds;
  59     uint32_t width, height;
  60     int x, y;
  61     int invalidate;
  62     uint32_t resource_id;
  63     struct virtio_gpu_update_cursor cursor;
  64     QEMUCursor *current_cursor;
  65 };
  66
  67 struct virtio_gpu_requested_state {
  68     uint16_t width_mm, height_mm;
  69     uint32_t width, height;
  70     int x, y;
  71 };
  72
  73 enum virtio_gpu_base_conf_flags {
  74     VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1,
  75     VIRTIO_GPU_FLAG_STATS_ENABLED,
  76     VIRTIO_GPU_FLAG_EDID_ENABLED,
  77     VIRTIO_GPU_FLAG_DMABUF_ENABLED,
  78 };
  79
  80 #define virtio_gpu_virgl_enabled(_cfg) \
  81     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
  82 #define virtio_gpu_stats_enabled(_cfg) \
  83     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
  84 #define virtio_gpu_edid_enabled(_cfg) \
  85     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED))
  86 #define virtio_gpu_dmabuf_enabled(_cfg) \
  87     (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED))
  88
  89 struct virtio_gpu_base_conf {
  90     uint32_t max_outputs;
  91     uint32_t flags;
  92     uint32_t xres;
  93     uint32_t yres;
  94 };
  95
  96 struct virtio_gpu_ctrl_command {
  97     VirtQueueElement elem;
  98     VirtQueue *vq;
  99     struct virtio_gpu_ctrl_hdr cmd_hdr;
 100     uint32_t error;
 101     bool finished;
 102     QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;
 103 };
 104
 105 struct VirtIOGPUBase {
 106     VirtIODevice parent_obj;
 107
 108     Error *migration_blocker;
 109
 110     struct virtio_gpu_base_conf conf;
 111     struct virtio_gpu_config virtio_config;
 112     const GraphicHwOps *hw_ops;
 113
 114     int renderer_blocked;
 115     int enable;
 116
 117     struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS];
 118
 119     int enabled_output_bitmask;
 120     struct virtio_gpu_requested_state req_state[VIRTIO_GPU_MAX_SCANOUTS];
 121 };
 122
 123 struct VirtIOGPUBaseClass {
 124     VirtioDeviceClass parent;
 125
 126     void (*gl_flushed)(VirtIOGPUBase *g);
 127 };
 128
 129 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf)                       \
 130     DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1),    \
 131     DEFINE_PROP_BIT("edid", _state, _conf.flags, \
 132                     VIRTIO_GPU_FLAG_EDID_ENABLED, true), \
 133     DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \
 134     DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768)
 135
 136 struct VirtIOGPU {
 137     VirtIOGPUBase parent_obj;
 138
 139     uint64_t conf_max_hostmem;
 140
 141     VirtQueue *ctrl_vq;
 142     VirtQueue *cursor_vq;
 143
 144     QEMUBH *ctrl_bh;
 145     QEMUBH *cursor_bh;
 146
 147     QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;
 148     QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq;
 149     QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
 150
 151     uint64_t hostmem;
 152
 153     bool processing_cmdq;
 154     bool renderer_inited;
 155     bool renderer_reset;
 156     QEMUTimer *fence_poll;
 157     QEMUTimer *print_stats;
 158
 159     uint32_t inflight;
 160     struct {
 161         uint32_t max_inflight;
 162         uint32_t requests;
 163         uint32_t req_3d;
 164         uint32_t bytes_3d;
 165     } stats;
 166 };
 167
 168 struct VirtIOGPUClass {
 169     VirtIOGPUBaseClass parent;
 170
 171     void (*handle_ctrl)(VirtIODevice *vdev, VirtQueue *vq);
 172     void (*process_cmd)(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd);
 173     void (*update_cursor_data)(VirtIOGPU *g,
 174                                struct virtio_gpu_scanout *s,
 175                                uint32_t resource_id);
 176 };
 177
 178 struct VirtIOGPUGL {
 179     struct VirtIOGPU parent_obj;
 180 };
 181
 182 struct VhostUserGPU {
 183     VirtIOGPUBase parent_obj;
 184
 185     VhostUserBackend *vhost;
 186     int vhost_gpu_fd; /* closed by the chardev */
 187     CharBackend vhost_chr;
 188     QemuDmaBuf dmabuf[VIRTIO_GPU_MAX_SCANOUTS];
 189     bool backend_blocked;
 190 };
 191
 192 #define VIRTIO_GPU_FILL_CMD(out) do {                                   \
 193         size_t s;                                                       \
 194         s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0,          \
 195                        &out, sizeof(out));                              \
 196         if (s != sizeof(out)) {                                         \
 197             qemu_log_mask(LOG_GUEST_ERROR,                              \
 198                           "%s: command size incorrect %zu vs %zu\n",    \
 199                           __func__, s, sizeof(out));                    \
 200             return;                                                     \
 201         }                                                               \
 202     } while (0)
 203
 204 /* virtio-gpu-base.c */
 205 bool virtio_gpu_base_device_realize(DeviceState *qdev,
 206                                     VirtIOHandleOutput ctrl_cb,
 207                                     VirtIOHandleOutput cursor_cb,
 208                                     Error **errp);
 209 void virtio_gpu_base_reset(VirtIOGPUBase *g);
 210 void virtio_gpu_base_fill_display_info(VirtIOGPUBase *g,
 211                         struct virtio_gpu_resp_display_info *dpy_info);
 212
 213 /* virtio-gpu.c */
 214 void virtio_gpu_ctrl_response(VirtIOGPU *g,
 215                               struct virtio_gpu_ctrl_command *cmd,
 216                               struct virtio_gpu_ctrl_hdr *resp,
 217                               size_t resp_len);
 218 void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
 219                                      struct virtio_gpu_ctrl_command *cmd,
 220                                      enum virtio_gpu_ctrl_type type);
 221 void virtio_gpu_get_display_info(VirtIOGPU *g,
 222                                  struct virtio_gpu_ctrl_command *cmd);
 223 void virtio_gpu_get_edid(VirtIOGPU *g,
 224                          struct virtio_gpu_ctrl_command *cmd);
 225 int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
 226                                   struct virtio_gpu_resource_attach_backing *ab,
 227                                   struct virtio_gpu_ctrl_command *cmd,
 228                                   uint64_t **addr, struct iovec **iov,
 229                                   uint32_t *niov);
 230 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
 231                                     struct iovec *iov, uint32_t count);
 232 void virtio_gpu_process_cmdq(VirtIOGPU *g);
 233 void virtio_gpu_device_realize(DeviceState *qdev, Error **errp);
 234 void virtio_gpu_reset(VirtIODevice *vdev);
 235 void virtio_gpu_simple_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd);
 236 void virtio_gpu_update_cursor_data(VirtIOGPU *g,
 237                                    struct virtio_gpu_scanout *s,
 238                                    uint32_t resource_id);
 239
 240 /* virtio-gpu-3d.c */
 241 void virtio_gpu_virgl_process_cmd(VirtIOGPU *g,
 242                                   struct virtio_gpu_ctrl_command *cmd);
 243 void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);
 244 void virtio_gpu_virgl_reset(VirtIOGPU *g);
 245 int virtio_gpu_virgl_init(VirtIOGPU *g);
 246 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g);
 247
 248 #endif