4 * Copyright Red Hat, Inc. 2013-2014
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
10 * This work is licensed under the terms of the GNU GPL, version 2.
11 * See the COPYING file in the top-level directory.
14 #ifndef HW_VIRTIO_GPU_H
15 #define HW_VIRTIO_GPU_H
17 #include "qemu/queue.h"
18 #include "ui/qemu-pixman.h"
19 #include "ui/console.h"
20 #include "hw/virtio/virtio.h"
22 #include "sysemu/vhost-user-backend.h"
24 #include "standard-headers/linux/virtio_gpu.h"
25 #include "qom/object.h"
27 #define TYPE_VIRTIO_GPU_BASE "virtio-gpu-base"
28 OBJECT_DECLARE_TYPE(VirtIOGPUBase
, VirtIOGPUBaseClass
,
31 #define TYPE_VIRTIO_GPU "virtio-gpu-device"
32 OBJECT_DECLARE_SIMPLE_TYPE(VirtIOGPU
, VIRTIO_GPU
)
34 #define TYPE_VHOST_USER_GPU "vhost-user-gpu"
35 OBJECT_DECLARE_SIMPLE_TYPE(VhostUserGPU
, VHOST_USER_GPU
)
37 #define VIRTIO_ID_GPU 16
39 struct virtio_gpu_simple_resource
{
47 uint32_t scanout_bitmask
;
48 pixman_image_t
*image
;
50 QTAILQ_ENTRY(virtio_gpu_simple_resource
) next
;
53 struct virtio_gpu_scanout
{
56 uint32_t width
, height
;
60 struct virtio_gpu_update_cursor cursor
;
61 QEMUCursor
*current_cursor
;
64 struct virtio_gpu_requested_state
{
65 uint16_t width_mm
, height_mm
;
66 uint32_t width
, height
;
70 enum virtio_gpu_base_conf_flags
{
71 VIRTIO_GPU_FLAG_VIRGL_ENABLED
= 1,
72 VIRTIO_GPU_FLAG_STATS_ENABLED
,
73 VIRTIO_GPU_FLAG_EDID_ENABLED
,
74 VIRTIO_GPU_FLAG_DMABUF_ENABLED
,
77 #define virtio_gpu_virgl_enabled(_cfg) \
78 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))
79 #define virtio_gpu_stats_enabled(_cfg) \
80 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))
81 #define virtio_gpu_edid_enabled(_cfg) \
82 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED))
83 #define virtio_gpu_dmabuf_enabled(_cfg) \
84 (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DMABUF_ENABLED))
86 struct virtio_gpu_base_conf
{
93 struct virtio_gpu_ctrl_command
{
94 VirtQueueElement elem
;
96 struct virtio_gpu_ctrl_hdr cmd_hdr
;
99 QTAILQ_ENTRY(virtio_gpu_ctrl_command
) next
;
102 struct VirtIOGPUBase
{
103 VirtIODevice parent_obj
;
105 Error
*migration_blocker
;
107 struct virtio_gpu_base_conf conf
;
108 struct virtio_gpu_config virtio_config
;
109 const GraphicHwOps
*hw_ops
;
111 bool use_virgl_renderer
;
112 int renderer_blocked
;
115 struct virtio_gpu_scanout scanout
[VIRTIO_GPU_MAX_SCANOUTS
];
117 int enabled_output_bitmask
;
118 struct virtio_gpu_requested_state req_state
[VIRTIO_GPU_MAX_SCANOUTS
];
121 struct VirtIOGPUBaseClass
{
122 VirtioDeviceClass parent
;
124 void (*gl_flushed
)(VirtIOGPUBase
*g
);
127 #define VIRTIO_GPU_BASE_PROPERTIES(_state, _conf) \
128 DEFINE_PROP_UINT32("max_outputs", _state, _conf.max_outputs, 1), \
129 DEFINE_PROP_BIT("edid", _state, _conf.flags, \
130 VIRTIO_GPU_FLAG_EDID_ENABLED, true), \
131 DEFINE_PROP_UINT32("xres", _state, _conf.xres, 1024), \
132 DEFINE_PROP_UINT32("yres", _state, _conf.yres, 768)
135 VirtIOGPUBase parent_obj
;
137 uint64_t conf_max_hostmem
;
140 VirtQueue
*cursor_vq
;
145 QTAILQ_HEAD(, virtio_gpu_simple_resource
) reslist
;
146 QTAILQ_HEAD(, virtio_gpu_ctrl_command
) cmdq
;
147 QTAILQ_HEAD(, virtio_gpu_ctrl_command
) fenceq
;
151 bool processing_cmdq
;
152 bool renderer_inited
;
154 QEMUTimer
*fence_poll
;
155 QEMUTimer
*print_stats
;
159 uint32_t max_inflight
;
166 struct VhostUserGPU
{
167 VirtIOGPUBase parent_obj
;
169 VhostUserBackend
*vhost
;
170 int vhost_gpu_fd
; /* closed by the chardev */
171 CharBackend vhost_chr
;
172 QemuDmaBuf dmabuf
[VIRTIO_GPU_MAX_SCANOUTS
];
173 bool backend_blocked
;
176 #define VIRTIO_GPU_FILL_CMD(out) do { \
178 s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num, 0, \
179 &out, sizeof(out)); \
180 if (s != sizeof(out)) { \
181 qemu_log_mask(LOG_GUEST_ERROR, \
182 "%s: command size incorrect %zu vs %zu\n", \
183 __func__, s, sizeof(out)); \
188 /* virtio-gpu-base.c */
189 bool virtio_gpu_base_device_realize(DeviceState
*qdev
,
190 VirtIOHandleOutput ctrl_cb
,
191 VirtIOHandleOutput cursor_cb
,
193 void virtio_gpu_base_reset(VirtIOGPUBase
*g
);
194 void virtio_gpu_base_fill_display_info(VirtIOGPUBase
*g
,
195 struct virtio_gpu_resp_display_info
*dpy_info
);
198 void virtio_gpu_ctrl_response(VirtIOGPU
*g
,
199 struct virtio_gpu_ctrl_command
*cmd
,
200 struct virtio_gpu_ctrl_hdr
*resp
,
202 void virtio_gpu_ctrl_response_nodata(VirtIOGPU
*g
,
203 struct virtio_gpu_ctrl_command
*cmd
,
204 enum virtio_gpu_ctrl_type type
);
205 void virtio_gpu_get_display_info(VirtIOGPU
*g
,
206 struct virtio_gpu_ctrl_command
*cmd
);
207 void virtio_gpu_get_edid(VirtIOGPU
*g
,
208 struct virtio_gpu_ctrl_command
*cmd
);
209 int virtio_gpu_create_mapping_iov(VirtIOGPU
*g
,
210 struct virtio_gpu_resource_attach_backing
*ab
,
211 struct virtio_gpu_ctrl_command
*cmd
,
212 uint64_t **addr
, struct iovec
**iov
);
213 void virtio_gpu_cleanup_mapping_iov(VirtIOGPU
*g
,
214 struct iovec
*iov
, uint32_t count
);
215 void virtio_gpu_process_cmdq(VirtIOGPU
*g
);
217 /* virtio-gpu-3d.c */
218 void virtio_gpu_virgl_process_cmd(VirtIOGPU
*g
,
219 struct virtio_gpu_ctrl_command
*cmd
);
220 void virtio_gpu_virgl_fence_poll(VirtIOGPU
*g
);
221 void virtio_gpu_virgl_reset(VirtIOGPU
*g
);
222 int virtio_gpu_virgl_init(VirtIOGPU
*g
);
223 int virtio_gpu_virgl_get_num_capsets(VirtIOGPU
*g
);