block/nvme: Move definitions before structure declarations
[qemu/ar7.git] / linux-user / riscv / cpu_loop.c
blobaa9e437875e5c3ccca0b2e75ab6a6e3fafd8c951
1 /*
2 * qemu user cpu loop
4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qemu/error-report.h"
23 #include "qemu.h"
24 #include "cpu_loop-common.h"
25 #include "elf.h"
27 void cpu_loop(CPURISCVState *env)
29 CPUState *cs = env_cpu(env);
30 int trapnr, signum, sigcode;
31 target_ulong sigaddr;
32 target_ulong ret;
34 for (;;) {
35 cpu_exec_start(cs);
36 trapnr = cpu_exec(cs);
37 cpu_exec_end(cs);
38 process_queued_cpu_work(cs);
40 signum = 0;
41 sigcode = 0;
42 sigaddr = 0;
44 switch (trapnr) {
45 case EXCP_INTERRUPT:
46 /* just indicate that signals should be handled asap */
47 break;
48 case EXCP_ATOMIC:
49 cpu_exec_step_atomic(cs);
50 break;
51 case RISCV_EXCP_U_ECALL:
52 env->pc += 4;
53 if (env->gpr[xA7] == TARGET_NR_arch_specific_syscall + 15) {
54 /* riscv_flush_icache_syscall is a no-op in QEMU as
55 self-modifying code is automatically detected */
56 ret = 0;
57 } else {
58 ret = do_syscall(env,
59 env->gpr[(env->elf_flags & EF_RISCV_RVE)
60 ? xT0 : xA7],
61 env->gpr[xA0],
62 env->gpr[xA1],
63 env->gpr[xA2],
64 env->gpr[xA3],
65 env->gpr[xA4],
66 env->gpr[xA5],
67 0, 0);
69 if (ret == -TARGET_ERESTARTSYS) {
70 env->pc -= 4;
71 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
72 env->gpr[xA0] = ret;
74 if (cs->singlestep_enabled) {
75 goto gdbstep;
77 break;
78 case RISCV_EXCP_ILLEGAL_INST:
79 signum = TARGET_SIGILL;
80 sigcode = TARGET_ILL_ILLOPC;
81 break;
82 case RISCV_EXCP_BREAKPOINT:
83 signum = TARGET_SIGTRAP;
84 sigcode = TARGET_TRAP_BRKPT;
85 sigaddr = env->pc;
86 break;
87 case RISCV_EXCP_INST_PAGE_FAULT:
88 case RISCV_EXCP_LOAD_PAGE_FAULT:
89 case RISCV_EXCP_STORE_PAGE_FAULT:
90 signum = TARGET_SIGSEGV;
91 sigcode = TARGET_SEGV_MAPERR;
92 sigaddr = env->badaddr;
93 break;
94 case EXCP_DEBUG:
95 gdbstep:
96 signum = TARGET_SIGTRAP;
97 sigcode = TARGET_TRAP_BRKPT;
98 break;
99 default:
100 EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
101 trapnr);
102 exit(EXIT_FAILURE);
105 if (signum) {
106 target_siginfo_t info = {
107 .si_signo = signum,
108 .si_errno = 0,
109 .si_code = sigcode,
110 ._sifields._sigfault._addr = sigaddr
112 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
115 process_pending_signals(env);
119 void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
121 CPUState *cpu = env_cpu(env);
122 TaskState *ts = cpu->opaque;
123 struct image_info *info = ts->info;
125 env->pc = regs->sepc;
126 env->gpr[xSP] = regs->sp;
127 env->elf_flags = info->elf_flags;
129 if ((env->misa & RVE) && !(env->elf_flags & EF_RISCV_RVE)) {
130 error_report("Incompatible ELF: RVE cpu requires RVE ABI binary");
131 exit(EXIT_FAILURE);